ASML Investor Focus Summary Industry and Company Overview - **Company**: ASML - **Industry**: Semiconductors - **Market Cap**: €377 billion / US$440 billion - **12-month Rating**: Buy - **12-month Price Target**: €1,030.00 - **Current Price (as of 10 Dec 2025)**: €946.00 - **Shares Outstanding**: 399 million - **Free Float**: 100% [5][6] Core Insights and Arguments Adoption of High NA Technology - **Cost Savings**: High NA technology could lead to 20-40% cost savings compared to double or triple patterning for critical layers [2][8] - **Critical Layers**: Identified three critical layers for logic and two for memory that are likely to adopt High NA [2][8] - **Timeline for Adoption**: Tools availability is expected to exceed 90% by 2026, likely triggering High NA orders in H1/H2 2026 for A14 2nd generation [2][10][46] Importance of High NA for ASML - **Market Share**: High NA could account for 15-20% of system sales by the end of the decade, increasing lithography intensity share by 3-5 percentage points [3][9] - **Valuation Impact**: High NA is expected to enhance ASML's valuation premium relative to peers, potentially normalizing the premium to 40-60% from the current 20% [4][23] Financial Projections - **Revenue Growth**: Projected revenues for ASML are expected to grow from €21.173 billion in 2022 to €47.210 billion by 2029 [4] - **Earnings Per Share (EPS)**: EPS is projected to increase from €13.90 in 2022 to €46.65 by 2029 [4][6] - **Profitability Metrics**: EBIT margin is expected to improve from 30.9% in 2022 to 41.9% by 2029 [4] Additional Important Insights Competitive Positioning - ASML's historical P/E premium has been around 80-90% relative to US peers, attributed to its monopolistic position and technological advancements [20][23] - The introduction of High NA is seen as crucial for maintaining this premium, especially as ASML currently trades at a low relative premium [23] Technical Advantages of High NA - High NA technology simplifies processes, reducing the number of steps required for critical layers from 27-60 to single digits, leading to lower costs and improved yields [40][41] - High NA is expected to deliver significant improvements in patterning yield, resolution, and productivity compared to low NA methods [38][39] Challenges and Considerations - **Stitching Technology**: The adoption of High NA may face challenges related to the stitching process required for anamorphic optics, which could delay full-scale implementation [65][66] - **Customer Feedback**: Positive feedback from major customers like Intel and IBM highlights benefits beyond cost, such as reduced defect density and shorter cycle times [37] Future Monitoring - Key dates to monitor include the SPIE industry event scheduled for February 2026, which may provide updates on High NA readiness [3][9] - The maturity of tools and their availability will be critical indicators for the broader adoption of High NA technology [46][63]

Core Viewpoint - ASML emphasizes the importance of High NA EUV technology for the future of semiconductor manufacturing, with significant advancements already being reported by major clients like Intel and Samsung [1][2]. Group 1: ASML and High NA EUV Technology - ASML confirmed revenue from a High NA EUV machine, which slightly lowered its gross margin but still achieved a strong overall gross margin of 53.7% [1]. - Intel reported using High NA equipment to expose over 30,000 wafers in a single quarter, significantly improving process efficiency by reducing the number of steps from 40 to below 10 [1]. - Samsung noted a 60% reduction in cycle time for a specific layer using High NA technology, indicating its faster maturity compared to earlier low NA EUV devices [1]. Group 2: Samsung's Strategy - Samsung is aggressively purchasing next-generation lithography machines to enhance its wafer foundry business, aiming to improve yield and reduce losses [2][4]. - The company has confirmed that its Exynos 2600 will be the first 2nm GAA chip, with High NA EUV machines expected to play a crucial role in achieving the necessary yield for mass production [2][4]. Group 3: SK Hynix's Developments - SK Hynix has assembled the industry's first Twinscan NXE:5200B High NA EUV lithography system, which will initially serve as a development platform for next-generation DRAM production [7][9]. - This new system is expected to enhance productivity and product performance by allowing for more complex patterns on wafers, thus increasing chip density and efficiency [7][9]. Group 4: Industry Adoption and Future Outlook - ASML anticipates that widespread adoption of High NA EUV technology in mass production will not begin until after 2027 [4][10]. - TSMC has stated that its next-generation processes do not require High NA EUV systems, indicating a cautious approach to adopting this technology [11]. - Micron is also taking a conservative stance, planning to introduce EUV lithography in DRAM production by 2025, with High NA EUV adoption remaining uncertain [12]. Group 5: Cost and Technological Considerations - The high cost of High NA EUV machines, estimated at $400 million each, is a significant barrier to adoption, leading companies to explore alternative technologies [14][15]. - Emerging transistor architectures like GAAFET and CFET may reduce reliance on advanced lithography tools, shifting focus towards etching technologies [14][15].

Group 1: ASML and High NA EUV Technology - ASML views High NA EUV as a critical future technology, confirming revenue from a high numerical aperture EUV system despite a slight decrease in gross margin, maintaining a strong overall gross margin of 53.7% [1] - Intel reported using High NA equipment to expose over 30,000 wafers in a single quarter, significantly improving process flow by reducing the number of steps from 40 to below 10 [1] - Samsung noted a 60% reduction in cycle time for a specific layer using High NA technology, indicating its maturity compared to earlier low numerical aperture EUV systems [1] Group 2: Samsung's Investment in Next-Generation Lithography - Samsung has increased its procurement of next-generation lithography machines from ASML to enhance its competitive position in the semiconductor market, particularly in the 2nm GAA process [2] - The Exynos 2600 is confirmed as Samsung's first 2nm GAA chip, which has begun mass production, aiming to improve yield rates and reduce losses [2][3] - Samsung's procurement of High NA EUV lithography machines is expected to help achieve a yield rate of at least 70%, necessary for financial viability in mass production [3] Group 3: SK Hynix's Adoption of High NA EUV - SK Hynix has assembled the industry's first Twinscan NXE:5200B high numerical aperture EUV lithography system, which will initially serve as a development platform for next-generation DRAM technology [6] - This new system is expected to enhance productivity and product performance, allowing for more complex patterns and increased chip density on wafers [6][8] - SK Hynix aims to accelerate the development of next-generation memory products and strengthen its position in the high-value memory market through this advanced technology [6][8] Group 4: Industry Perspectives on High NA EUV - TSMC has stated that its next-generation processes, including A16 and A14, do not require High NA EUV systems, focusing instead on extending the life of existing EUV technologies [11][12] - Micron is cautious about adopting EUV lithography, planning to introduce EUV into DRAM production by 2025, with High NA EUV adoption remaining uncertain [12] - The Japanese company Rapidus plans to install multiple EUV lithography systems in its new fab, indicating potential future interest in High NA EUV technology [13] Group 5: Challenges and Future Directions - The high cost of High NA EUV machines, priced at around $400 million, has led to hesitance among manufacturers to adopt this technology [14] - Emerging transistor architectures like GAAFET and CFET may reduce reliance on advanced lithography tools, shifting focus towards etching technologies [14][15] - The semiconductor industry is expected to transition to High NA EUV lithography by the 2030s, with ongoing developments in process technologies [8][14]