Core Viewpoint - ASML emphasizes the importance of High NA EUV technology for the future of semiconductor manufacturing, with significant advancements already being reported by major clients like Intel and Samsung [1][2]. Group 1: ASML and High NA EUV Technology - ASML confirmed revenue from a High NA EUV machine, which slightly lowered its gross margin but still achieved a strong overall gross margin of 53.7% [1]. - Intel reported using High NA equipment to expose over 30,000 wafers in a single quarter, significantly improving process efficiency by reducing the number of steps from 40 to below 10 [1]. - Samsung noted a 60% reduction in cycle time for a specific layer using High NA technology, indicating its faster maturity compared to earlier low NA EUV devices [1]. Group 2: Samsung's Strategy - Samsung is aggressively purchasing next-generation lithography machines to enhance its wafer foundry business, aiming to improve yield and reduce losses [2][4]. - The company has confirmed that its Exynos 2600 will be the first 2nm GAA chip, with High NA EUV machines expected to play a crucial role in achieving the necessary yield for mass production [2][4]. Group 3: SK Hynix's Developments - SK Hynix has assembled the industry's first Twinscan NXE:5200B High NA EUV lithography system, which will initially serve as a development platform for next-generation DRAM production [7][9]. - This new system is expected to enhance productivity and product performance by allowing for more complex patterns on wafers, thus increasing chip density and efficiency [7][9]. Group 4: Industry Adoption and Future Outlook - ASML anticipates that widespread adoption of High NA EUV technology in mass production will not begin until after 2027 [4][10]. - TSMC has stated that its next-generation processes do not require High NA EUV systems, indicating a cautious approach to adopting this technology [11]. - Micron is also taking a conservative stance, planning to introduce EUV lithography in DRAM production by 2025, with High NA EUV adoption remaining uncertain [12]. Group 5: Cost and Technological Considerations - The high cost of High NA EUV machines, estimated at $400 million each, is a significant barrier to adoption, leading companies to explore alternative technologies [14][15]. - Emerging transistor architectures like GAAFET and CFET may reduce reliance on advanced lithography tools, shifting focus towards etching technologies [14][15].

毋庸置疑，在ASML看来，High NA EUV会是未来的头等大事。在此前的二季度财报说明会上，荷兰设 备巨头也确认了一台高数值孔径EUV的收入。他们指出，虽然该项收入确认拉低了毛利率，但总体上 依然带来53.7%毛利率的强劲表现。 根据ASML在其第一季度财报电话会议上透露，英特尔已报告使用高数值孔径 (High-NA) 设备在一个季 度内曝光了超过 3 万片晶圆。这也显著改进了工艺流程，使特定层上的工艺步骤数量从 40 个减少到 10 个以下。另一家用户三星指出，其某一层的周期时间缩短了 60%。这些结果表明，该技术比 ASML早 期的低数值孔径 EUV 设备成熟得更快，后者需要更长的时间才能达到生产就绪状态。 几个月前，有报道指出，这家韩国巨头在 Exynos 2600 芯片的测试中，上述光刻技术的良率达到了 30%。而众所周知，要实现量产在财务上可行，良率至少需要达到70%。因此，采购这些高数值孔径 EUV光刻机或许能帮助三星实现这一目标，因为ASML的尖端工具有助于实现2纳米GAA工艺的超精细 电路。 然而，即使该公司拥有近乎无限的资金，也无法随心所欲地订购数量，因为ASML对其销售数量有所限 制。 ...

公众号记得加星标⭐️，第一时间看推送不会错过。 然而，即使该公司拥有近乎无限的资金，也无法随心所欲地订购数量，因为ASML对其销售数量有所 限制。据报道，这家荷兰制造商每年只能生产五到六台光刻机，而且即使是这些光刻机也受到政府的 出口管制。 值得一提的是，韩国媒体The Bell在今年五月曾报道，三星电子认为，高数值孔径 EUV 光刻机预计 将在晶圆代工工艺中率先部署，但其大规模生产应用尚需时日。正如报告中所强调的，ASML 预计 其在量产中应用要到 2027 年之后才会开始。报道称，三星正在评估在其 1.4nm 代工工艺中使用高 NA EUV 工具的可能性，并积极开发相应的制造技术。该公司的目标是在 2027 年实现 1.4nm 节点 的量产。 毋庸置疑，在ASML看来，High NA EUV会是未来的头等大事。在此前的二季度财报说明会 上，荷兰设备巨头也确认了一台高数值孔径EUV的收入。他们指出，虽然该项收入确认拉低了 毛利率，但总体上依然带来53.7%毛利率的强劲表现。 根据ASML在其第一季度财报电话会议上透露，英特尔已报告使用高数值孔径 (High-NA) 设备在一 个季度内曝光了超过 3 万片晶圆 ...