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为何死磕EUV光刻?
3 6 Ke· 2026-02-05 04:29
Core Insights - The development of High Numerical Aperture Extreme Ultraviolet (High NA EUV) lithography technology has gained significant momentum over the past two years, with the first systems delivered to customers and the establishment of a collaborative laboratory between ASML and imec [1] - High NA EUV technology shows great potential for achieving promises in size reduction, process simplification, and design flexibility [1] Group 1: Resolution and Imaging Quality - High NA EUV lithography has a numerical aperture (NA) of 0.55, which is a 67% increase compared to 0.33 NA EUV, promising higher resolution [3] - The resolution of lithography systems reflects their ability to print and resolve specific critical dimensions (CD), with High NA EUV expected to resolve features as small as 16nm [4][5] - The final resolution is influenced by the imaging quality in the air before exposure on the wafer, as well as the materials and etching processes used [7] Group 2: Process Simplification - High NA EUV lithography reduces the need for complex multiple exposure steps, allowing for the printing of minimum chip feature sizes in a single exposure, which is more efficient than Low NA EUV that requires multiple masks [9][10][12] Group 3: Design Flexibility - The advancement in resolution from High NA EUV allows for the reapplication of 1.5D and 2D Manhattan designs, providing greater flexibility for chip designers and potentially reducing chip area or layers, thus lowering costs [15][16] - imec has demonstrated compatibility with curved design techniques, which can lead to area reductions of up to 20% while maintaining design integrity [17] Group 4: Future Implications - High NA EUV technology is expected to be a key driver for future advanced technologies, including AI chips, high-performance computing, and next-generation memory, as it meets the demands for rapid hardware development [18] - The technology plays a crucial role in achieving the goals set by the European Chips Act regarding the advancement of logic technology nodes below 2nm [18]
为何死磕EUV光刻?
半导体行业观察· 2026-02-05 01:08
Core Viewpoint - The development of High Numerical Aperture Extreme Ultraviolet (High NA EUV) lithography technology is gaining momentum, showcasing significant potential in size reduction, process simplification, and design flexibility, driven by a collaborative ecosystem involving leading chip manufacturers and suppliers [2][19]. Group 1: Resolution and Image Contrast - High NA EUV lithography, with a numerical aperture (NA) of 0.55, offers a 67% increase in resolution compared to 0.33 NA EUV, enabling the ability to resolve features as small as 16 nanometers [4][5]. - The resolution of lithography systems is influenced by factors such as the k1 factor, wavelength of light, and the NA of the projection lens, with the goal of achieving a k1 value close to its physical limit of 0.25 [4]. Group 2: Process Simplification - High NA EUV lithography reduces the need for complex multiple exposure steps, allowing for the printing of minimum chip feature sizes in a single exposure, which enhances manufacturing efficiency and reduces costs [10][19]. - For critical metal layers in advanced logic nodes, High NA EUV lithography can achieve the required specifications in a single exposure, while 0.33 NA EUV requires multiple masks [11]. Group 3: Design Flexibility - The advancements in High NA EUV lithography allow for the reapplication of 1.5D and 2D Manhattan designs, enabling greater design flexibility and potentially reducing chip area and costs [16][18]. - The technology supports the introduction of complex curved geometries in chip design, which can lead to significant area reductions and improved performance [18]. Group 4: Industry Implications - High NA EUV lithography is positioned as a critical technology for future advancements in AI chips, high-performance computing, and next-generation memory, addressing the rapid hardware development needs of these applications [19]. - The technology is also essential for meeting the goals outlined in the European Chips Act regarding the advancement of logic technology nodes below 2 nanometers [19].