Core Viewpoint - NVIDIA's next-generation Rubin AI architecture will utilize the company's first SoIC packaging, indicating a significant shift in the hardware market with the integration of advanced components like HBM4 [1][5] Group 1: SoIC Packaging Development - TSMC is rapidly constructing factories in Taiwan to shift focus from advanced packaging (CoWoS) to SoIC, with expectations for NVIDIA, AMD, and Apple to release next-generation solutions based on this design [1][2] - SoIC allows for the integration of different chips, reducing internal circuit layout space and lowering costs, with AMD being an early adopter and Apple expected to follow with its M5 chip [2][3] - TSMC's SoIC production capacity is projected to reach 15,000 to 20,000 wafers by the end of this year, with plans to double that capacity next year [2][6] Group 2: NVIDIA's Rubin Architecture - The Rubin GPU will separate the GPU and I/O die, utilizing N3P and N5B processes respectively, and will integrate these components using SoIC packaging [2][5] - The Vera Rubin NVL144 platform is expected to deliver up to 50 PFLOPS of FP4 performance with 288 GB of HBM4 memory, while the NVL576 will provide up to 100 PFLOPS and 1 TB of HBM4e capacity [5] Group 3: Workforce and Production Adjustments - TSMC plans to adjust its workforce from 8-inch fabs to support advanced packaging facilities, aiming to recruit 8,000 new employees this year to reach a target of 100,000 [3] - The company is actively preparing for the integration of SoIC technology, which is seen as crucial for future developments in semiconductor packaging [3][6]