Group 1: North American Computing Power - North American cloud vendors are expected to increase capital expenditure to over $600 billion by 2026, indicating a strong growth trajectory for computing power investments and infrastructure development [1] - The demand for AI commercial realization is being driven by open interconnectivity and power cost reduction, validating the rationale for computing power investments [1] - The rise in power consumption per card/cabinet in North America highlights the importance of power supply assurance for cloud computing capacity [1] Group 2: Domestic Computing Power - Domestic AI infrastructure is anticipated to grow rapidly by 2026, driven by continuous upgrades in models and increased capital expenditure from leading cloud vendors and telecom operators [2] - The IDC industry is expected to enter a cyclical turning point due to high demand and improved supply quality, presenting long-term investment value [2] - Structural alpha opportunities are emerging in the industry chain due to the upgrade of network architecture and computing power chips, benefiting segments like optical modules, liquid cooling, switches, and power supplies [2] Group 3: Edge AI - The edge AI market is on the verge of large-scale deployment, supported by policy initiatives and collaboration within the industry chain [3] - The introduction of innovative products, such as MetaAI glasses, is expected to accelerate market growth for edge AI [3] - The combination of policy guidance, ecosystem improvement, and demand growth is likely to create a solid foundation for edge AI, transitioning the industry from thematic catalysts to performance realization [3] Group 4: Telecom Operators - Telecom operators are experiencing a phase of capital expenditure reduction, business structure transformation, and increasing dividend ratios, which enhances their investment appeal [4] - The mature basic telecom business continues to serve as a revenue stabilizer, while cost management and AI integration support profit growth [4] - The rising dividend ratio in a low-interest-rate environment further highlights the value of telecom operators, with potential for continued valuation improvement [4]

Core Viewpoint - The copper interconnect era may be nearing its end as copper is no longer the optimal metallization choice for interconnects below 10 nanometers, despite its unmatched performance for larger feature sizes [1][2]. Group 1: Challenges of Copper Interconnects - Copper faces significant challenges in miniaturization, particularly below its average free path length of 40 nanometers, where its resistivity increases sharply [1]. - When line widths fall below 10 nanometers, electron scattering can cause line resistance to increase by approximately 10 times compared to bulk material [1]. - The requirement for diffusion barrier layers complicates the manufacturing of extremely small features, as the actual copper line thickness is reduced to 2 to 4 nanometers for a nominal 10 nanometer line width [1]. Group 2: Potential of Ruthenium as an Alternative - Ruthenium is emerging as a potential alternative conductor due to its lower resistivity and superior electromigration resistance compared to copper for lines with a critical dimension of 17 nanometers or smaller [2]. - Ruthenium can be easily etched, allowing for more flexible process integration, although it poses challenges in deposition and removal [2][5]. - The compatibility of ruthenium with copper is crucial, as copper will likely remain the preferred metal for lines wider than 20 nanometers [2]. Group 3: Research and Development Efforts - Samsung's collaboration with IMEC has led to findings that reducing the thickness of the barrier layer can lower overall line resistance, and that copper does not mix with ruthenium at the bottom of vias [3]. - The use of self-assembled monolayers (SAM) to prevent barrier layer deposition at the bottom of vias has shown promise in maintaining electromigration performance [3]. - Research indicates that ruthenium's deposition conditions and crystalline structure are still being explored to optimize its performance in semiconductor applications [4][5]. Group 4: Future Implications - The introduction of ruthenium as a via or line material could signify a transformative change in semiconductor manufacturing, although such changes are expected to be gradual [5]. - Current research is focused on achieving consistent deposition and removal of ruthenium across millions of features on thousands of wafers [4][5]. - The semiconductor industry is laying the groundwork for the eventual transition away from copper interconnects, although this shift will not happen immediately [5].

Core Viewpoint - The copper interconnect era may be nearing its end as copper is no longer the optimal metallization choice for interconnects with critical dimensions below 10 nanometers, despite its unmatched performance for larger feature sizes [2][3]. Group 1: Challenges of Copper Interconnects - Copper faces significant challenges in miniaturization, particularly as its resistivity increases dramatically when the line width is below 10 nanometers, with resistance increasing approximately tenfold compared to bulk material [2]. - The requirement for diffusion barrier layers complicates the manufacturing of extremely small features, as the actual copper line thickness is reduced to 2 to 4 nanometers when accounting for the barrier layer thickness of at least 3 to 4 nanometers [2]. Group 2: Alternative Conductors - Ruthenium is emerging as a potential alternative conductor due to its lower resistivity and superior electromigration resistance compared to copper, especially for lines with critical dimensions of 17 nanometers or smaller [5]. - Ruthenium's compatibility with copper is crucial, as copper will likely remain the preferred metal for lines wider than 20 nanometers, making the interface between any alternative conductor and copper critical for device success [5]. Group 3: Research and Development - Samsung's research team, in collaboration with IMEC, has demonstrated that reducing the thickness of the barrier layer can lower overall line resistance, and that copper does not mix with ruthenium at the bottom of vias [6]. - The use of ruthenium allows for more flexible process integration, as it is easier to etch compared to copper, although it presents challenges in deposition and removal [5][9]. Group 4: Future Prospects - The semiconductor industry is beginning to explore the deposition conditions and properties of ruthenium, with findings suggesting that lower deposition pressures can yield denser, lower-resistance films, although adhesion may suffer [9]. - The introduction of ruthenium as a via or line material could represent a significant transformation in semiconductor manufacturing, although such changes are expected to take time as the industry lays the groundwork for this transition [10].