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意料之外的EDA
Xin Lang Cai Jing· 2025-05-29 00:53
Global EDA Industry Performance - The global EDA industry is projected to grow by 11% year-on-year in Q4 2024, reaching $4.9 billion, despite a weak performance in the Chinese market [3][4] - The EDA software industry is characterized by high technical barriers, talent reserves, user collaboration, and significant capital scale, with a market concentration exceeding 70% among the top three companies: Cadence, Synopsys, and Siemens EDA [5] Growth Drivers in EDA - The increasing demand for edge computing and high-performance computing (HPC) chips is driving the need for more complex and automated EDA solutions [6] - The rise of cloud solutions facilitates seamless collaboration and enhances accessibility for global design teams [6] - The integration of AI and machine learning algorithms into workflows is optimizing design accuracy and efficiency, reducing costly errors, and accelerating time-to-market [6] Segment Performance - CAE (Computer-Aided Engineering) revenue grew by 10.9% to $1.6969 billion [7] - IC physical design and verification saw a 15.4% increase, reaching $797.9 million [7] - PCB & MCM (Printed Circuit Board & Multi-Chip Module) revenue increased by 15.9% to $476.2 million [7] - Semiconductor IP (SIP) revenue grew by 7.9% to $1.7607 billion, with some companies reporting declines [7] - Service revenue increased by 11% to $195.6 million, reflecting strong design demand amid talent shortages [7] - IC packaging design revenue surged by 70%, indicating a significant rise in advanced packaging demand [7] AI's Role in EDA - EDA vendors are leveraging AI to optimize software engines, processes, and workflows, which is crucial for scalable and reliable outcomes [8] - AI applications in EDA include automating repetitive tasks, enhancing design optimization, and providing intelligent assistance through generative AI [11][12] - AI-driven tools can significantly reduce design cycles and improve accuracy, as demonstrated by Synopsys' AI-driven EDA tools [11] Future Outlook - The emergence of Chiplet technology is transforming chip design and manufacturing paradigms, necessitating new tool support for architecture exploration and signal integrity analysis [13] - EDA tools must evolve to support heterogeneous integration design, with companies like Synopsys and Cadence developing specialized tool suites for Chiplet design [13][15] - The collaboration between EDA tools and IP design capabilities will be critical for future competitiveness, as traditional IP markets face saturation [14]
Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Prnewswire· 2025-04-29 16:00
Synopsys Production-Ready EDA Flows and Broadest IP Portfolio Deliver Leading PPA for Intel Foundry's Advanced Processes and Packaging TechnologiesHighlights Production-ready Synopsys digital and analog EDA flows for Intel 18A and Intel 18A-P technologies pave the way for broad adoption and accelerate development of high-performance designs; engaged in early design technology co-optimization for Intel 14A-E Optimized EDA reference flow with a unified exploration-to-signoff platform accelerates 2.5D/3D mult ...
Synopsys and TSMC Usher In Angstrom-Scale Designs with Certified EDA Flows on Advanced TSMC A16 and N2P Processes
Prnewswire· 2025-04-23 20:00
Core Insights - Synopsys, in collaboration with TSMC, is enhancing EDA and IP solutions for advanced semiconductor designs, particularly focusing on AI chip design and 3D multi-die innovations [2][3] - The partnership aims to accelerate the adoption of Angstrom-scale designs through certified EDA flows on TSMC's latest processes, including A16 and N2P [2][4] Collaboration and Innovation - Synopsys and TSMC are working together to provide certified digital and analog flows that improve design productivity and optimization for advanced semiconductor processes [2][3] - The collaboration includes the development of EDA flows for TSMC's A14 process, demonstrating Synopsys' commitment to high-performance design solutions [5] Technology Advancements - Synopsys' 3DIC Compiler supports TSMC's CoWoS technology, enabling unprecedented 5.5x reticle interposer sizes, which is crucial for next-generation HPC and AI chips [7] - The integration of multi-physics analysis and signoff solutions with Ansys simulation technologies enhances power, thermal, and signal integrity analysis for advanced designs [7] IP Solutions and Market Impact - Synopsys offers a broad portfolio of silicon-proven IP solutions for TSMC's advanced processes, which are essential for achieving low power and high performance in various applications, including HPC and automotive [8][9] - The successful deployment of Synopsys IP in thousands of designs helps reduce integration risk while meeting stringent power, performance, and area targets [8] Industry Engagement - Synopsys is actively participating in industry events, such as the TSMC Tech Symposium, to showcase its innovations and strengthen partnerships within the semiconductor ecosystem [10]