Core Viewpoint - The article highlights the inclusion of six group standards from the HiPi Alliance into the national standardization plan, marking a significant step in the development of chip interconnection standards in China [1][4]. Group 1: HiPi Alliance Standards - The six HiPi group standards are part of the "Chip Testing Specification" series, covering various aspects such as compatibility testing, design for testability, connectivity testing, data format for test documents, testing equipment and tools, mass production testing, and electromagnetic compatibility testing [3]. - These standards are crucial for ensuring the testability and interface consistency of chips throughout their production, packaging, and system integration phases, providing a solid technical foundation for the application of chip technology in high-performance computing, artificial intelligence, and communication [3]. Group 2: Standardization Progress - The standardization efforts in the chip field in China have been ongoing, with the HiPi Alliance proposing the chip standard system version 1.0 in 2022 and releasing the chip interconnection interface group standard in 2023 [4]. - The establishment of the chip standard working group by the National Integrated Circuit Standardization Technical Committee in 2024 and the upcoming release of five recommended national standards in 2025 further emphasize the importance of chip interconnection standards [4]. - The recent recognition of HiPi Alliance's standards signifies a new phase in the construction of China's chip interconnection standardization system, which is essential for overcoming bottlenecks in integrated circuit development and fostering a self-controlled, secure, and reliable industrial chain [4]. Group 3: HiPi Alliance Overview - The HiPi Alliance was officially established in 2022 in the Zhongguancun National Independent Innovation Demonstration Zone, initiated by leading enterprises, standard organizations, and academic institutions in the integrated circuit industry [5]. - The alliance has gathered nearly 200 member units, including major enterprises across the chip industry chain, and focuses on promoting the standardization, productization, industrialization, and ecological development of high-performance chip interconnection technology [5].

Core Viewpoint - The Third Integrated Chip and Chiplet Conference will be held from October 10-13, 2025, in Wuhan, focusing on collaborative design and packaging to advance chip technology [1]. Event Overview - The conference is organized by Wuhan University, the Institute of Computing Technology of the Chinese Academy of Sciences, and Fudan University, featuring 7 keynote speeches and 16 technical forums [1]. - The theme is "Design and Packaging Collaboration, Building the Future of Chips," aiming to foster discussions on cutting-edge topics such as 3D integration, heterogeneous integration, multi-physical field collaboration, high-speed interconnects, EDA design methods, and advanced storage and packaging technologies [1]. Schedule Highlights - The opening ceremony will take place on October 11, 2025, followed by various sessions including: - Keynote on cutting-edge technology research in integrated chips [1]. - Forums addressing topics like storage and computing integration, multi-physical field simulation, and thermal management technologies [4]. - Notable speakers include experts from prestigious institutions such as the Chinese Academy of Sciences and Fudan University [4][1]. Participation Information - Registration for the conference can be completed online or on-site, with a countdown of only 2 days remaining until the event [5].

Core Viewpoint - The third Integrated Chip and Chiplet Conference will be held from October 10-13, 2025, in Wuhan, focusing on "Design and Packaging Collaboration to Build the Future of Chips" [2] Conference Overview - The conference will feature 16 technical sub-forums aimed at professionals in the integrated chip and chiplet technology fields, covering topics such as 3D integration, heterogeneous integration, multi-physical field collaboration, high-speed interconnects, EDA design methods, and advanced storage and packaging processes [2] - The event aims to foster collaborative innovation in integrated chip and chiplet technology, address key bottlenecks, and accelerate industry implementation [2] Agenda Summary - Registration will take place on October 10, 2025, from 14:00 to 20:00 at Wanda Reign Hotel [3] - The opening ceremony and keynote presentations are scheduled for the morning of October 11, followed by technical sub-forum reports in the afternoon [3] - The conference will continue with additional keynote presentations and sub-forum reports on October 12, along with self-service lunches and dinners [3] Sub-Forum Topics - Forum 1: Fusion of Storage and Computing for Large Models [5] - Forum 2: Multi-Physical Field Simulation for Integrated Chips [5] - Forum 3: Heterogeneous Integration of Memory and Computing Chips [5] - Forum 4: Optical I/O and Ultra-High-Speed Interfaces for Integrated Chips [5] - Forum 5: Thermal Management and Packaging Heat Dissipation Technologies [5] - Forum 6: Top Conference Forum - System Architecture [6] - Forum 7: Open Source Community Competitions [7] - Forum 8: IEEE Chiplet Workshop on Standards, Circuits, and Systems [7] - Forum 9: Advanced Packaging Processes and Hybrid Bonding for Chiplets [7] - Forum 10: Wafer-Level/Ultra-Wafer Size High-Performance Chips [7] - Forum 11: Heterogeneous Integrated 3D Power Supply Architectures [7] - Forum 12: Advanced Storage Chips Based on 3D Integration [7] - Forum 13: Silicon Interposer and Glass Substrate for Integrated Chips [7] - Forum 14: EDA Layout and Testing for Chiplet Integration [7] - Forum 15: Post-Processing 3D Heterogeneous Integrated Devices and Processes [8] - Forum 16: Top Conference Forum - Packaging Materials and Processes [8] Registration Information - Early bird registration ends on September 20, 2025, with registration available through the conference website [2][15]

Group 1 - The third Integrated Chip and Chiplet Conference will be held in Wuhan from October 10-13, 2025, focusing on the theme "Design and Packaging Collaboration, Building the Future of Chips" [2][3] - The conference aims to discuss the latest advancements and future trends in integrated chip and chiplet technology, which are crucial for driving innovation in various sectors such as electronics, communication systems, and artificial intelligence [3][4] - The event will feature keynote speeches, expert roundtable discussions, technology forums, and showcases of cutting-edge technologies, providing attendees with insights into the latest research and practical case studies [4] Group 2 - Registration for the conference is now open, with student tickets priced at 1,000 yuan and non-student tickets at 2,000 yuan [6] - Early bird registration discounts are available until September 20, 2025, with student tickets at 800 yuan and non-student tickets at 1,600 yuan [7] - The conference invites sponsorships, offering partners opportunities for brand promotion and resource integration to achieve multiple goals in technology display, market expansion, and industry collaboration [11]