阶跃星辰发布新一代开源Agent基座模型Step 3.5 Flash。该模型面向实时Agent工作流场景，最高推理速 度可达每秒350个token。据悉，Step 3.5 Flash采用稀疏MoE架构，每个token仅激活约110亿个参数（总 计960亿参数）。包括华为昇腾、 沐曦股份、壁仞科技、燧原科技、天数智芯、阿里平头哥在内的多家 芯片厂商，已完成适配。 ...

January 30, 2026 02:19 PM GMT S. Korea Technology | Asia Pacific Memory – Double Up The reaction to earnings was less optimistic in view of the rally into earnings. Both Samsung and SK hynix enter a period of unprecedented capacity constraint, with record top line and margins, driving higher capex. Upside to capital returns may underpin yet further outperformance. The stock market cares only about future earnings: The debate after the blowout 4Q is whether numbers and the stocks have further upside. But we ...

Weekend Thoughts. 周末思绪 05/53. Equity polls, Indon downgrade, KOSPI Week. 05/53。股市⺠调、印尼评级下调、KOSPI 周报。 Past notes: 往期笔记： 4/53. 2026 EQ themes. 4/53。2026 年股市主题。 2/53. Happy new year. 2/53。新年快乐。 Busy week for us in Goldman Asia. Our flagship Global Macro Conference in HK saw ~4000 participants attending and atmosphere was energetic and engaging. Client conversations generally point to a constructive outlook even as markets took a breather in 2H of week. On GS Prime books global equities were net sold for the fi ...

【中信科技产业】海外AI叙事或重回乐观情形，重视海外算力链新一轮上涨机遇！ 核心判断 近期海外推理与训练算力需求同步走强，亚马逊云、谷歌云相继涨价，台积电上修Capex。 尽管当前AI应用大规模商业化能见度仍有限，但在模型与应用密集催化下，未来3–6个月海外算力需求有望进一步 上行，算力"泡沫论"担忧或阶段性缓解，产业链有望迎来新一轮修复。 推理侧：Agent落地 【中信科技产业】海外AI叙事或重回乐观情形，重视海外算力链新一轮上涨机遇！ 核心判断 近期海外推理与训练算力需求同步走强，亚马逊云、谷歌云相继涨价，台积电上修Capex。 尽管当前AI应用大规模商业化能见度仍有限，但在模型与应用密集催化下，未来3–6个月海外算力需求有望进一步 上行，算力"泡沫论"担忧或阶段性缓解，产业链有望迎来新一轮修复。 推理侧：Agent落地抬升推理算力消耗 MoltBot等新一代Agent显著提升对电脑操作与复杂任务的处理能力，带来更高推理算力消耗。 Anthropic持续推出Claude Code、Agent Skills等产品，拓展Agent应用场景。 OpenRouter数据显示，2026年1月初以来Token调用量持 ...

Core Insights - The unprecedented availability of unsupervised training data and the scaling laws of neural networks have led to a significant increase in the size and computational demands of models used for training low-level logic models (LLMs) [2] - The primary performance bottleneck is shifting towards memory bandwidth rather than computational power, as server hardware's peak floating-point operations per second (FLOPS) have increased at a rate of 3 times every two years, while DRAM and interconnect bandwidth have only increased at rates of 1.6 times and 1.4 times, respectively [2][10] - The article emphasizes the need to redesign model architectures, training, and deployment strategies to overcome memory limitations [2] Group 1 - The computational requirements for training large language models (LLMs) have grown at a rate of 750 times every two years, driven by advancements in AI accelerators [4] - Memory and communication bottlenecks are emerging as significant challenges in the training and serving of AI models, with many applications being limited by internal and inter-chip communication rather than computational capacity [4][9] - The "memory wall" problem, where the performance of memory does not keep pace with computational speed, has been a recognized issue since the 1990s and continues to be relevant today [5][6] Group 2 - Over the past 20 years, server-level AI hardware's peak computational capability has increased by 60,000 times, while DRAM's peak capability has only increased by 100 times, highlighting the growing disparity between computation and memory bandwidth [8] - Recent trends in AI model development have led to unprecedented increases in data volume, model size, and computational resources, with LLMs growing in size by 410 times every two years [9] - Even when models fit within a single chip, internal data transfer between registers, caches, and global memory is becoming a bottleneck, necessitating faster data provision to maintain arithmetic unit utilization [10] Group 3 - The article discusses the performance characteristics and bottlenecks of Transformer models, particularly focusing on the differences between encoder and decoder architectures [13] - Arithmetic intensity, which measures the FLOPS per byte of memory accessed, is crucial for understanding performance bottlenecks in Transformer models [14] - Performance analysis of Transformer inference on Intel Gold 6242 CPUs shows that the latency for GPT-2 is significantly higher than for BERT models, indicating that memory operations are a major bottleneck for decoder models [17] Group 4 - To address memory bottlenecks, the article suggests rethinking AI model design, emphasizing the need for more efficient training methods and reducing the reliance on extensive hyperparameter tuning [18] - The challenges of deploying large models for inference are highlighted, with potential solutions including model compression through quantization and pruning [25][27] - The design of AI accelerators should focus on improving memory bandwidth alongside peak computational capability, as current designs prioritize computational power at the expense of memory efficiency [29]

Core Viewpoint - The development of flexible fiber chips by Fudan University represents a significant breakthrough in the field of electronics, enabling the integration of information processing capabilities directly into fibers, which can meet the demands of emerging industries such as brain-machine interfaces and electronic textiles [1][2][7]. Group 1: Technology and Innovation - The research team has successfully created a new type of information processor called fiber chips, which are highly flexible and can adapt to complex deformations, offering advantages over traditional silicon-based chips [1][2]. - The proposed "multi-layer stacking architecture" allows for the construction of integrated circuits within the fiber, maximizing the use of internal space and potentially achieving a transistor integration level of millions within a one-meter-long fiber chip [3][4]. - The team developed a method to directly photolithograph high-density integrated circuits on elastic polymer fibers, overcoming challenges related to the rough surface and deformation of the fibers [4][5]. Group 2: Applications and Future Prospects - Fiber chips are expected to enable a transition from embedded to woven smart systems, with potential applications in electronic textiles that integrate power generation, storage, sensing, display, and information processing [7]. - In the field of brain-machine interfaces, fiber chips can integrate high-density sensing/stimulation electrode arrays and signal preprocessing circuits within a fiber as small as 50 micrometers in diameter, enhancing the safety and efficacy of implants [7]. - The team aims to collaborate with scholars from various disciplines to further enhance device integration density and information processing performance, while establishing a proprietary intellectual property system for scalable production and application [8].

Core Viewpoint - Apple reported strong quarterly results but CEO Tim Cook indicated a need to reset expectations due to supply constraints and rising component costs [1][4][5]. Financial Performance - Apple achieved revenue of $143.8 billion, a 16% increase year over year, and diluted EPS of $2.84, up 19% year over year, with a net income of $42.1 billion [6]. - The gross margin was reported at 48.2%, exceeding guidance, and operating cash flow reached a record $53.9 billion [6]. - Segment sales included iPhone at $85.3 billion (+23%), Services at $30.0 billion (+14%), Mac at $8.4 billion (-7%), iPad at $8.6 billion (+6%), and Wearables/Home/Accessories at $11.5 billion (-2%) [6]. Supply Chain and Component Costs - Cook highlighted that Apple is in "supply chase mode" due to advanced chip constraints and rising memory prices, which are expected to persist for several years [2][8]. - The memory market is experiencing record demand, with companies like SanDisk seeing stock increases of 1,230% in the past six months [3]. - Apple is facing challenges in balancing supply and demand, with Cook noting that demand is currently outpacing Apple's planning [7][8]. Market Outlook - For the upcoming March quarter, Apple anticipates revenue growth of 13% to 16% year over year and a gross margin between 48% and 49% [6]. - Analysts remain optimistic about Apple's stock, with average price targets suggesting significant upside potential, ranging from $280 to $330 [19]. Pricing Strategy - Apple's pricing strategy for the iPhone has historically shown resilience, with demand remaining strong even at higher price points [14][15]. - Consumer sentiment indicates that while many perceive iPhones as overpriced, a notable percentage still consider them worth the investment despite financial constraints [17].

Core Insights - The global IPO market is showing signs of recovery in 2026, with an increase in listing projects across multiple exchanges, particularly in AI, hard technology, energy, and advanced manufacturing sectors, indicating a potential restoration of risk appetite in capital markets [1][2] - However, this IPO wave does not align with typical characteristics of past cyclical recoveries, as the types of companies successfully pursuing IPOs have significantly changed [2][4] Changes in Company Types - Companies that can successfully advance to IPOs are now concentrated in a few high-capital-density industries with long investment cycles and strong policy connections, while many light-asset and narrative-driven companies remain outside the listing doors [2][4] Shifts in IPO Pricing Logic - The pricing logic for IPOs is shifting from a focus on "growth potential" to prioritizing strategic necessity, cash flow verifiability, and long-term capital sustainability due to high interest rates and geopolitical factors [3][11] - This indicates a transition of IPOs from a "market reward mechanism" to a strategic asset selection and pricing mechanism [4][15] Strategic IPOs - A new category of "strategic IPOs" is emerging, characterized by companies that are critical to industry chains, have capital-intensive operations with verifiable cash flow paths, and are closely tied to national development goals or global industrial patterns [12][14] - The existence of these companies is deemed essential, leading to a higher threshold for IPO eligibility, as capital markets now differentiate between "replaceable product innovation" and "irreplaceable system capabilities" [14][15] Market Differentiation - The 2026 IPO landscape is not a uniform recovery but rather a highly differentiated and selective return, with capital becoming more concentrated and cautious [4][16] - Different markets are pricing entirely different types of assets, reflecting their unique industrial structures, policy goals, and capital systems [17][18] Regional Insights - In the U.S. market, IPOs are focused on "future infrastructure" pricing, with companies embedded in national or global systems receiving significant premiums [20][21] - In China, IPOs serve as an extension of industrial policy rather than a reflection of market sentiment, with a focus on companies that align with long-term industrial frameworks [21][22] - Emerging markets like India are selling long-term options based on population and digital penetration, with a different pricing logic compared to the U.S. and China [22][29] Conclusion - The 2026 IPO market represents a structural reset rather than a mere emotional recovery, emphasizing the need for companies to demonstrate long-term viability and strategic importance to be recognized as worthy of public capital [75][81]

Core Viewpoint - Nvidia plans to make a "huge" investment in OpenAI, which could become the largest investment in Nvidia's history, despite previous doubts within the company about the deal [1][3]. Group 1: Investment Details - Nvidia announced plans to invest up to $100 billion in OpenAI, which will provide substantial funding and support for OpenAI to acquire advanced chips and maintain its leading position in a competitive market [3]. - CEO Jensen Huang confirmed that Nvidia will participate in the current funding round led by OpenAI's CEO Sam Altman, emphasizing confidence in OpenAI's achievements and influence [3]. Group 2: Company Sentiment - Huang denied any dissatisfaction with OpenAI, countering rumors that suggested internal skepticism about the investment [1][3].

公众号记得加星标⭐️，第一时间看推送不会错过。 一个简化的AI加速器架构展示了这两个领域如何共存。在计算层，加速器通过高带宽铜缆链路向上连 接到L1计算交换机。这些是典型的纵向扩展连接：短距离、高密度，并针对以最小延迟传输海量数 据进行了优化。L1交换机之间也通过铜缆互连，形成一个紧密耦合的网络结构，使得多个加速器在 软件层面上几乎可以像一个大型设备一样运行。 随着流量向上层级传输，它会汇聚到与更广泛的数据中心网络连接的二层网络交换机。在这个层级， 光插拔设备占据主导地位，因为系统必须支持更远的传输距离、更高的端口数量以及可扩展的带宽增 长。 这两个领域面临的日益严峻的挑战是，尽管电信号串扰器（SerDes）仍在不断发展，但其系统层面的 限制却日益增多。在硅芯片上，SerDes 的容量持续从 112G 扩展到 224G PAM4 及更高。然而，随 着数据速率的提升，包括封装、基板、PCB 走线、连接器和电缆在内的电气通道逐渐成为瓶颈。为 了在远距离传输中保持信号完整性，需要越来越强大的均衡和数字信号处理（DSP）能力，这会导致 每比特功耗增加，并增加热负载。 对于拥有数千条SerDes通道的大型AI交换机和加 ...