A14工艺

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台积电惊爆:世界最先进EUV光刻机只卖了5台!
是说芯语· 2025-05-31 10:07
5月29日消息,近日,台积电重申,1.4nm级工艺技术不需要高数值孔径(High-NA)EUV光刻机,目前 找不到非用不可的理由。 台积电在阿姆斯特丹举行的欧洲技术研讨会上重申了其长期以来对下一代高NA EUV光刻设备的立场。 该公司的下一代工艺技术,包括A16(1.6纳米级)和A14(1.4纳米级)工艺技术,不需要这些最高端的 光刻系统。 因此,台积电不会在这些节点上采用高数值孔径EUV设备。 "人们似乎总是对台积电何时会使用高数值孔径 (High-NA) 感兴趣,我认为我们的答案很简单,"台积电 副联席首席运营官兼业务发展和全球销售高级副总裁张晓强 (Kevin Zhang) 在活动上表示。 "只要我们发现高数值孔径 (High-NA) 能够带来有意义的、可衡量的效益,我们就会采用。对于A14 来 说,我之前提到的性能提升在不使用高数值孔径的情况下也非常显著。因此,我们的技术团队正在持续 寻找延长现有EUV寿命的方法,同时获得微缩优势。" 台积电的A14工艺基于其第二代纳米片环栅晶体管 (Nanosheet Gate-All-Accepted Transistor),以及全新的 标准单元架构。 据了解,A ...
1.4nm,巅峰之争
半导体行业观察· 2025-05-03 02:05
Core Viewpoint - The article discusses the competitive landscape in semiconductor manufacturing, focusing on advancements by TSMC and Intel in their respective processes and technologies, particularly in the context of the A14 process node and High NA EUV lithography. TSMC Developments - TSMC is transitioning from FinFET to Nanosheet technology, with a focus on CFET (Complementary FET) devices for further miniaturization and power reduction [1][3] - TSMC showcased its first CFET transistor with a gate pitch of 48nm at the 2023 IEDM, marking a significant milestone in CFET technology [3] - The company is also exploring new interconnect technologies to enhance performance, including new via schemes and materials like graphene to reduce resistance and coupling capacitance [7] Intel Innovations - Intel's upcoming 14A process node, set for risk production in 2027, aims to reduce power consumption by up to 35% and improve performance per watt by 15% to 20% compared to the 18A node [8][9] - The introduction of Turbo Cell technology is designed to optimize critical paths in CPU and GPU designs, enhancing overall performance without compromising power efficiency [10][12] - Intel plans to utilize High NA EUV lithography for its 14A process, despite concerns over cost and complexity, while also maintaining a Low NA EUV alternative to mitigate risks [13][19] High NA EUV Strategy - TSMC has decided not to use High NA EUV for its A14 process due to cost concerns, opting for traditional 0.33 NA EUV technology instead [13][14] - Intel has installed a High NA EUV lithography machine and is committed to exploring its use in the 14A process, while ensuring compatibility with existing design rules to alleviate customer concerns [15][17] - The article highlights the ongoing debate over the cost-effectiveness of High NA EUV versus Low NA EUV, with Intel asserting that both processes can achieve similar yields [17][18]