Core Viewpoint - TSMC is advancing its 1.4nm process technology with significant investments and plans for new facilities, positioning itself as a leader in the semiconductor industry [2][3][12]. Group 1: Investment and Expansion Plans - TSMC's new factory in Central Taiwan is set to begin construction in October, with an estimated total investment of between NT$1.2 trillion (approximately RMB 233.8 billion) and NT$1.5 trillion (approximately RMB 350.8 billion) [2]. - The new facility will include four buildings, with the first expected to complete risk trial production by the end of 2027 and commence mass production in the second half of 2028, potentially generating over NT$500 billion (approximately RMB 116.9 billion) in revenue [2][3]. - TSMC is also planning to build a 1nm advanced process base in Nansha Lun, with an estimated land area of 500 hectares, capable of accommodating up to 10 wafer fabs [3]. Group 2: Technological Advancements - TSMC's A14 process technology, based on second-generation nanosheet gate-all-around transistors, is expected to achieve up to 15% speed improvement at the same power level or a 30% reduction in power consumption at the same speed compared to the N2 process [5][7]. - The A14 technology will enhance logic density by over 20%, showcasing TSMC's commitment to maintaining technological leadership [5][7]. - TSMC plans to introduce the A14 technology in 2028, with potential future versions (A14P and A14X) expected to be released in 2029 [9][11]. Group 3: Competitive Landscape - TSMC's 2nm process is on track for mass production in Q4 2025, with significant demand from major clients such as Apple, AMD, Qualcomm, and Intel, indicating a strong market position [13][14]. - Despite competition from companies like Samsung and Japan's Rapidus, TSMC continues to advance its process technology without disruption, maintaining a leading edge in the semiconductor market [14][16]. - TSMC's production capabilities and customer diversity allow it to support the development and mass production of advanced technologies, further solidifying its market dominance [16].

Core Viewpoint - TSMC reaffirms that its 1.4nm process technology does not require high numerical aperture (High-NA) EUV lithography machines, stating that there is currently no compelling reason to use them [1][2] Group 1 - TSMC's next-generation process technologies, including A16 (1.6nm) and A14 (1.4nm), will not utilize High-NA EUV equipment [1] - TSMC's A14 process technology boasts a performance improvement of up to 15% at the same power and complexity, or a power reduction of 25% to 30% at the same frequency [2] - TSMC is continuously exploring ways to extend the lifespan of existing EUV technology while achieving miniaturization advantages [1][2] Group 2 - The latest High-NA EUV lithography machines from ASML are the most advanced in the world, with a price tag of $400 million, making them prohibitively expensive for many manufacturers [2] - As of now, ASML has delivered a total of 5 High-NA EUV machines to clients, including Intel and Samsung [2] - Intel is set to receive the world's first High-NA EUV lithography machine in December 2023 [2]

Core Viewpoint - The article discusses the competitive landscape in semiconductor manufacturing, focusing on advancements by TSMC and Intel in their respective processes and technologies, particularly in the context of the A14 process node and High NA EUV lithography. TSMC Developments - TSMC is transitioning from FinFET to Nanosheet technology, with a focus on CFET (Complementary FET) devices for further miniaturization and power reduction [1][3] - TSMC showcased its first CFET transistor with a gate pitch of 48nm at the 2023 IEDM, marking a significant milestone in CFET technology [3] - The company is also exploring new interconnect technologies to enhance performance, including new via schemes and materials like graphene to reduce resistance and coupling capacitance [7] Intel Innovations - Intel's upcoming 14A process node, set for risk production in 2027, aims to reduce power consumption by up to 35% and improve performance per watt by 15% to 20% compared to the 18A node [8][9] - The introduction of Turbo Cell technology is designed to optimize critical paths in CPU and GPU designs, enhancing overall performance without compromising power efficiency [10][12] - Intel plans to utilize High NA EUV lithography for its 14A process, despite concerns over cost and complexity, while also maintaining a Low NA EUV alternative to mitigate risks [13][19] High NA EUV Strategy - TSMC has decided not to use High NA EUV for its A14 process due to cost concerns, opting for traditional 0.33 NA EUV technology instead [13][14] - Intel has installed a High NA EUV lithography machine and is committed to exploring its use in the 14A process, while ensuring compatibility with existing design rules to alleviate customer concerns [15][17] - The article highlights the ongoing debate over the cost-effectiveness of High NA EUV versus Low NA EUV, with Intel asserting that both processes can achieve similar yields [17][18]