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黄仁勋:SRAM无法取代HBM
半导体芯闻· 2026-01-08 10:36
Core Viewpoint - NVIDIA's CEO Jensen Huang emphasized the ongoing necessity of HBM (High Bandwidth Memory) despite the advantages of SRAM (Static Random Access Memory) and other cost-saving solutions for AI workloads, indicating that each memory type has its own strengths and limitations [1][2]. Group 1: Memory Technology Insights - Huang noted that while SRAM can significantly enhance efficiency for certain workloads, its capacity limitations may hinder its effectiveness in large-scale AI production environments compared to HBM, which offers better bandwidth and density [1][2]. - The transition of workload pressures among different memory types and interconnects is dynamic, with varying demands based on the architecture of AI models, such as mixed expert models and multi-modal models [2]. Group 2: Market Dynamics and Cost Considerations - Despite customer complaints regarding the costs of HBM and GPUs, Huang believes there is no inherent conflict between these costs and the demand for advanced memory solutions, suggesting that the market for NVIDIA's products remains robust [3].
SRAM是什么?和HBM有何不同?
半导体芯闻· 2026-01-04 10:17
Core Viewpoint - Nvidia's investment of $20 billion in acquiring Groq's Language Processing Unit (LPU) technology highlights the rising importance of SRAM in the AI, server, and high-performance computing (HPC) sectors, shifting the focus from mere capacity to speed, latency, and energy consumption [1][5]. Group 1: SRAM and HBM Comparison - SRAM (Static Random Access Memory) is characterized by high speed and low latency, commonly used within CPUs, GPUs, and AI chips. It is volatile, meaning data is lost when power is off, and it does not require refreshing, making it suitable for immediate data processing [3][4]. - HBM (High Bandwidth Memory) is an advanced type of DRAM that utilizes 3D stacking and through-silicon vias (TSV) to connect multiple memory layers to logic chips, offering high bandwidth (up to several TB/s) and lower power consumption compared to traditional DRAM, but with higher costs and complexity [4][6]. Group 2: Shift in Market Demand - The focus in AI development has shifted from computational power to real-time inference capabilities, driven by applications such as voice assistants, translation, customer service, and autonomous systems, where high latency is a critical concern [6]. - Nvidia's acquisition of Groq's technology is not just about enhancing AI accelerator capabilities but is fundamentally linked to SRAM's strengths in providing extremely low-latency memory access, which is essential for real-time AI applications [5][6].
突破“存储墙”,三路并进
3 6 Ke· 2025-12-31 03:35
前言 近年来,AI与高性能计算的爆发式增长,正推动计算需求呈指数级攀升。从ChatGPT的横空出世到Sora带来的视觉震撼,大规模AI模型不仅在参数规模上 指数级膨胀,其对计算能力的需求更是呈现出令人惊叹的增长曲线。 然而,在这片繁荣的背后,一个日益严峻的挑战正浮出水面——"存储墙"。 从千亿参数的大语言模型到边缘端的智能终端,各类应用对存储器的性能、功耗、面积(PPA)提出了前所未有的严苛要求。存储"带宽墙"成为制约AI计 算吞吐量与延迟的核心瓶颈,传统存储器技术已难以满足系统能效优化需求,巨大的性能缺口正制约着AI芯片发挥其全部潜力。 作为全球半导体制造的领导者,台积电深刻洞察到这一根本性矛盾。在2025年的IEDM(国际电子器件会议)教程中,台积电清晰指出:未来AI与高性能 计算芯片的竞争,将不仅仅是晶体管密度与频率的竞赛,更是内存子系统性能、能效与集成创新的综合较量。 AI算力狂奔下,存储"带宽墙"成核心痛点 AI模型的进化史,堪称一场对算力与存储的极限压榨。 从早期的AlexNet到如今的GPT-4、Llama2、PaLM,模型参数从百万级跃升至万亿级,模型规模的扩张直接带动训练与推理阶段的计算量( ...
突破“存储墙”,三路并进
半导体行业观察· 2025-12-31 01:40
Core Viewpoint - The article discusses the exponential growth of AI and high-performance computing, highlighting the emerging challenge of the "storage wall" that limits the performance of AI chips due to inadequate memory bandwidth and efficiency [1][2]. Group 1: AI and Storage Demand - The evolution of AI models has led to a dramatic increase in computational demands, with model parameters rising from millions to trillions, resulting in a training computation increase of over 10^18 times in the past 70 years [2]. - The performance of any computing system is determined by its peak computing power and memory bandwidth, leading to a significant imbalance where hardware peak floating-point performance has increased 60,000 times over the past 20 years, while DRAM bandwidth has only increased 100 times [5][8]. Group 2: Memory Technology Challenges - The rapid growth in computational performance has not been matched by memory bandwidth improvements, creating a "bandwidth wall" that restricts overall system performance [5][8]. - AI inference scenarios are particularly affected, with memory bandwidth becoming a major bottleneck, leading to idle computational resources as they wait for data [8]. Group 3: Future Directions in Memory Technology - TSMC emphasizes that the evolution of memory technology in the AI and HPC era requires a comprehensive optimization across materials, processes, architectures, and packaging [12]. - The future of memory architecture will focus on "storage-compute synergy," transitioning from traditional on-chip caches to integrated memory solutions that enhance performance and efficiency [12][10]. Group 4: SRAM as a Key Technology - SRAM is identified as a critical technology for high-performance embedded memory due to its low latency, high bandwidth, and energy efficiency, widely used in various high-performance chips [13][20]. - TSMC's SRAM technology has evolved through various process nodes, with ongoing innovations aimed at improving density and efficiency [14][22]. Group 5: Computing-in-Memory (CIM) Innovations - CIM architecture represents a revolutionary approach that integrates computing capabilities directly within memory arrays, significantly reducing data movement and energy consumption [23][26]. - TSMC believes that Digital Computing-in-Memory (DCiM) has greater potential than Analog Computing-in-Memory (ACiM) due to its compatibility with advanced processes and flexibility in precision control [28][30]. Group 6: MRAM Developments - MRAM is emerging as a viable alternative to traditional embedded flash memory, offering non-volatility, high reliability, and durability, making it suitable for applications in automotive electronics and edge AI [35][38]. - TSMC's MRAM technology meets stringent automotive requirements, providing robust performance and longevity [41][43]. Group 7: System-Level Integration - TSMC advocates for a system-level approach to memory and compute integration, utilizing advanced packaging technologies like 2.5D/3D integration to enhance bandwidth and reduce latency [50][52]. - The future of AI chips may see a blurring of the lines between memory and compute, with tightly integrated architectures that optimize energy efficiency and performance [58][60].
北京君正:公司SRAM主要用于车规、工业和医疗等市场
Zheng Quan Ri Bao Wang· 2025-12-30 11:12
证券日报网讯12月30日,北京君正(300223)在互动平台回答投资者提问时表示,公司SRAM主要用于 车规、工业和医疗等市场,产品可以替换瑞萨、英飞凌相关产品。 ...
北京君正(300223.SZ):公司的SRAM为独立芯片,目前未提供片上SRAM IP业务
Ge Long Hui· 2025-12-30 08:52
格隆汇12月30日丨北京君正(300223.SZ)在投资者互动平台表示,公司的SRAM为独立芯片,目前未提供 片上SRAM IP业务。 ...
北京君正:公司的SRAM为独立芯片 目前未提供片上SRAM IP业务
人民财讯12月30日电,北京君正(300223)12月30日在互动平台表示,公司的SRAM为独立芯片,目前 未提供片上SRAM IP业务。 ...
老黄200亿「钞能力」回应谷歌:联手Groq,补上推理短板
3 6 Ke· 2025-12-28 08:21
Jay 发自 凹非寺量子位 | 公众号 QbitAI 老黄稳准狠,谷歌的TPU威胁刚至,就钞能力回应了。 推理方面,Groq LPU的速度远超GPU、TPU,以及目前所见的任何ASIC。 200亿美元说砸就砸,只为拉拢一家炙手可热的「铲子新工厂」——Groq。 这无疑也标志这家芯片巨头,面向AI新时代的一次重大布局。但在某种程度上,也的确反映出老黄对包括TPU在内等一众新芯片范式的担忧。 所以,Groq究竟能为英伟达带来什么? 针对这个问题,知名科技投资人Gavin Baker发表了自己的观点。 而他的这一连串技术剖析,纷纷指向了英伟达帝国防守最薄弱的那块领土——推理。 Gavin Baker 这一观点得到大量网友点赞: GPU架构根本无法满足推理市场对低延迟的需求,片外HBM显存速度实在太慢了。 先看prefill: 网友观点 但也有网友指出,LPU所采用的SRAM,或许并不能胜任长下文decode。 对此,Gavin认为英伟达可以通过产品「混搭」的方式解决。 Gavin Baker 下面具体来看—— Groq:英伟达斥200亿美元购入的一剂疫苗 Gavin认为,GPU在新时代水土不服的根本原因在于——推理 ...
一图了解SRAM概念股
Xuan Gu Bao· 2025-12-25 06:43
| 纳思达 | 264.15 | 公司旗下极海半导体综合市场需求推出的高性能、 适配型MCU系列新品,采用55nm工艺制程,拥有 | | --- | --- | --- | | | | 容量Flash、SRAM以及丰富片内外设 | | 复旦微电 | 401.40 | 公司FPGA类芯片聚焦在SRAM型FPGA | | 北京君正 | 450.81 | 公司在SRAM企业排名中排全球第二、国内第 | | | | 在全球车规级SRAM供应商中排名第- | | 东芯股份 | 535.21 | 公司的控股子公司Fidelix曾经有SRAM产品的研发 | | | | 销售,具有相应的技术储备 | | 华大九天 | 589.35 | 公司具有存储电路设计全流程EDA工具系统,支持 | | | | 括SRAM在内的多款存储器 | | 兆易创新 | 1496.64 | 低功耗SRAM此前是公司核心产品 | SRAM概念股 12月24日,媒体报道称英伟达支付约200亿美元现金,获得了Gr 理技术知识产权和相关资产。据悉,Groq LPU的工作原理与英f 同,它采用了名为时序指令集计算机架构,使用存储器为静态随 (SRAM),其速 ...
南方基金郑晓曦:半导体设备处于高速成长中早期 未来三年或进入右侧收获期
Core Viewpoint - The semiconductor equipment sector is experiencing a high growth cycle driven by domestic controllability policies and AI technology, with a year-to-date index increase of 57.28% [1] Investment Framework - The investment framework is divided into three levels: industry prosperity cycle (40%-50% weight), company fundamentals (30%-40% weight), and valuation level [2][3] - The semiconductor equipment sector has completed its initial breakthrough and is entering a high growth phase, making it an ideal investment opportunity [2] Semiconductor Equipment Sector Outlook - The semiconductor equipment sector is in the early to mid-stage of a high growth cycle, supported by domestic policies and increasing demand from wafer fabs for mid-to-high-end equipment [4] - The dual drivers of domestic controllability policies and AI applications are expected to sustain the growth of the semiconductor equipment sector over the next three years [5] Investment Opportunities - The increase in domestic production rates and AI-driven demand are seen as key sources of excess returns, with companies successfully positioned in the AI supply chain expected to have significant growth potential [6] - The advanced packaging sector is also viewed positively, as it becomes crucial for enhancing chip performance amid the slowdown of Moore's Law [5][6] Market Dynamics - The storage chip sector is anticipated to experience a high growth cycle due to expansion, with expectations for acceleration in mid to late 2026 [6] - Caution is advised for stocks heavily reliant on price rebounds, particularly in the DRAM market, where prices have more than doubled since last year [7]