Core Viewpoint - The integration of semiconductor and optoelectronic technologies is becoming a central theme in industry development, driven by the post-Moore era and the explosive demand for AI computing power, emphasizing the importance of collaboration across the entire industry chain [1][3]. Group 1: Forum Insights - The "Industry Collaboration and Communication Upgrade" forum gathered top experts and industry leaders to discuss core topics across the semiconductor and optoelectronic fields, sharing cutting-edge technological achievements and insights into industry development opportunities [3]. - The forum highlighted the need for collaborative innovation across materials, devices, packaging, testing, and system applications to inject new ideas and directions for high-quality industry development [3]. Group 2: Two-Dimensional Semiconductors - Two-dimensional semiconductors are identified as a key technology in the post-Moore era, offering significant advantages over silicon-based semiconductors, including reduced difficulty and cost in advanced processes [6][7]. - Major companies like TSMC, Intel, and Samsung are actively investing in two-dimensional semiconductor technology, which is expected to be integrated into heterogeneous systems after the 1nm node, with potential low-power applications by 2029 [6][7]. - Original Microelectronics has launched China's first engineering demonstration line for two-dimensional semiconductors, with plans for small-batch production of 90nm CMOS processes by September this year [7]. Group 3: Silicon Photonics - Silicon photonics technology is poised for explosive growth, driven by the demand for high-speed AI interconnects, with the market for 1.6T products expected to reach $4.5 billion by 2028 [10]. - The establishment of an 8-inch low-loss silicon nitride production platform has enabled the mass production of silicon photonic chips, addressing key challenges in traditional silicon photonics [10][11]. Group 4: Capacitor Innovations - Silicon capacitors are emerging as a solution to energy integrity challenges in AI applications, with a projected market size of $11.7 billion by 2027 [14]. - Their superior temperature stability and long lifespan make them ideal for high-density power delivery networks in AI chips and optical modules [14]. Group 5: Optical Interconnects - Optical interconnects are seen as a solution to the bandwidth, power, and topology challenges faced by traditional electrical interconnects, with the optical interconnect market expected to exceed $23 billion by 2025 [21]. - Companies are developing integrated optical solutions to enhance bandwidth and reduce power consumption, with significant advancements in optical computing technologies [21][22]. Group 6: Advanced Packaging - The "EDA+" paradigm is proposed to address the limitations of traditional EDA tools in advanced packaging, enabling collaborative design across multiple chiplets and layers [24][25]. - This new approach supports various packaging forms and integrates multiple physical field analyses, enhancing the efficiency of heterogeneous integration in chip design [24][25]. Group 7: Photonic Chips for AI and Quantum Computing - Photonic chips are positioned as a core hardware support for AI and quantum computing, with significant advantages in bandwidth and energy efficiency [36][37]. - The development of a fully controllable technology system based on lithium niobate thin films aims to facilitate the mass production of photonic chips for various applications [36][37]. Group 8: Testing Innovations - The transition from hardware to software-defined testing solutions is reshaping the testing and measurement industry, with platforms like Moku enabling customizable instrument solutions [28][29]. - High-speed oscilloscopes are being developed to meet the rigorous testing demands of optical communication technologies, ensuring reliable performance in high-speed applications [40][41]. Conclusion - The forum underscored the importance of collaborative innovation across the semiconductor and optoelectronic industries, addressing the core demands of computing power and communication upgrades in the post-Moore era, while outlining a clear blueprint for future industry development [42].

Core Insights - The traditional logic of Moore's Law is facing fundamental challenges as semiconductor components shrink to nanoscale, particularly below 3 nanometers, where silicon materials approach physical limits [2][3] - The global semiconductor industry is pursuing two paths: "continuing Moore's Law" through structural innovation within silicon, and "beyond Moore's Law" by exploring new materials and architectures, with two-dimensional semiconductors seen as a promising direction [3][4] Industry Developments - A team from Fudan University has developed the world's first 32-bit RISC-V architecture microprocessor, "WUJI," based on two-dimensional semiconductor materials, achieving an integration of 5,900 transistors [4][6] - The team aims to transition from academic research to engineering applications, focusing on scaling up from thousands to millions of transistors while addressing yield, cost, and process stability challenges [6][12] Engineering and Production - The newly established engineering demonstration line in Shanghai represents a significant step towards industrial production of two-dimensional semiconductors, aiming to achieve a scale of at least 1 million transistors [6][12] - The current demonstration line operates at a silicon-based process node of approximately 180 nanometers, which is considered relatively outdated but manageable for a startup [12] Competitive Landscape - Major global semiconductor companies like TSMC, Samsung, and Intel are also investing in two-dimensional semiconductors as potential successors to silicon at the 1-nanometer node, indicating a competitive landscape [8][13] - The domestic team recognizes the urgency to advance from research to industrialization to avoid losing competitive advantages to established semiconductor giants [13] Technological Challenges - The transition from research prototypes to commercially viable products involves overcoming significant technical bottlenecks, particularly in achieving acceptable performance, yield, and reliability for two-dimensional semiconductor chips [11][15] - The introduction of AI-driven integrated process optimization is seen as a crucial method to enhance manufacturing efficiency and yield in the complex chip production process [14][16] Future Plans - The company plans to focus on establishing standards and processes for two-dimensional materials, collaborating with various stakeholders to create a complete industrial ecosystem [15] - Funding from recent financing rounds will be directed towards talent acquisition, cleanroom construction, equipment procurement, and process development to accelerate the transition from laboratory to industrial production [16]

Group 1 - The new oxy-MOCVD technology developed by Nanjing University and Southeast University addresses the kinetic bottleneck in the mass production of two-dimensional semiconductors, enhancing precursor reaction rates by over 1000 times [1] - The "Point Stone to Crystal" technology, set to be published in 2025, establishes a complete technical route of "substrate engineering + kinetic regulation," providing core support for the mass production of two-dimensional semiconductors and building a competitive advantage in next-generation semiconductor technology [1] - Two-dimensional semiconductors, recognized as a key solution to the challenges posed by the physical limits of Moore's Law, offer atomic-level thickness, which can surpass the physical limits of silicon-based materials and provide new pathways for chip development in the post-Moore era [1] Group 2 - The two-dimensional-silicon hybrid architecture flash memory technology is expected to disrupt traditional memory systems, enabling general-purpose memory to replace multi-level hierarchical storage architectures, thus providing faster and more energy-efficient data support for cutting-edge fields like artificial intelligence and big data [1] - Two-dimensional flash memory is poised to become the standard storage solution in the AI era, highlighting its significance in the semiconductor industry [1]

Core Insights - The research teams from Southeast University and Nanjing University have achieved a significant breakthrough in the mass production of two-dimensional (2D) semiconductor single crystals using metal-organic chemical vapor deposition technology with an oxygen-assisted strategy [1][2]. Group 1: Technological Advancements - The new method addresses traditional challenges in 2D semiconductor production, such as carbon contamination, small crystal domain sizes, and low mobility [1]. - By introducing oxygen into the growth process and innovatively designing a pre-reaction chamber structure, the energy barrier for reactions was significantly lowered, increasing the precursor reaction rate by over 1000 times [1]. Group 2: Production Improvements - The new approach has dramatically enhanced the growth rate of molybdenum disulfide crystal domains, increasing the average size from the nanometer scale to several hundred micrometers, and ensuring ordered alignment along specific crystal directions [1]. - This advancement resolves the mass production challenge of achieving uniform growth over large areas and effectively suppresses the formation of carbon-containing intermediates, thereby eliminating carbon contamination issues [1]. Group 3: Industry Implications - This breakthrough lays a material foundation for the large-scale application of 2D semiconductors in integrated circuits, flexible electronics, and sensors [2].

Core Viewpoint - The future of microelectronics hinges on the miniaturization of chips, with a focus on developing smaller and more energy-efficient semiconductors to meet the demands of AI and smart devices [2][4]. Group 1: Emerging Technologies - Two-dimensional (2D) semiconductors are emerging as a groundbreaking technology that can surpass the limitations of traditional silicon, offering unprecedented speed, efficiency, and miniaturization [4][5]. - These materials, only a few atoms thick, allow for stacking chips like paper, enabling engineers to integrate more processing power in smaller spaces [4][5]. Group 2: Research and Development - The research team, led by Professor Tongay, is exploring atomic-scale materials to create, test, and optimize new semiconductor materials, aiming to prove that 2D materials can compete with and even exceed the performance of established silicon technologies [4][5]. - Advanced methods such as Pulsed Laser Deposition (PLD) and Plasma-Enhanced Chemical Vapor Deposition (PECVD) are being utilized to grow these ultra-thin materials with high precision [6]. Group 3: Industry Implications - The work being done addresses a critical industry challenge: how to expand advanced chip capabilities while reducing power consumption, with future AI processors potentially consuming over 10 kilowatts [5][6]. - The collaboration between Arizona State University and Applied Materials Inc. aims to bring these innovations from concept to practical application, potentially transforming the microelectronics industry [6].

Core Viewpoint - The article discusses a £6 million EPSRC-funded project led by Queen Mary University of London, Nottingham University, and Glasgow University, aimed at developing energy-efficient two-dimensional (2D) materials and devices to significantly reduce the power consumption of AI data centers and high-performance computing [1][2]. Group 1: Project Overview - The project, named "NEED2D," focuses on creating atomic-thin semiconductors that can reduce energy consumption in AI data centers by over 90%, thereby lowering electricity costs and aiding in achieving net-zero targets [1][2]. - The initiative involves collaboration with over 20 partners contributing more than £2 million, aiming to establish a new electronic industry in the UK that leverages innovative 2D semiconductors [1][2]. Group 2: Energy Demand and Future Vision - The UK's electricity demand from data centers is projected to increase sixfold by 2034, reaching 30% of total electricity consumption, which poses a threat to climate goals [2]. - Leading semiconductor companies, including TSMC, Intel, and Samsung, recognize 2D materials as a future trend, with a vision for the UK to become a global leader in ultra-low-energy 2D devices by 2040 [2]. Group 3: Technological Advancements - The new 2D materials, such as graphene and its derivatives, exhibit superior charge transport efficiency compared to silicon, making them ideal for low-power computing and reducing heat waste [2][3]. - The project aims to advance the precision engineering of 2D semiconductors, exploring their unique electronic properties at the atomic scale [3]. Group 4: Economic and Environmental Impact - The transition to low-power 2D transistors is expected to enhance the UK's attractiveness for tech investments and demonstrate the economic potential of energy transition [4]. - The research is anticipated to help the UK meet its climate goals while establishing a revolutionary new microelectronics industry, creating jobs and reducing electricity costs [5].

如果您希望可以时常见面，欢迎标星收藏哦~ 来源：内容编译自miragenews ，谢谢 。 英国伦敦玛丽女王大学、诺丁汉大学和格拉斯哥大学的科学家团队获得了一项价值600万英镑的 EPSRC项目资助，该项目名为"利用超低能耗二维材料和器件（NEED2D）实现净零排放和人工智 能革命"。该项目将开发节能、原子级厚度的半导体，以大幅降低人工智能数据中心和高性能计算 的电力需求。 该团队由伦敦玛丽女王大学牵头，将与众多制商和多家研究机构（超过20个合作伙伴为该项目贡 献超过200万英镑）合作，开发新材料并制造晶体管等革命性的低能耗电子设备原型。这将使英国 能够利用创新的二维半导体，打造一个超越传统材料的全新电子产业。 该项目负责人、伦敦玛丽女王大学材料科学教授科林·汉弗莱斯爵士表示："世界各国政府正斥资数 十亿美元建设风能、太阳能、核能和天然气发电站，以满足人工智能数据中心巨大的能源需求。我 们的方法是从源头上解决问题：首先减少这些中心的能源消耗。" 为此，我们将使用最新的二维材料，其厚度仅为原子级。这将节省数据中心和计算机90%以上的能 源需求，降低电力成本，并有助于实现"净零"目标。 人工智能的能源需求正以惊人 ...

Core Viewpoint - A team of 30 scientists from the Indian Institute of Science (IISc) has proposed the development of "angstrom-level" chips, significantly smaller than the current smallest chips, to enhance India's position in the semiconductor industry [1][2]. Group 1: Proposal Details - The proposal aims to develop chips using new semiconductor materials known as two-dimensional materials, which could reduce chip size to one-tenth of the current smallest chips produced globally [1]. - The current smallest chips are produced using 3-nanometer nodes by companies like Samsung and TSMC [1]. - The detailed project report (DPR) was initially submitted in April 2022 and revised for resubmission in October 2024, indicating ongoing governmental discussions [1][3]. Group 2: Government and Industry Response - The Indian Ministry of Electronics and Information Technology (MeitY) is positively inclined towards the project, exploring electronic applications for the proposed technology [2]. - India's semiconductor manufacturing heavily relies on foreign companies, making this project strategically significant for economic and national security [2]. - The largest semiconductor project in India, a collaboration between Tata Electronics and Taiwan's TSMC, has an investment of ₹910 billion and has received government approval for 50% funding support [2]. Group 3: Funding and Global Context - The IISc-led proposal requests ₹5 billion over five years for developing indigenous semiconductor technology, which is relatively modest compared to other global investments [2]. - Countries like Europe and South Korea have invested significantly in two-dimensional materials, with Europe exceeding $1 billion (approximately ₹83 billion) [2]. - The urgency for India to act is emphasized, as global tech companies are shifting focus towards two-dimensional semiconductors, and the window for India to execute this proposal may close soon [3].

如果您希望可以时常见面，欢迎标星收藏哦~ 印度电子和信息技术部（MeitY）的消息人士证实，该提案正在讨论中。 一位知情官员表示："印 度半导体技术与创新部（MeitY）对该项目持积极态度。首席科学顾问兼秘书长已就此举行会议。 MeitY正在探索可部署此类技术的电子应用。这是一项合作项目，每一步都需要尽职调查。" 印度目前在半导体制造方面严重依赖外国企业——这项技术从经济和国家安全角度来看都具有战略 意义。该国最大的半导体项目由塔塔电子与台湾力积电合作设立，投资额达9100亿卢比。该项目 已获得印度半导体计划的批准，并有资格获得政府50%的资金支持。相 比之下，印度理工学院（IISc）牵头的提案要求在五年内拨款50亿卢比，用于打造下一代半导体的 本土技术，但金额相对较低。该项目还包括初始融资阶段后的自主可持续发展路线图。 在全球范围内，二维材料引起了广泛关注。欧洲已投资超过10亿美元（约合830亿卢比），韩国投 资超过3亿卢比，中国和日本等国家也对基于二维材料的半导体研究进行了大规模但未公开的投 资。一位不愿透露姓名的官员表示："二维材料将成为未来异构系统的关键推动因素。 尽管全球发展势头强劲，但印度在这方面 ...