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巴克莱:美国半导体与半导体资本设备:构建规模扩张架构
2025-07-01 00:40
Equity Research 25 June 2025 U.S. Semiconductors & Semiconductor Capital Equipment Laying Out the Scale-Up Architecture Landscape Interconnect is more critical than ever for the success of XPU efforts, and this is no more prevalent than in scale-up designs where dominance is being fought today amongst three factions (UALink, Scale Up Ethernet, NVLink) with major implications for the future of AI. We appreciate your 5-star vote in the 2025 Extel All-America Research Survey in the Semiconductors & Semiconduct ...
Astera Labs' AI Infrastructure Demand Accelerates: More Upside Ahead?
ZACKS· 2025-06-23 15:50
Core Insights - Astera Labs (ALAB) is strategically positioned in next-generation AI and cloud infrastructure, showcasing a strong start to 2025 with a focus on technological leadership in interconnect standards [1][2] Group 1: Product and Technology Leadership - Astera Labs has established a first-mover advantage with a comprehensive suite of PCIe Gen 6 solutions, including retimers, smart gearboxes, optical modules, and fabric switches, tailored to meet the high performance and signal integrity requirements of modern AI racks [2] - The Leo CXL product family addresses the increasing demand for memory expansion and pooling, supporting both AI and general-purpose compute workloads as data center CPUs adopt CXL 2.0 and 3.0 [2][3] - The introduction of UALink 1.0 in early 2025 is expected to lead to commercial solutions by 2026, creating a scalable, open interconnect for AI accelerators and unlocking a multibillion-dollar opportunity [3] Group 2: Competitive Positioning - Compared to Marvell Technology, which has strengths in custom ASICs and broader market focus, Astera Labs benefits from tighter integration of hardware and software through its COSMOS suite, enhancing AI-specific system observability and fleet management [4] - Broadcom, while a scale leader in PCIe switches and networking silicon, offers less tailored solutions for AI rack-scale deployments, allowing Astera Labs to maintain agility in addressing emerging infrastructure needs like UALink and NVLink-based clustering [5] Group 3: Market Performance and Valuation - Astera Labs' shares have increased by 26.2% over the past three months, outperforming the industry growth of 10.2% and the sector's growth of 7.5%, while the S&P 500 index rose by 3.6% during the same period [6][8] - The company is currently trading at a forward 12-month price-to-sales ratio of 19.19X, slightly below its one-year median of 19.86X, but remains overvalued compared to the industry [9]
Marvell's AI Bet: Will NVLink and UALink Drive Custom Chip Wins?
ZACKS· 2025-06-20 14:41
Core Insights - Marvell Technology (MRVL) is enhancing its position in AI infrastructure by expanding its custom chip capabilities, integrating new components to improve performance and scalability across large-scale systems [1][6] Financial Performance - In Q1 FY26, Marvell reported record Data Center revenues of $1.44 billion, representing a 76% increase year over year, driven by the rapid scaling of custom AI silicon [2][10] - Marvell's forward price-to-sales ratio is 7.36X, which is lower than the industry average of 8.15X [13] Strategic Developments - Marvell partnered with NVIDIA in May 2025 to offer NVLink Fusion technology, enhancing the flexibility of its custom cloud platform silicon for next-generation AI infrastructure [3] - The introduction of a new multi-die packaging solution based on proprietary interposer technology aims to improve die-to-die interconnect efficiency, reduce power consumption, and lower product costs [4] - Marvell launched the Ultra Accelerator Link (UALink) scale-up solution, providing an open-standards-based interconnect platform that enhances compute utilization and reduces latency [5] Competitive Landscape - Advanced Micro Devices (AMD) is advancing its AI solutions through the acquisition of ZT Systems, which will reduce deployment time for hyperscalers [7] - Broadcom (AVGO) reported a 170% year-over-year increase in AI networking revenues, now comprising 40% of its total AI semiconductor revenues, and introduced the Tomahawk 6 switch to enhance AI cluster performance [8] Market Outlook - The Zacks Consensus Estimate for Marvell's fiscal 2026 and fiscal 2027 earnings indicates year-over-year growth of 77.71% and 27.73%, respectively, with recent upward revisions in earnings estimates [16]
英伟达入局、博通守擂,AI定制芯片酣战
市值再创新高的博通正迎来新对手——英伟达。 近日英伟达推出NVLink Fusion,直指博通的高成长型市场:AI定制芯片。这也意味着ASIC芯片市场有 新的加入者。 在全球云服务厂商竞相选择自研芯片用于AI推理、英伟达GPU芯片用于AI训练的组合拳下,ASIC芯片 之争正加速转向生态之争。一方面,UALink和UEC两大连接协议联盟在加速聚合,以对抗英伟达的 NVLink协议;另一方面,英伟达在ASIC方面以半开放态度,已经拉拢Marvell、联发科等合作伙伴。 这背后是ASIC芯片市场的可持续性成长机遇。博通近日发布的财报显示,2025财年第二财季,公司实 现营收150.04亿美元,创历史新高。 博通公司总裁兼首席执行官陈福阳表示:"受人工智能网络的强劲需求推动,第二季度公司人工智能业 务营收同比增长46%,超过44亿美元。随着我们的超大规模客户继续加大投资,预计第三季度人工智能 半导体营收将加速增长至51亿美元,实现连续十个季度增长。" 英伟达的入局无疑给聚焦计算芯片市场的玩家阵营带来变数。本质上来说,随着全球对AI计算的需求 从训练转向推理为重心,AI芯片市场也面临一场需求重构。英伟达的动态背后,反映 ...
Marvell Expands Custom Compute Platform with UALink Scale-up Solution for AI Accelerated Infrastructure
Prnewswire· 2025-06-11 13:00
Optimized custom offering enables end-to-end UALink architecture for rack-scale AI Delivering high compute performance with low power and latency Open standards-based technology supports flexible interconnect solutions that allow customers to innovate at scaleSANTA CLARA, Calif., June 11, 2025 /PRNewswire/ -- Marvell Technology, Inc. (NASDAQ: MRVL), a leader in data infrastructure semiconductor solutions, today announced its custom Ultra Accelerator Link (UALink) scale-up offering. As part of the Marvell® ...
AI芯片,下一个关键战场
半导体芯闻· 2025-06-04 10:20
如果您希望可以时常见面,欢迎标星收藏哦~ 两大联盟架构正面交锋 然而,多放1颗别人制作的AI芯片进场,就代表少卖1颗自家的处理器。在记者会上,本刊记者对 英伟达执行长黄仁勋提问:"可否谈谈ASIC伺服器未来五年的成长状况?"黄仁勋的回答相当强 势:"现在,90%的ASIC专案都将失败⋯,你打造的ASIC芯片必须比我们打造的ASIC强,我们可 是很有竞争力的。"他强调:"我们的ASIC会比其他竞争者成长速度更快!" 几天之后,联发科股东会上,当股东问到联发科未来重要的成长动能时,董事长蔡明介看好ASIC 芯片的未来商机。他引用市调公司的数据指出,到2028年时,用于云端的ASIC芯片市场规模将达 到400亿美元以上。 巧合的是,就在英伟达宣布推出NVLink Fusion前一个月,NVLink Fusion的竞争对手UALink联 盟首次推出UALink AI加速器互连1.0版规范,摆明要和英伟达争夺AI数据中心的高速传输标准。 其中值得注意的是,UALink联盟成员中,不少公司都是云端AI芯片的大买家,主要发起人包括阿 里 巴 巴 、 AWS 、 A MD 、 苹 果 、 思 科 、 谷 歌 、 HPE 、 ...
Emergence Of UALink As A Viable Alternative Could Challenge Nvidia's Dominance, Analyst Asserts
Benzinga· 2025-05-23 14:00
Group 1 - BofA Securities highlighted two key AI scale-up interconnect protocols: Nvidia's NVLink Fusion and AMD's UALink, which are essential for connecting AI accelerators through fast, low-latency networking [1] - UALink is an open-standard initiative aimed at providing an alternative to Nvidia's proprietary NVLink, formed by a consortium of industry leaders including AMD, Broadcom, Intel, and others [2][3] - UALink is seen as a significant step for the non-Nvidia ecosystem, potentially challenging Nvidia's dominance in AI scale-up from 2027 onward [4] Group 2 - Nvidia's NVLink Fusion has opened up approximately $12 billion in networking total addressable market (TAM) that was previously inaccessible, with AMD being a founding member of the UALink Consortium [5] - UALink 1.0 supports up to 800GB/s bandwidth per accelerator, which is less than half of NVLink 5.0's 1.8TB/s [6] - Nvidia is expected to maintain a 1-2 generation advantage in AI scale-up networking as UALink-compatible systems ramp from 2027 [7] Group 3 - NVLink Fusion is projected to expand Nvidia's TAM in networking associated with custom accelerators, with custom silicon representing about 15% of the estimated $500 billion AI compute TAM by 2029-30 [8] - The emergence of UALink as an open standard backed by major industry players is crucial for fostering innovation and competition in the AI interconnect space [10] - The coming years, particularly 2026 and beyond, will be critical for observing UALink's adoption and Nvidia's evolution of its proprietary technology [10]
什么是Scale Up和Scale Out?
半导体行业观察· 2025-05-23 01:21
如果您希望可以时常见面,欢迎标星收藏哦~ 来源:内容来自半导体行业观察综合 。 在本文中,我们来谈一下GPU集群的横向和综合拓展。 让我们从"AI Pod"的概念开始。这个术语对不同的人可能意味着不同的东西,但它通常指的是一种预先配置的模块化基础设施解决方案,旨在简化 和加速AI工作负载的部署。 这些"pod"将计算、存储、网络和软件组件集成为一个紧密相连的单元,从而促进高效的 AI 运行。这就是我们遇到"纵向扩展"和"横向扩展"等术语 的地方。以下是可视化示例: 每个 XPU 刀片通常包含 2 到 8 个 XPU 设备。每个设备可以形成为单片芯片(即由单个半导体切片制成),也可以形成由一组称为"芯片集"的芯 片组成的多芯片系统。 我们这里讨论的计算处理能力令人难以置信,XPU 设备本身也同样如此。例如,NVIDIA 的 B200 GPU 拥有超过 2000 亿个晶体管(当然,我可 没亲自数过)。 CPU(中央处理器) GPU(图形处理单元 NPU(神经处理单元) TPU(张量处理单元) DPU(数据处理单元) FPGA(现场可编程门阵列) ASIC(专用集成电路) END 半导体精品公众号推荐 扩展是有限制 ...
Astera Labs to Share Vision for Expanding Opportunities in AI Infrastructure with UALink
Globenewswire· 2025-05-06 20:05
With broad industry support from 100+ companies in the UALink Consortium and the ratification of the UALink 200G 1.0 specification, UALink is emerging as the essential open standard for scale-up AI infrastructureSANTA CLARA, Calif., May 06, 2025 (GLOBE NEWSWIRE) -- Astera Labs, Inc. (Nasdaq: ALAB), a global leader in semiconductor-based connectivity solutions for AI and cloud infrastructure, today announced its upcoming webinar hosted by J.P. Morgan on Ultra Accelerator Link™ (UALink™) technology. Astera La ...