Core Points - TSMC's internal leak case has prompted senior executives from Tokyo Electron to visit Taiwan in July to apologize to TSMC's COO, Qin Yongpei [1] - TSMC has initiated legal action regarding the leak, which has entered the judicial process, rendering the visit's impact negligible [1] - Tokyo Electron's Taiwan subsidiary has declined to comment on the visit, and employees have been instructed not to discuss the matter publicly [1] - Tokyo Electron stated that no evidence of leaked trade secrets to third parties has been found, but further details cannot be provided due to the ongoing judicial review [1] - The leak involved TSMC's 2nm process technology, which was allegedly accessed by a Tokyo Electron engineer who previously worked in TSMC's system integration department and is currently in custody [1]

Core Viewpoint - The article highlights the challenges faced by TSMC in establishing a semiconductor manufacturing facility in Arizona, emphasizing regulatory hurdles that may limit its production capacity to only 7% of the U.S. semiconductor needs [3]. Group 1: TSMC's Arizona Facility - U.S. Treasury Secretary warned that TSMC's $40 billion facility in Arizona may only produce 7% of the U.S. semiconductor requirements due to local regulatory challenges [3]. - The construction of the facility is reportedly slowed down by regulatory obstacles, which complicate the building process [3]. - TSMC plans to have its second factory operational by 2027, with 30% of its advanced 2nm capacity expected to come from this Arizona facility [3]. Group 2: TSMC's Advanced Process Technology - TSMC is set to begin mass production of its 2nm process technology in the second half of this year, with expectations that the design tape-outs will exceed those of the 3nm and 5nm processes in the first two years [4]. - The 2nm process technology offers a 10% to 15% speed increase at the same power consumption or a 25% to 30% reduction in power consumption at the same speed, with a chip density increase of over 15% [4]. - Future plans include the introduction of the N2P process technology, which will provide better performance and power efficiency, scheduled for mass production in the second half of 2026 [4]. Group 3: Upcoming Process Developments - TSMC's roadmap includes the A16 process, which will enhance speed by 8% to 10% at the same power consumption or reduce power consumption by 15% to 20% at the same speed, with a chip density increase of 7% to 10% [5]. - The A16 process is designed for high-performance computing (HPC) products and is expected to enter mass production in the second half of 2026 [5].

Core Viewpoint - TSMC's 2nm process is set to begin mass production in the second half of this year, with strong demand from major clients like Apple, AMD, and Intel, leading to significant capacity expansion plans [1][2] Group 1: Production Capacity - TSMC plans to increase its 2nm monthly production capacity from 40,000 wafers by the end of this year to 100,000 wafers next year, representing a 150% increase [1] - By 2027, TSMC aims to further expand its 2nm capacity to between 160,000 and 180,000 wafers, with the potential to reach 200,000 wafers if demand exceeds expectations [1][2] - Currently, TSMC's advanced process capacities include approximately 160,000 wafers for the 7nm process, slightly over 160,000 for the 5nm process, and about 130,000 wafers for the 3nm process, with potential adjustments to reach 160,000 wafers [2] Group 2: Client Demand and Market Position - Major clients expected to adopt TSMC's 2nm process include Apple, AMD, Intel, Qualcomm, MediaTek, and NVIDIA, indicating a broad market interest [1][2] - TSMC's advanced process expansion is anticipated to drive revenue growth, as newer processes command higher pricing, benefiting the company's operational performance [2] - The company expects that the number of product designs utilizing its 2nm technology in the first two years will surpass those for the 3nm and 5nm processes during their respective initial periods [2]