28 August 2025 | 12:28AM CST Taiwan Technology: Marketing feedback: Sustained AI optimism with rising sentiment towards advanced packaging and testing industry We met with over 40 investors during our marketing trip in Hong Kong over the past week. Overall, we continue to witness optimism among investors especially around AI sentiment, while interest level towards non-AI segments remain low. Key discussion with investors mainly focused on 1) TSMC's earnings growth outlook, capex trajectory towards 2027 and ...

How Do Advanced Packaging Equipment Vendors Tackle Challenges in a Globalized Market? Original Article by SemiVision Research (TSMC,UMC,Samsung,Intel,ASML,AMAT, Lam,TEL,KLA,ASE,Amkor,JCET,Disco,Besi ,ASMPT,K&S,Semes,Hanmi,Hanwha, EVG,SUSS,Teradyne,SCREEN,Canon,Nikon,Lasertec) 更多资料加入知识星球：水木调研纪要 关注公众号：水木纪要 AUG 25, 2025 ∙ PAID 5 Share SEMIVISION 11 更多一手调研纪要和海外投行研报数据加V：shuimu2026 更多一手调研纪要和海外投行研报数据加V：shuimu2026 更多一手调研纪要和海外投行研报数据加V：shuimu2026 更多一手调研纪要和海外投行研报数据加V：shuimu2026 更多一手调研纪要和海外投行研报数据加V：shuimu2026 更多一手调研纪要和 ...

公众号记得加星标⭐️，第一时间看推送不会错过。 来源 ：内容来自 moneyDJ 。 台积电(2330)持续加快在美国布局，业界最新传出，台积电在美国所规划的两座先进封装厂(AP1、 AP2)刚进入整地工程，预计于2026年下半年开始盖厂，目标2028年开厂启用。在制程规划上，AP1 规划扩充最先进的SoIC及CoW，AP2则是锁定CoPoS，以因应当地生产AI、HPC芯片封装需求。 台积电先前表示，美国第三座晶圆厂(P3)将采用N2和A16制程技术，第四座晶圆厂(P4)也将采用N2 和A16制程技术，第五座和第六座晶圆厂(P5、P6)则将采用更先进的技术。这些晶圆厂的建设和量产 计划将依客户的需求而定，并计划在亚利桑那州兴建两座新的先进封装设施，以及设立一间研发中 心，以完善AI供应链。 台积电有了美国第一座晶圆厂所累积的经验后，目前整体扩厂进度加速中，且相当顺利。业界最新消 息指出，公司正计画美国第二座晶圆厂(P2)的B区提前导入2纳米制程(原本在P3)。而先进封装厂则位 于P3对面、隔一道马路，原本预计2027后才要兴建，现在大幅加快到2026年下半年。 业界人士表示，封装厂建置速度相较晶圆厂来得快，以 ...

AI与智驾发展驱动先进封装市场持续扩容，Chiplet、2.5D/3D封装加速渗透 据Yole统计，2024年全球先进封装市场规模预计达450亿美元，占整体封装市场比重超55%，2030年有 望升至800亿美元，2024–2030年CAGR达9.4%。从下游应用看，AI服务器对高带宽存储与高速互联提出 极致要求，HBM+CoWoS组合已成标配;汽车智能化推动车规SoC复杂度跃升，叠加消费电子周期复苏， 助力先进封装市场持续增长。从技术升级维度看，随着应用场景算力密度不断攀升，封装形态正加速向 Chiplet架构、2.5D中介层与3D堆叠等高集成方案迈进。据Yole预测，2.5D/3D封装占比将由2023年的 27%增长至2029年的40%，营收年复合增速达18.05%，远高于行业平均增速。 国产先进封装大有可为，需求高增长与国产替代共振机遇 据锐观产业研究院数据，中国先进封装市场保持快速增长，2024年市场规模预计达698亿元，20-24年复 合增速达18.7%;但渗透率仅40%，仍低于全球平均水平55%，中长期具备显著提升空间。随着本土芯片 设计产业持续演进，国内封装平台迭代动力加速释放。与此同时，台积电C ...

Appaloosa's billionaire investor went on an AI hardware buying spree during the second quarter, while simultaneously sending shares of money managers' favorite AI stock to the chopping block.For three years, the evolution of artificial intelligence (AI) hardware and software solutions has dominated the newswires on Wall Street -- and with good reason. Based on one estimate from the analysts at PwC, AI can lift global gross domestic product by $15.7 trillion in 2030. This is a big enough pie where a long lis ...

Core Viewpoint - The emergence of CoWoP technology by Nvidia is seen as a potential disruptor to TSMC's CoWoS technology, which has been dominant in advanced packaging for AI chips. The industry is debating whether CoWoP is merely a temporary trend or a significant shift in semiconductor packaging [1][3]. Summary by Sections CoWoP vs CoWoS - CoWoP (Chip on Wafer on PCB) integrates the packaging substrate with PCB, allowing for a thinner, lighter, and higher bandwidth module design compared to CoWoS (Chip-on-Wafer-on-Substrate). This integration reduces material and manufacturing costs while accelerating production timelines [2][3]. Market Impact - The introduction of CoWoP has sparked discussions about its potential to replace CoWoS and has raised questions about the future of TSMC's CoPoS (Chip-on-Panel-on-Substrate) technology, which is designed to address CoWoS's production bottlenecks [3][4]. Advantages of CoWoP - CoWoP offers several advantages, including simplified system architecture, improved thermal management, reduced substrate costs, and potentially fewer backend testing steps. It aims to solve issues like substrate warping and enhance NVLink coverage without additional substrate layers [4][5]. Challenges and Risks - Despite its potential, CoWoP faces significant challenges in commercial viability, particularly in scaling up for high-capacity GPUs. The transition from existing technologies to CoWoP involves risks, especially given TSMC's current high yield rates with CoWoS [6][7]. Industry Sentiment - PCB manufacturers express skepticism about CoWoP's ability to replace CoWoS in the short term, citing the need for substantial advancements across the entire supply chain. They believe that existing technologies remain adequate and that the transition to CoWoP will take considerable time [7][8].

Summary of Key Points from the Conference Call Industry Overview - **Industry Focus**: The conference call primarily discusses the semiconductor industry, specifically the advanced packaging segment and the adoption of chiplet architectures. - **Key Technologies**: Emphasis on CoWoS (Chip-on-Wafer-on-Substrate) and FOCoS (Fan-Out Chip on Substrate) technologies as critical for advanced packaging solutions. Core Insights and Arguments - **Chiplet Adoption**: The adoption of chiplet architectures is accelerating, particularly as the industry transitions to 2nm nodes. Projections indicate chiplet penetration for nodes 5nm and below will reach 21% in 2025, 30% in 2026, and 37% in 2027, with 2nm node adoption expected to reach 57% by 2027E [1][40]. - **Cost and Yield Improvements**: Chiplet architectures can significantly lower manufacturing costs by splitting larger dies into smaller ones, improving yield rates. For instance, manufacturing costs can be reduced by 79.2% when transitioning from a single large die to multiple smaller chiplets [1][24][36]. - **Growing Demand for CoWoS**: The increasing chiplet penetration is expected to drive demand for CoWoS technology, which facilitates high-speed die-to-die interconnections. This demand is projected to grow at a CAGR of 71% for capacity and 63% for shipments from 2025 to 2027E [1][54][55]. Company-Specific Insights - **TSMC (2330.TW)**: - TSMC is a leader in advanced semiconductor packaging, particularly through its CoWoS technology, which is essential for AI and HPC applications. The company is expected to see significant revenue growth from CoWoS, with projections indicating it will account for 8.3% to 15.3% of TSMC's revenue from 2025 to 2027E [1][66]. - TSMC's CoWoS capacity is forecasted to reach 75k, 120k, and 170k in 2025, 2026, and 2027, respectively, reflecting aggressive capacity expansions to meet demand [1][66]. - **ASE (3711.TW)**: - ASE is gaining traction with its FOCoS technology, which is a cost-effective alternative to CoWoS, typically priced at half the cost. ASE's revenue from advanced packaging is expected to grow by 15% and 11% YoY in 2025 and 2026, respectively [1][67][69]. - **All Ring (6187.TWO)**: - All Ring is positioned to benefit from the advanced packaging trend, with expectations of revenue growth of 42% and 18% in 2025 and 2026, driven by CoWoS capacity expansion and new opportunities in CPO (Co-Packaged Optics) [1][71]. - **GPTC (3131.TWO)**: - GPTC is a key supplier of wet processing equipment for advanced packaging, with a market share of approximately 50% at TSMC. The company is expected to see revenue growth of 18.7% CAGR from 2024 to 2027, driven by the complexity of advanced packaging technologies [1][74][90]. Additional Important Insights - **Market Dynamics**: The report highlights the shift from traditional packaging methods to advanced solutions like CoWoS and FOCoS, indicating a broader market trend towards higher integration and performance in semiconductor designs [1][53]. - **Total Addressable Market (TAM)**: The total addressable market for CoWoS is projected to reach US$27.8 billion by 2027, growing at a CAGR of 65% from 2025 to 2027E [1][55][60]. - **Risks and Challenges**: Key risks include potential deterioration in end-demand, competition, and execution challenges that could impact profitability and market share for the companies involved [1][80][85][89]. This summary encapsulates the critical insights and projections discussed in the conference call, focusing on the semiconductor industry's evolution towards advanced packaging technologies and the implications for key players in the market.

ANCHOR REPORT Global Markets Research 13 August 2025 Asia AI Semi & Server Stay positive on AI, but also monitor risk factors In late 2024, our tech team published multiple reports flagging our contrarian cautious view on the AI semi and server supply chain given the overly-optimistic Street sentiment and the widening gap between upstream CoWoS and downstream GB rack shipments. That said, in April/May 2025, we started calling for "revisit AI" following market expectation reset, given our view that AI could ...

Core Viewpoint - TSMC's expansion in the U.S. is showing promising results, with significant profits from its Arizona facility, indicating a successful shift towards American manufacturing in the semiconductor industry [2][3][4]. Financial Performance - TSMC reported a net profit of NT$3,982.7 billion for Q2, with the Arizona plant contributing NT$42.32 billion in net profit, marking its first profit contribution to the parent company [2][4]. - The company's consolidated revenue reached NT$9,337.9 billion, with a net profit growth of 60.7% year-on-year and a gross margin of 58.6%, setting a historical record [4][6]. Production Capacity and Demand - The Arizona P1 plant has a monthly production capacity of approximately 30,000 4nm wafers, fully booked by major clients like Apple and AMD [3][6]. - TSMC's U.S. facilities currently meet only 7% of the U.S. chip demand, highlighting the need for further expansion to satisfy local market requirements [6][8]. Competitive Landscape - TSMC's investment in the U.S. is driven by the need to secure major clients and avoid tariffs, with over 90% of its high-margin orders coming from U.S. customers [4][6]. - The competition is intensifying, as companies like Samsung are also expanding their semiconductor manufacturing capabilities in the U.S. [6][8]. Advanced Packaging and AI Demand - The demand for advanced packaging, particularly CoWoS technology, is surging due to the rise of AI applications, leading to capacity constraints across Taiwan's packaging facilities [9][10]. - TSMC's advanced packaging plant in Chiayi is facing delays, exacerbating the supply-demand imbalance in the market [10][11].

Summary of TSMC's CoWoS and Advanced Packaging Outlook Company and Industry Overview - **Company**: Taiwan Semiconductor Manufacturing Company (TSMC) - **Industry**: Semiconductor, specifically focusing on advanced packaging technologies such as CoWoS (Chip on Wafer on Substrate) and CoPoS (Chip-in-Panel-on-Substrate) Key Points and Arguments CoWoS Capacity and Growth Forecast - TSMC's total CoWoS capacity is projected to reach **675k** wafers per month (wpm) by the end of **2025**, with a forecast of **1.08 million** wpm by the end of **2026**, representing a **61%** year-over-year (YoY) growth [5][62] - The company anticipates further expansion to **130k** wpm by the end of **2027** [5][13] - CoWoS capacity has seen significant growth, with a **100%** YoY increase noted in early **2024** [11] Utilization Rate and Production Adjustments - TSMC's CoWoS utilization rate (UTR) is expected to be in the low **90s** in **1H26**, with a return to full capacity anticipated in **2H26** as new projects enter mass production [5][57] - Adjustments in nVidia's orders have led to a production mismatch, impacting the UTR and causing some expansion timelines to shift [5][50] Customer Allocation and Market Dynamics - nVidia is projected to maintain a **50.1%** market share in CoWoS capacity allocation for **2026**, slightly down from **51.4%** in **2025** [6][62] - Broadcom is expected to become the second-largest customer, with an allocation of **187k** wpm, benefiting from multiple projects entering mass production [62] Advanced Packaging Technologies - TSMC is focusing on several advanced packaging technologies, including CoWoS, CoPoS, and WMCM (Wafer-level Multiple-Chip Module), with CoPoS expected to enter high-volume production by **2028** [5][21][35] - CoWoS has evolved from a niche solution to a critical component in AI and high-performance computing (HPC), driven by the demand for larger memory bandwidth [10] Strategic Partnerships and Outsourcing - TSMC is collaborating with OSAT partners like ASE and SPIL to manage the increasing demand for CoWoS, with expectations that outsourcing will accelerate in **2026** and **2027** [40][42] - The company has invested significantly in expanding its advanced packaging capabilities, including a **US$100 billion** investment in the U.S. for new fabs and R&D centers [46] Challenges and Future Outlook - The semiconductor industry faces challenges such as production bottlenecks and mismatches between upstream and downstream production, which TSMC is actively addressing [52] - The demand for AI-related products is expected to remain strong, with TSMC's management indicating improved demand compared to previous forecasts [52] Conclusion - TSMC is positioned as a leader in the advanced packaging sector, with aggressive expansion plans and a strong customer base, particularly in the AI and HPC markets. The company's strategic partnerships and investments are expected to support its growth trajectory in the coming years [7][46]