Core Viewpoint - The semiconductor industry is entering a new phase with the mass production of 2nm processes, where advanced packaging technology is becoming a focal point due to its critical role in chip performance enhancement beyond mere transistor scaling [1]. Group 1: Advanced Packaging - Advanced packaging is not a single technology but a series of solutions aimed at enhancing chip integration, connectivity, and system performance, evolving from traditional packaging to more complex structures like 2.5D and 3D stacking [2]. - This technology does not directly increase chip computation speed but allows for more efficient utilization of computational power, akin to equipping characters with suitable gear to maximize their potential [2]. Group 2: Performance Impact of Connectivity - The layout of connections within advanced chips significantly affects performance, as data movement can consume more power than computation itself; inefficient routing leads to delays and energy waste [3]. - Advanced packaging improves thermal management, which is crucial as chip stacking density increases; effective heat dissipation is essential for maintaining performance levels [3]. Group 3: Differentiated Needs in Applications - Different application scenarios have distinct packaging requirements; AI and data center chips prioritize maximum output and bandwidth, while mobile device chips focus on compactness and power efficiency [4]. - AI chips are designed for high performance, while mobile chips must balance integration and power consumption, reflecting a divergence in packaging strategies [4]. Group 4: Innovations in Materials and Techniques - The industry is exploring glass substrates to replace traditional plastic materials, offering benefits such as finer signal lines and better thermal stability, which can lower production costs by allowing more chips to be packaged simultaneously [5]. - Panel-level packaging (FOPLP) represents a shift towards efficiency by utilizing square packaging instead of circular wafers, maximizing space usage and reducing costs [5].

Core Insights - TSMC's advanced packaging capacity is severely undersupplied, prompting aggressive expansion efforts, including the unveiling of the AP7 facility in Chiayi, which will serve major clients like Apple [1][2] - The AP7 facility is set to enter its first phase of equipment installation, focusing on mass production of the SoIC technology platform, with a second phase expected to begin production this year [1] - The AP7 site has potential for at least six additional phases of expansion to meet the growing demands of clients and the AI market [1] Group 1 - AP7 is TSMC's sixth advanced packaging facility, previously undisclosed to the public, and was showcased during a media tour led by TSMC's senior vice president [1] - The first phase of AP7 is designed for SoIC technology mass production, while the second phase will support Apple's wafer-level multi-chip module (WMCM) technology [1] - AP7 is anticipated to become TSMC's largest advanced packaging facility, with future phases potentially incorporating new advanced packaging processes like CoPoS, expected to begin production by 2028-2029 [1] Group 2 - TSMC is expanding its advanced packaging capacity through both in-house production and outsourcing, with AP7 being the first facility located in Chiayi [2] - TSMC has integrated advanced packaging technology into the 3DFabric domain, including the SoIC platform, which consists of two stacking solutions: SoIC-P and SoIC-X [2] - The SoIC technology for N3-on-N4 stacking is projected to enter mass production in 2025, with a spacing of 6μm, while the next-generation SoIC A14-on-N2 is expected to be ready by 2029 [2]

Core Viewpoint - The article discusses the significant investment and strategic shifts in the semiconductor packaging industry, particularly focusing on advanced packaging technologies driven by the AI wave and the structural changes in the storage industry [1][2]. Group 1: Investment and Market Trends - SK Hynix announced a 19 trillion KRW (approximately 12.9 billion USD) investment to build an advanced chip packaging factory in Cheongju, South Korea, reflecting the structural changes in the storage industry due to AI [1]. - The global advanced chip packaging market is projected to grow from 50.38 billion USD in 2025 to 79.85 billion USD by 2032, with a compound annual growth rate (CAGR) of 6.8% [2]. - By early 2026, leading packaging and testing companies are expected to ramp up advanced packaging capacity, indicating a competitive landscape focused on advanced packaging capabilities [2]. Group 2: TSMC's Dominance - TSMC is recognized as the leader in advanced packaging, holding over 60% market share in semiconductor manufacturing and establishing significant competitive barriers in advanced packaging technologies [2][3]. - TSMC has developed three branches of CoWoS technology: CoWoS-S for medium-sized chips, CoWoS-R for greater design flexibility, and CoWoS-L for large AI chips [3]. - TSMC's SoIC technology, based on CoWoS and wafer-on-wafer stacking, offers higher interconnect density and improved performance compared to traditional 2.5D packaging [3]. Group 3: Capacity Expansion and Technological Advancements - TSMC's CoWoS capacity is projected to increase 6-8 times from 2023 to 2026, with a CAGR exceeding 60% [5]. - TSMC's new advanced packaging facilities, including the flagship AP6 plant in Zhunan, are designed for full automation and are expected to handle significant orders from major clients like NVIDIA and AMD [5][6]. - TSMC is also expanding its advanced packaging capabilities in the U.S. with plans for two new facilities in Arizona, focusing on SoIC and CoPoS technologies [6]. Group 4: Competitors' Strategies - ASE, as the largest packaging and testing foundry, is benefiting from the advanced packaging trend, with over 60% of its ATM business expected to come from advanced packaging by 2025 [9]. - ASE is developing its own 2.5D packaging platform, FOCoS, and is expanding its production capacity across multiple sites, including a new K28 plant aimed at meeting the demand for AI and GPU chips [10][11]. - Amkor is enhancing its market position through partnerships, such as its collaboration with Intel on EMIB technology, and expanding its facilities in the U.S. to meet advanced packaging demands [15][16]. Group 5: Mainland China's Participation - Mainland Chinese companies are actively investing in advanced packaging technologies and capacity, with firms like Yongxi Electronics and Changjiang Electronics focusing on high-density packaging and automotive electronics [20][22]. - Yongxi Electronics is establishing a new production base in Malaysia to enhance its overseas strategy, while Changjiang Electronics is expanding its automotive electronics packaging capabilities [21][22]. - Tongfu Microelectronics is also increasing its advanced packaging capacity, particularly in automotive and high-performance computing sectors, to meet growing market demands [23][24]. Group 6: Future Outlook - The article concludes that while TSMC's dominance in advanced packaging is unlikely to be challenged in the short term, other specialized packaging firms are seeking to differentiate themselves through flexible capacity and innovative technologies [25][27]. - The collective expansion of packaging firms represents a significant industry bet on the demand for AI-driven computing power, with the potential for winners to emerge as the market stabilizes and technology paths clarify [27].

Core Viewpoint - TSMC reported a significant increase in revenue and net profit for Q4 2025, with revenue reaching $33.73 billion, a year-on-year growth of 25.5%, and net profit of $16.297 billion, up 40.2% year-on-year, indicating strong demand driven by AI and HPC sectors [7][11]. Financial Performance - Q4 2025 revenue was $33.73 billion, translating to approximately ¥2349.77 billion, with a net profit margin of 48.3% [7][10]. - TSMC's 2025 total revenue was $122.42 billion, a 35.9% increase from the previous year, with a forecasted revenue growth of nearly 30% for 2026, potentially reaching $159.1 billion [7][14]. - The gross margin for Q4 2025 was 62.3%, exceeding previous guidance, indicating strong operational efficiency [11]. Advanced Process Technology - Advanced processes (7nm and below) accounted for 77% of total wafer revenue, with 5nm contributing 35% and 3nm expected to rise significantly due to demand from HPC products [8][9]. - TSMC anticipates a compound annual growth rate (CAGR) of nearly 50% for AI accelerator revenue from 2024 to 2029, reflecting the growing importance of AI in driving revenue [8][16]. Capital Expenditures - TSMC's capital expenditures for Q4 2025 were $11.51 billion, with a total of $40.9 billion for the year, indicating a strong commitment to expanding production capacity [12][13]. - For 2026, TSMC plans to increase capital expenditures to between $52 billion and $56 billion, signaling ongoing investment in advanced technologies [12][13]. Market Dynamics - North American customers contribute approximately 75% of TSMC's revenue, with mainland Chinese customers accounting for 9% [9]. - The demand for AI and HPC is expected to continue driving TSMC's growth, with AI revenue already representing a significant portion of total revenue [15][19]. Technological Advancements - TSMC's 2nm technology is expected to enter mass production, with significant improvements in power efficiency, which is critical for AI applications [17][24]. - The introduction of A16 technology, which enhances power delivery, is anticipated to further boost performance for high-performance computing clients [24]. Competitive Landscape - TSMC maintains a competitive edge through its advanced process technologies and strong customer relationships, despite increasing competition from U.S. IDM companies [21][22]. - The company emphasizes value-based pricing to ensure profitability while meeting customer demands for advanced technologies [22][23].

Core Viewpoint - TSMC is focusing on advanced packaging as a key growth area, with plans to establish a "General Factory Manager" position to oversee all facilities, likely filled by Chen Cheng-hsien, who has extensive experience in the company [1][2]. Group 1: Advanced Packaging Business - TSMC's advanced packaging business, previously contributing about 6-7% of revenue, is expected to grow significantly due to surging AI demand, particularly for CoWoS technology, which has been in development since 2009 [1][3]. - The gross margin for TSMC's advanced packaging business has reached approximately 80%, contributing significantly to the company's overall profitability [1]. - TSMC is expanding its advanced packaging capabilities with new facilities in Taiwan and Arizona, including two new advanced packaging plants expected to be operational by the end of 2028 [3][4]. Group 2: Leadership Changes - Recent retirements of key executives, including Lin Jin-kun and Yu Zhen-hua, have led to increased attention on TSMC's succession planning and leadership transitions [2]. - Chen Cheng-hsien is anticipated to be promoted to the newly created "General Factory Manager" role, overseeing multiple advanced packaging facilities [2][3]. - TSMC is expected to announce further leadership changes by late January 2026, reflecting ongoing organizational adjustments [2]. Group 3: Technological Developments - TSMC is advancing its CoWoS technology, with new variants like CoWoS-S, CoWoS-R, and CoWoS-L being developed to meet high-performance computing (HPC) needs [4]. - The company plans to introduce a new CoWoS-L technology with a 5.5x larger mask size to address the high demand for this advanced packaging solution [4]. - TSMC is also shifting focus to CoPoS technology, integrating CoWoS with fan-out panel-level packaging (FOPLP), with plans to establish a CoPoS pilot line by 2026 [5].

Core Viewpoint - Major Wall Street investment banks are indicating that the supercycle for AI hardware has just begun, with TSMC positioned as an essential "toll booth" in this growth phase [1] Group 1: Target Price Adjustments - JPMorgan raised TSMC's target price to NT$2,100, while Nomura set a higher target of NT$2,135, reflecting strong demand and limited supply [1][6] - Both banks maintain a "overweight" or "buy" rating on TSMC, suggesting significant upside potential in the current stock price [6] Group 2: Revenue Growth Projections - JPMorgan forecasts a 30% increase in TSMC's dollar revenue by 2026, driven primarily by AI demand from data centers, with a continued growth rate of over 20% in 2027 [1][4] - Nomura emphasizes that TSMC's strong pricing power is a result of severe supply shortages, which will support revenue growth [1] Group 3: Advanced Process Technology - TSMC is expected to maintain over 95% market share in the AI accelerator market at the N2 node, with no signs of losing market share to competitors like Intel and Samsung [2] - The N2 process is projected to generate revenue of $8 billion in 2026 and surge to $36 billion by 2027, indicating rapid growth in this segment [4] Group 4: Capital Expenditure and Profit Margins - TSMC's capital expenditure is expected to approach $50 billion in 2026 and potentially exceed $55 billion in 2027 to meet rising demand [4][8] - Gross margins are anticipated to stabilize above 60%, with potential spikes to 62-63% in the first half of 2026 due to urgent orders [8] Group 5: AI Revenue Contribution - The compound annual growth rate (CAGR) for data center AI revenue has been revised upward to 57%, with expectations that AI-related revenue will account for over 40% of TSMC's total revenue by 2029 [4][8] - The transition of nearly all AI accelerators to the 3nm process by 2026 is expected to further enhance TSMC's revenue streams [4]

Summary of TSMC Conference Call Company Overview - **Company**: TSMC (Taiwan Semiconductor Manufacturing Company) - **Industry**: Semiconductor Manufacturing Key Points and Arguments Revenue Growth Projections - TSMC is expected to achieve **30% USD revenue growth in 2026**, driven by increased demand for N3 technology, a stronger ramp of N2, and growth in advanced packaging [1][11] - Revenue growth is projected to continue at **20+% in 2027**, supported by tight capacity in leading-edge nodes and ongoing investments in AI [1][11] Gross Margins and Financial Performance - Gross Margins (GMs) are anticipated to remain around **60% through 2026**, aided by a favorable product mix and higher yields from N3 technology [1][11][36] - GMs are expected to be elevated in **1H26** due to high demand for expedited wafer orders, which carry a significant price premium [1][36] Capacity Expansion and Capital Expenditure - TSMC is entering a **capex upcycle**, with expected capital expenditures of **$48 billion in 2026** and **$55 billion in 2027**, focusing on N2, N3, and US fab expansions [1][51] - N3 capacity is projected to reach **147k wafers per month by the end of 2026**, with significant contributions from capacity conversions and new builds [1][19][57] Datacenter AI Revenue Growth - Datacenter AI revenue is forecasted to grow at a **57% CAGR from 2024 to 2029**, driven by strong demand for GPUs and ASICs, larger die sizes, and higher wafer ASPs [1][29] - By 2029, Datacenter AI could represent over **40% of TSMC's total revenues**, up from mid-teens in 2024 [1][31] Market Position and Competitive Landscape - TSMC is expected to maintain a **95% market share in AI accelerators** during the N2 era, despite competition from Intel and Samsung [1][49] - The company is not experiencing any significant share loss in leading-edge technology, with strong momentum in N2 tapeouts [1][42][49] Risks and Challenges - Key upside risks include stronger-than-expected gross margins and continued demand for N2 and N3 technologies [1] - Downside risks involve potential weakness in AI capital expenditures and increasing competition from Intel [1][11] Upcoming Guidance and Expectations - For **1Q26**, TSMC is expected to guide for flattish revenues quarter-over-quarter, with GMs projected to remain in the **61-63% range** [1][70] - The company will announce its **4Q25 results** on January 15, with expectations for revenues to exceed guidance [1][69] Additional Important Insights - Non-wafer revenues are expected to grow by **44% and 29% in 2026 and 2027**, respectively, driven by CoWoS expansion and increased adoption of advanced packaging technologies [1][21] - TSMC's aggressive capacity expansion plans are in response to strong demand from major clients like NVDA and Apple, indicating robust future growth potential [1][51][68]

Core Viewpoint - The rapid proliferation of AI applications is driving demand for advanced packaging technologies in the semiconductor industry, with TSMC's CoWoS becoming a well-known solution. The company is also developing next-generation packaging technologies like CoPoS and CoWoP to enhance area utilization and cooling efficiency [1][10]. Group 1: Advanced Packaging Technologies - CoWoS (Chip-on-Wafer-on-Substrate) integrates multiple chips on a substrate to reduce space and improve performance, particularly for AI chips requiring high bandwidth and low latency [2][6]. - TSMC's CoWoS-L variant has seen a significant increase in demand, accounting for approximately 60% of CoWoS sales, due to its lower cost and ability to integrate passive components [6][9]. - The next-generation packaging technologies, CoPoS and CoWoP, aim to reduce costs and improve efficiency, with CoPoS utilizing a rectangular panel to enhance area utilization [10][11]. Group 2: Market Growth and Projections - The Taiwanese semiconductor packaging industry is projected to reach NT$710.4 billion by 2025, with a CAGR of 13.9%, and further growth to NT$759 billion by 2026, driven by AI and HPC infrastructure demands [1][2]. - TSMC's advanced packaging capacity is expected to grow significantly, with CoWoS capacity increasing by over 80% and SoIC capacity by more than 100% from 2022 to 2026 [2][9]. Group 3: Industry Challenges and Developments - The semiconductor industry faces challenges in meeting the increasing demand for advanced packaging, necessitating collaboration and innovation among manufacturers [10]. - TSMC is expanding its advanced packaging facilities in the U.S. and Taiwan, with plans to start testing CoPoS by 2026 and mass production by 2028 [8][9]. - The shift towards advanced packaging is shortening the time from design to mass production, reducing the development cycle from approximately 1.5 years to less than a year [9][10].

Core Viewpoint - ASML's introduction of the TWINSCAN XT:260 marks its strategic entry into the advanced packaging market, highlighting the increasing importance of advanced packaging in semiconductor technology as traditional scaling approaches physical limits [2][34]. Group 1: Market Dynamics - The advanced packaging market is experiencing significant growth, driven by the rising demand for AI chips and high-performance computing, with a projected market size of $45.73 billion in 2024, expected to reach $113.33 billion by 2033, reflecting a compound annual growth rate (CAGR) of 9.5% [3]. - The demand for advanced packaging equipment is also on the rise, with projections indicating that the backend equipment revenue will reach approximately $7 billion by 2025 and exceed $9 billion by 2030, with a CAGR of nearly 6% [3]. Group 2: Equipment Trends - Key equipment areas such as thermal compression bonding (TCB) and hybrid bonding are rapidly growing, with the TCB market expected to reach $936 million by 2030, driven by integration needs in memory and AI platforms [6]. - The hybrid bonding equipment market is projected to grow at a CAGR of 21.1%, reaching $397 million by 2030, emphasizing its critical role in advanced 3D integration [9]. Group 3: Competitive Landscape - Major players in the backend equipment market include DISCO, BESI, K&S, ASMPT, and Hanmi, each specializing in different aspects of semiconductor manufacturing [21]. - DISCO leads in wafer thinning and cutting technologies, while BESI focuses on hybrid bonding equipment, indicating a diverse competitive landscape [23][26]. Group 4: ASML's Strategic Position - ASML's TWINSCAN XT:260 is designed specifically for advanced packaging, filling a technological gap in high-end packaging lithography and enhancing production efficiency and precision [34][37]. - The XT:260 features significant advancements, including a resolution of 400nm and a production efficiency of 270 wafers per hour, which is four times that of previous models [37]. Group 5: Domestic Market Challenges and Opportunities - Domestic suppliers currently meet less than 14% of local backend equipment demand, facing challenges from reliance on imported technologies and geopolitical uncertainties [41]. - However, domestic manufacturers are gaining momentum, supported by policies and capital investments, with expectations that the domestic backend equipment localization rate will exceed 20% by 2025 [42].

Core Insights - The demand for AI and high-performance computing (HPC) remains strong, leading to full capacity utilization for TSMC's advanced packaging in the coming year [1] - Major players like ASE Technology and KYEC are also experiencing significant orders, prompting them to expand production [1] - The generative AI wave initiated by OpenAI is driving explosive growth in HPC orders from companies like NVIDIA and AMD, with demand expected to last at least until the end of next year [1] Group 1 - TSMC is the sole supplier of high-performance computing capacity for NVIDIA and AMD, with its 2nm and 3nm advanced processes and SoIC, CoWoS advanced packaging fully booked [1] - ASE Technology is accelerating its advanced packaging and testing outsourcing to meet the substantial demand from AI clients [1] - ASE's subsidiary, SPIL, is set to complete its new facilities in Erlin and Douliu next year, alongside the acquisition of a facility in Kaohsiung, enhancing its operational capacity [1] Group 2 - KYEC has successfully secured a major testing order from NVIDIA for high-performance computing, with GB200/300 orders currently in mass production [2] - The testing capacity for NVIDIA's upcoming Rubin platform is expected to commence by the end of this year [2]