公众号记得加星标⭐️，第一时间看推送不会错过。 来源：内容来自 economictimes 。 一名印度IT部高级官员周四表示，截至目前，政府已批准的半导体项目每年将生产超过240亿片芯片， 还有更多项目正在筹备中。 在德国应用研究机构弗劳恩霍夫协会（Fraunhofer-Gesellschaft）组织的一次活动上，印度电子和信息技 术部（Ministry of Electronics and IT）副部长兼印度半导体使命（India Semiconductor Mission）首席 执行官阿米泰什·辛哈（Amitesh Sinha）表示，政府已批准了六个项目，其中包括一个由塔塔电子（Tata Electronics）建设的晶圆制造厂和五个封装工厂。 "塔塔的晶圆厂每月将生产5万片晶圆。另外五个封装工厂每年将生产240亿片芯片。还有更多的提案正 在评估中。因此，在不久的将来，你们会看到许多新项目获得批准，"他说。 辛哈表示，印度将成为半导体领域的长期参与者。 "许多稀土材料和永磁体回收等领域，你们可以看到与弗劳恩霍夫的协同效应。回到半导体，我们看到印 度已经批准了一些提案，并将批准更多，"辛哈说。 他呼吁德国 ...

Core Viewpoint - The article focuses on the latest advancements in semiconductor technology presented at the VLSI conference, highlighting innovations in chip manufacturing, including digital twins, advanced logic transistors, and future interconnects, as well as comparisons between Intel's 18A process and TSMC's technologies [1]. Group 1: FlipFET Design - Despite various restrictions, China continues to advance in semiconductor R&D, with Peking University's FlipFET design gaining significant attention for its novel patterning scheme that achieves PPA similar to CFET without the challenges of monolithic or sequential integration [2]. - The FlipFET technology involves a process where NMOS is formed on the front side and PMOS on the back side of the wafer, showcasing good performance for both types of transistors [8][10]. - The main drawback of FlipFET is its cost, as it requires multiple back-end processes and is more susceptible to wafer warping and alignment errors, potentially affecting yield [12]. Group 2: DRAM Developments - DRAM is at a pivotal point in its five-year roadmap with two key advancements: 4F2 and 3D technologies, with 4F2 expected to increase density by 30% compared to 6F2 without reducing minimum feature size [16][23]. - The 4F2 architecture necessitates vertical channel transistors to fit within the unit size, presenting manufacturing challenges due to high aspect ratios [24][31]. - 3D DRAM is being developed concurrently, with Chinese manufacturers showing strong motivation to innovate in this area due to its independence from advanced lithography technologies [36]. Group 3: Digital Twin Technology - Digital twin technology is becoming essential in semiconductor design and manufacturing, allowing for design exploration and optimization in a virtual environment before physical production [79]. - This technology spans atomic-level simulations to wafer-level optimizations, enhancing productivity and yield in semiconductor fabrication [80][87]. - The implementation of "unmanned" fabs is a future goal, aiming for automated maintenance and operation without human intervention, which poses challenges in standardizing processes across different equipment vendors [92]. Group 4: Intel's 18A Process - Intel's 18A process, set to enter mass production in late 2025, combines Gate-All-Around transistors with a PowerVia back power network, significantly reducing interconnect spacing and improving yield [74][78]. - The 18A process claims a 30% reduction in SRAM size compared to Intel's 3rd generation baseline, with performance improvements of approximately 15% at the same power consumption [76]. - The process also features a reduction in the number of front metal layers and an increase in back metal layers to support the new architecture, indicating a shift towards more efficient manufacturing [77].

如果您希望可以时常见面，欢迎标星收藏哦~ 来源：内容来自asu ，谢谢。 近60年来，全球巨头应用材料公司（Applied Materials）一直致力于开发不断改变微芯片制造方 式的技术。 他们的产品广泛应用于平板电视、智能手机和电动汽车等各类设备。应用材料已获得超过22,000 项专利，其20世纪80年代推出的Precision 5000芯片制造系统更被永久收藏于史密森学会。 富尔顿学院的教师获得了应用材料的研究资助，用于推动创新、促进产业与学术进步。目前，已有 多个旨在开发新材料、改进制造工艺的项目在进行中。 在ASU物质、传输与能源工程学院，Seth Ariel Tongay教授与该公司合作开展多项研究，探索二 维材料在先进半导体制造中的应用。这类材料的厚度可达原子级，有望提升电流传输效率，提高速 度与能效。 但这家美国最大的半导体设备制造商也在推进另一项事业：创新精神。 该 公 司 正 在 亚 利 桑 那 州 立 大 学 （ ASU ） 艾 拉 · 富 尔 顿 工 程 学 院 （ Ira A. Fulton Schools of Engineering）发起一系列投资项目，旨在加速科研发现、帮助研究 ...

如果您希望可以时常见面，欢迎标星收藏哦~ https://www.intellinews.com/china-creates-world-s-thinnest-chip-with-5931-transistors-378131/ 点这里加关注，锁定更多原创内容 来源 ：内容编译自 intellinews ，谢谢。 据《IEEE Spectrum》报道，中国研究人员研制出迄今为止最先进的二维材料微处理器，其内部集 成了5931个由二硫化钼制成的晶体管，厚度仅为三个原子。二硫化钼由两层硫层之间的钼层构 成，由于其原子级厚度和高效率，被视为硅的有力替代者。 这种新型微处理器可能对众多行业产生突破性的影响，并受到世界各地其他研究人员的密切关注。 这款名为 RV32-WUJI 的芯片基于开源 RISC-V 架构，能够执行标准的 32 位指令。它基于绝缘蓝 宝石基底，配备全新开发的单元库，包含 25 种逻辑门类型，能够执行"与"和"或"等基本计算功 能。与之前仅管理 156 个晶体管的二维电路相比，这一进展标志着一个重要的里程碑。 尽管 RV32-WUJI 的运行频率仅为 1 千赫兹，功耗仅为 0.43 毫瓦，但它展示了 ...

如果您希望可以时常见面，欢迎标星收藏哦~ 2024年，AI引发的芯片需求全面爆发，半导体产业结构性转型持续演进。在这一年，台积电 再次交出了一份亮眼答卷：不仅巩固了其技术领先地位，还在产能、营收、客户结构与全球 战略布局方面全面开花，成为当前全球最具战略纵深的半导体企业。 透过其刚刚发布的2024年年报，我们可以更清晰地看到：在这场以AI为主引擎的产业变革 中，台积电正以技术为根基、制造为核心、生态为延伸，持续构筑属于自己的"护城河"。 AI爆发年，台积电"稳稳赢麻" 2024年，尽管全球经济仍充满不确定性，传统消费电子市场复苏缓慢，但AI相关芯片的需求却持 续强劲，推动晶圆代工行业走出低谷，重回成长轨道。台积电成为最大受益者之一。 年报显示，2024年台积电全年合并营收达900亿美元，同比增长30%；税后净利达365亿美元，同 比大幅增长35.9%。毛利率达到56.1%，营业利益率达45.7%，皆创历史新高。 作为全球晶圆代工产业的龙头，台积电已经在业内建立起不可动摇的地位。台积电在IDM 2.0产业 （包括了封装、测试和光罩制造等更多环节）中 占据34%的市场份额 ，较2023年的28%显著提 升，进一步 ...

Core Viewpoint - A team of 30 scientists from the Indian Institute of Science (IISc) has proposed the development of "angstrom-level" chips, significantly smaller than the current smallest chips, to enhance India's position in the semiconductor industry [1][2]. Group 1: Proposal Details - The proposal aims to develop chips using new semiconductor materials known as two-dimensional materials, which could reduce chip size to one-tenth of the current smallest chips produced globally [1]. - The current smallest chips are produced using 3-nanometer nodes by companies like Samsung and TSMC [1]. - The detailed project report (DPR) was initially submitted in April 2022 and revised for resubmission in October 2024, indicating ongoing governmental discussions [1][3]. Group 2: Government and Industry Response - The Indian Ministry of Electronics and Information Technology (MeitY) is positively inclined towards the project, exploring electronic applications for the proposed technology [2]. - India's semiconductor manufacturing heavily relies on foreign companies, making this project strategically significant for economic and national security [2]. - The largest semiconductor project in India, a collaboration between Tata Electronics and Taiwan's TSMC, has an investment of ₹910 billion and has received government approval for 50% funding support [2]. Group 3: Funding and Global Context - The IISc-led proposal requests ₹5 billion over five years for developing indigenous semiconductor technology, which is relatively modest compared to other global investments [2]. - Countries like Europe and South Korea have invested significantly in two-dimensional materials, with Europe exceeding $1 billion (approximately ₹83 billion) [2]. - The urgency for India to act is emphasized, as global tech companies are shifting focus towards two-dimensional semiconductors, and the window for India to execute this proposal may close soon [3].

如果您希望可以时常见面，欢迎标星收藏哦~ 印度电子和信息技术部（MeitY）的消息人士证实，该提案正在讨论中。 一位知情官员表示："印 度半导体技术与创新部（MeitY）对该项目持积极态度。首席科学顾问兼秘书长已就此举行会议。 MeitY正在探索可部署此类技术的电子应用。这是一项合作项目，每一步都需要尽职调查。" 印度目前在半导体制造方面严重依赖外国企业——这项技术从经济和国家安全角度来看都具有战略 意义。该国最大的半导体项目由塔塔电子与台湾力积电合作设立，投资额达9100亿卢比。该项目 已获得印度半导体计划的批准，并有资格获得政府50%的资金支持。相 比之下，印度理工学院（IISc）牵头的提案要求在五年内拨款50亿卢比，用于打造下一代半导体的 本土技术，但金额相对较低。该项目还包括初始融资阶段后的自主可持续发展路线图。 在全球范围内，二维材料引起了广泛关注。欧洲已投资超过10亿美元（约合830亿卢比），韩国投 资超过3亿卢比，中国和日本等国家也对基于二维材料的半导体研究进行了大规模但未公开的投 资。一位不愿透露姓名的官员表示："二维材料将成为未来异构系统的关键推动因素。 尽管全球发展势头强劲，但印度在这方面 ...