Group 1 - TSMC plans to delay its chip plant project in Japan and prioritize operations in the United States to avoid tariffs imposed by President Trump [1] - TSMC stated that its investment plans in the U.S. would not impact existing investment plans in other regions [3] - The company's global manufacturing expansion strategy is based on customers' needs, business opportunities, operating efficiency, government support, and cost considerations [3]

Group 1 - Proactive provides fast, accessible, informative, and actionable business and finance news content to a global investment audience [2] - The news team covers medium and small-cap markets, as well as blue-chip companies, commodities, and broader investment stories [3] - Proactive's content includes insights across various sectors such as biotech, pharma, mining, natural resources, battery metals, oil and gas, crypto, and emerging technologies [3] Group 2 - Proactive is committed to adopting technology to enhance workflows and content production [4] - The company utilizes automation and software tools, including generative AI, while ensuring all content is edited and authored by humans [5]

Core Viewpoint - TSMC's stock has surged 37% in the past three months, with expectations of reaching new highs following its upcoming Q2 earnings report on July 17 [1][12]. Group 1: Market Position and Revenue Growth - TSMC's foundry market share has increased to nearly 68% in Q1 2025, a six percentage point improvement year-over-year [4]. - The company experienced significant revenue growth, with April revenue up 48% year-over-year and May revenue up almost 40% [5]. - Analysts project a 37% increase in TSMC's Q1 revenue compared to the previous year, indicating strong performance [5]. Group 2: Demand for AI Chips - TSMC is witnessing a surge in demand for AI chips, with major clients like Nvidia and Apple increasing orders [6][7]. - The company is expanding its production capacity, planning to build nine new fabrication plants by 2025 to meet this demand [7]. Group 3: Financial Performance Expectations - TSMC is expected to exceed Wall Street's Q2 expectations due to increased capacity and strong demand for its chips [8]. - The company is raising prices for its current and next-generation process nodes, which may enhance its margin profile and earnings growth [9]. - Analysts forecast a 54% increase in TSMC's earnings for the current quarter, estimating earnings of $2.28 per share [11]. Group 4: Valuation and Investment Considerations - TSMC is trading at 27 times sales, which is lower than the Nasdaq-100 index's price-to-earnings ratio of 32, making it an attractive investment [13]. - The forward earnings multiple of 24 is appealing, especially with expected acceleration in bottom-line growth [14]. - The strong outlook for TSMC, driven by robust demand for AI chips, suggests potential for stock price appreciation [12][16].

TSMC is delaying construction of a second plant in Japan partly because it is pouring funds more quickly into U.S. expansion ahead of potential Trump tariffs https://t.co/WZAIgxbzuI ...

Core Viewpoint - TSMC has decided to prioritize investment in expanding its U.S. operations over the construction of a second factory in Kumamoto, Japan, due to concerns over potential tariffs imposed by the Trump administration on imported chips [1][2]. Group 1: Investment Decisions - TSMC's second factory in Japan was part of a $20 billion investment plan, which has received over $8 billion in support from the Japanese government [2]. - The construction of the second factory, initially scheduled to begin earlier this year, has been delayed, with no accurate timeline for the start of operations currently available [3]. - TSMC's global expansion continues, with a factory under construction in Germany expected to be operational by the end of 2027 [3]. Group 2: U.S. Operations - TSMC announced plans to invest at least $100 billion in the U.S. over the coming years, in addition to a previously announced investment of $65 billion [3]. - The company is building its third chip factory in Phoenix, Arizona, which will be the only facility outside Taiwan capable of producing the most advanced process chips for major U.S. tech companies like Apple, NVIDIA, and AMD [3].

如果您希望可以时常见面，欢迎标星收藏哦~ 来 源： 内容 编译自wsj 。 据知情人士透露，台积电推迟在日本建设第二家工厂，部分原因是该公司在特朗普政府可能加征关 税之前，加快了向美国扩张的资金投入。 修改后的时间表是特朗普总统强硬的贸易立场如何以牺牲盟友利益为代价，吸引部分投资流向美国 的最新例证。各大科技公司已承诺扩大目前在墨西哥和台湾等地生产的人工智能服务器的美国生 产。 全球许多地区都渴望台积电加大投资。台积电服务于苹果和英伟达等客户，市值接近1万亿美元。 美国、日本、欧洲以及台积电的总部所在地台湾都将半导体视为战略产业，并为台积电的扩张提供 了资金支持。 然而，分析师表示，台积电以其对资本支出一丝不苟而闻名，并且担心产能建设超出市场承受能 力。由于特朗普威胁要对进口芯片征收关税，确保美国有足够的产能成为当务之急。 台积电去年年初表示，将在日本南部的熊本县建造第二家工厂，这是该公司200亿美元投资计划的 一部分，该计划已获得日本政府超过80亿美元的支持。 第一家日本工厂已于去年秋季开始为丰田等客户生产芯片。第二家工厂的建设最初计划于今年年初 开工。台积电董事长魏哲家在6月份表示，由于日本该地区的车流量 ...

Core Viewpoint - TSMC is delaying the construction of its chip factory in Japan to avoid tariffs imposed by Trump, prioritizing investments in the United States instead [1] Group 1 - TSMC's decision is influenced by the current trade policies and tariffs, particularly those related to the Trump administration [1] - The company aims to focus on U.S. investments, indicating a strategic shift in its operational priorities [1] - This move may impact the semiconductor supply chain dynamics in Asia, particularly in Japan [1]

Group 1 - TSMC is approaching its Q2 earnings report on July 17, which could significantly impact its premium valuation for the coming years [1] - The company is projected to achieve a 54% growth in EPS, indicating a structural inflection point [1] - Pythia Research emphasizes a multidisciplinary approach to identify high-potential stocks, particularly in the technology sector, by combining financial analysis with behavioral finance and alternative metrics [1] Group 2 - The investment strategy focuses on uncovering breakout opportunities before they gain mainstream attention, leveraging both traditional and unconventional insights [1] - The analysis of market sentiment and emerging trends is crucial for investing in transformative businesses poised for exponential growth [1] - The company aims to capitalize on market inefficiencies created by investor behavior, such as herd mentality and recency bias, which can lead to mispricing [1] Group 3 - The investment process includes evaluating opportunities based on their risk/reward profile, seeking limited downside and explosive upside potential [1] - The belief is that the best returns arise from understanding where investor belief lags behind reality [1] - The focus is on conviction plays rather than safe bets, with an emphasis on identifying early signals of growth and momentum [1]

Core Viewpoint - TSMC is actively developing advanced packaging technology called System over Wafer (SoW), which integrates large-scale, high-speed systems on 300mm silicon wafers or similar-sized substrates, offering high computational power, fast data transmission, and reduced power consumption [1][3]. Group 1: InFO Technology Development - The origin of SoW technology lies in TSMC's InFO (Integrated Fan-Out) packaging technology, designed for mobile processors, which allows for miniaturization and thin packaging [3]. - TSMC provided CoWoS (Chip on Wafer) packaging technology for high-performance large-scale logic (FPGA, GPU) around 2020, utilizing silicon interposers for high-density connections [3]. - TSMC has also prepared and mass-produced InFO_oS (Chip on Wafer) technology, which uses InFO for high-density connections between chips, serving as a low-cost packaging solution for high-performance large-scale logic [3][5]. Group 2: InFO_SoW Application - InFO_SoW extends the RDL size of InFO_oS to 300mm silicon wafers, placing multiple silicon chips face down on the RDL, with power modules and I/O IC connectors installed on the back [5][6]. - The basic structure of InFO_SoW features a six-layer wiring design with different rules for the silicon side and the back, capable of handling approximately 7,000W of power through water cooling [6][19]. Group 3: Cerebras Systems and WSE Technology - Cerebras Systems has applied InFO_SoW technology in its deep learning accelerator, the WSE (Wafer Scale Engine), which has a surface area of 46,225 square mm [10][19]. - The main difference between InFO_SoW and WSE technology lies in how they handle silicon chips; InFO_SoW assumes small chips are placed on a wafer-sized RDL, while WSE manufactures 84 microchips on a 300mm wafer [10][11]. - Cerebras has released multiple generations of WSE, with the first generation using 16nm technology, the second generation using 7nm, and the third generation using 5nm technology, significantly increasing transistor counts [17][18]. Group 4: Performance and Future Developments - The performance of InFO_SoW technology shows a reduction in wiring width/spacing by half compared to multi-chip modules (MCM), doubling the wiring density and data transmission rate per unit length [19]. - TSMC is also developing the next generation of InFO_SoW technology, named SoW-X (eXtreme), which differs from SoW-P by distributing components across processors and memory modules [21][23].

Core Insights - Morgan Stanley reports that TSMC has initiated the construction of a 310mm Panel-Level chiplet advanced packaging pilot line, marking the beginning of a significant transformation in the advanced packaging industry [1][2] - The CoPoS (Chip-on-Panel-on-Substrate) system aims to address capacity bottlenecks and cost issues in the CoWoS (Chip-on-Wafer-on-Substrate) process, particularly for next-generation AI training and inference GPUs and ASICs [1][3] Industry Developments - TSMC's investment in the CoPoS 310mm pilot line coincides with ASE's announcement of a 300mm panel 2.3D packaging technology, indicating a rapid transition in the advanced packaging sector [2] - The semiconductor industry anticipates large-scale delivery and installation of CoPoS-related equipment by mid-2026, with process ramp-up expected in 2027 [2] Technical Advancements - CoPoS leverages silicon interposer technology from CoWoS but makes systematic adjustments in substrate form, high-end semiconductor equipment, and yield bottlenecks, aiming for enhanced performance and scalability [2][4] - The CoPoS process allows for a higher number of chiplets and HBM stacks in a single package, significantly increasing bandwidth and capacity compared to existing CoWoS solutions [3][8] Market Implications - Major AI and HPC clients like NVIDIA and AMD stand to benefit from CoPoS, which alleviates supply constraints and reduces manufacturing costs [3] - The transition to CoPoS is expected to drive substantial growth across the semiconductor supply chain, particularly for high-end equipment manufacturers [5] Future Outlook - The CoPoS system is projected to enable a peak bandwidth of over 13-15TB/s, with storage capacity potentially doubling, thus meeting the surging demand for AI computational power [8] - As AI model parameters continue to grow, CoPoS will leverage its panel area advantages to enhance AI chip performance and reduce unit cost of computation [8]