January 27, 2026 10:15 PM GMT Asia-Pacific Technology | Asia Pacific AI Supply Chain: TPU/ASIC updates; ICMS NAND demand calculation We sense that AI semi vendors have started securing critical 2027 components – T-Glass/ABF, HBM, and TSMC 3nm – (e.g., MediaTek's 3nm TPU). Downgrade Egis to EW, as its 2026 appears to be shaping up as a year of transition. ASIC – Volume upside for MediaTek's 3nm TPU project in 2027: In our Target Price Up report, we highlighted the supply chain's bull case of 6-7mn TPU units ...

Lattice Semiconductor FY Conference Summary Company Overview - **Company**: Lattice Semiconductor (NasdaqGS:LSCC) - **Industry**: Semiconductor, specifically low-power programmable devices - **Market Position**: Leading provider with over 40 years of innovation in the programmable market - **Key Markets**: Communications, computing, industrial, automotive, and consumer markets [1][2] Core Business Insights - **Revenue Breakdown**: - Communications and computing account for over 50% of revenue - Server business grew 80% year-on-year - Communication segment grew 63% year-on-year - Industrial automotive segment is expected to return to growth in 2026 [3][22] - **Production Volume**: Shipped over 150 million units last year, expected to increase to 180 million this year [3] Strategic Pillars 1. **Companion Role**: Lattice provides support functions for powerful ASICs, enhancing their performance and functionality [4][5] 2. **Small and Mid-Range FPGA Roadmap**: Focused on developing the best roadmap for small and mid-range FPGAs, emphasizing low latency, high precision, and parallel processing capabilities [15][18] 3. **Sustainable Growth**: The company aims for sustainable growth through innovation and expanding its product portfolio [18][19] Market Trends and Growth Drivers - **Disaggregation in AI Servers**: Transition from single board to multiple specialized boards (processor, networking, storage, etc.) is increasing FPGA usage per rack [25][26] - **CapEx Growth**: Anticipated 50% growth in capital expenditures for cloud service providers, contributing to demand for FPGAs [26] - **AI Server Growth**: AI servers currently represent 12% of total servers, with higher FPGA content compared to traditional servers [27][28] Financial Performance and Projections - **Gross Margin**: Currently at 69%-70%, with strong EBITDA and free cash flow [21] - **Long-Term Growth Rate**: Expected to be between 15%-20%, with a consensus growth rate of 21% for the current year [21][23] - **2026 Outlook**: Anticipated to be a strong year for data centers and small FPGAs, with growth in industrial automotive expected to ramp up in 2027 [22][23] Competitive Landscape - **Main Competitors**: Xilinx is the primary competitor, with Altera being monitored for potential aggressive moves in the market [39][40] - **Market Differentiation**: Lattice emphasizes its unique low-power, small FPGA architecture as a sustainable competitive advantage [39] Capital Allocation and M&A Strategy - **Focus on Organic Growth**: Prioritizing organic investments in product expansion and innovation [41] - **Potential for Inorganic Growth**: Open to strategic acquisitions to enhance customer offerings and capabilities [42][43] Conclusion - Lattice Semiconductor is well-positioned for growth in the semiconductor industry, particularly in low-power programmable devices, with a strong focus on innovation, market expansion, and strategic partnerships. The company is set to capitalize on emerging trends in AI and data centers while maintaining a competitive edge through its unique product offerings and robust financial health [20][44]

Core Insights - The operational data of four companies in the FPGA industry reveals a clear distinction between "light asset short cycle leaders" and "heavy R&D long cycle pressures" [1][5] Group 1: Operational Efficiency - Xinhenghui leads in operational efficiency with a cycle of 199.94 days, a stock turnover rate of 3.42 times, and a total asset turnover rate of 0.41 times, significantly outperforming its peers [1][3][2] - Fudan Microelectronics and Anlu Technology are experiencing long operational cycles exceeding 800 days, with stock turnover rates below 0.5 times, indicating lower operational efficiency [1][6][2] - Unigroup Guowei is positioned in the middle tier with stable performance across various metrics, reflecting a balanced operational strategy [1][8] Group 2: Business Models and Strategies - Xinhenghui's advantage stems from its focus on light asset business in smart security chip packaging and testing, which requires less capital investment compared to FPGA design firms [3][9] - Fudan Microelectronics and Anlu Technology's long cycles are a result of their commitment to high R&D investments in FPGA chip design, which limits short-term operational efficiency [6][7] - Unigroup Guowei's diversified business model allows it to balance R&D costs and operational efficiency, contributing to its stable performance [8][9] Group 3: Market Dynamics - The FPGA market is undergoing changes, with increased competition in the mid-to-low-end segments and continued dominance by major players in the high-end market, necessitating strategic choices for domestic companies [9] - Companies like Xinhenghui are focusing on niche markets to enhance asset turnover efficiency, while Fudan Microelectronics and Anlu Technology are navigating long cycles as a necessary cost of technological advancement [9]

Summary of Key Points from the Conference Call Industry Overview - The focus is on the **AI semiconductor industry**, particularly the dynamics surrounding **AI GPUs** and **AI ASICs**. The demand for these components is expected to be strong in 2026, driven by supply factors such as memory availability and TSMC's 3nm technology [1][4][42]. Core Insights - **Nvidia's Production**: Nvidia's management reported that the **Rubin** compute board is in "full production," with assembly time significantly reduced from approximately **2 hours** for Blackwell to about **5 minutes** for Rubin. The launch is anticipated in the **second half of 2026** [2][54]. - **China's AI Chip Demand**: There is a forecast of around **2 million units** of H200 chips demanded by Chinese customers, with ongoing licensing processes. Companies like **ByteDance** are actively developing AI server racks compatible with both Nvidia and local chips [4][84]. - **Market Size Projections**: The total AI chip market is projected to reach **US$550 billion** by **2029**, which includes both AI GPUs and ASICs. This reflects a significant growth trajectory for the sector [5][42]. Capacity and Production Dynamics - **TSMC's CoWoS Capacity**: TSMC is expected to expand its CoWoS capacity by **20-30%** in 2026, with a revised forecast of **125kwpm** by the end of the year, marking a **79% increase** from previous estimates [12][43]. - **ASE/SPIL and Amkor**: Both ASE/SPIL and Amkor are also expanding their CoWoS capacities to meet rising demand from key customers like Nvidia, AMD, and AWS [13][14]. - **Google TPU Production**: Google is accelerating the production of its next-generation **TPU** chips, moving the timeline from **4Q26** to **3Q26**. Broadcom has also booked **30k** of CoWoS-S capacity to meet TPU demand [26][28]. Financial Outlook - **Revenue Growth**: TSMC is projected to generate **US$107 billion** from AI chip foundry services by 2029, which would account for about **43%** of its total revenue [44]. - **Cloud Capex Spending**: Estimated cloud capital expenditure for 2026 is projected to reach **US$632 billion**, indicating robust investment in AI infrastructure [45]. Risks and Considerations - **Supply Chain Risks**: The primary concerns for 2026 are expected to be shortages in memory, T-Glass, and TSMC's 3nm wafers, rather than CoWoS capacity itself [43][42]. - **China's Localization Efforts**: China is expected to increase its local chip production to support AI development, which may create additional demand for both local and foreign chips [81][82]. Additional Insights - **ByteDance's AI Server Racks**: At a recent conference, ByteDance showcased its **256-node AI server racks**, which are designed to work with both Nvidia and local AI chips, highlighting the competitive landscape in China's AI market [84]. - **Market Dynamics**: The AI semiconductor market is characterized by rapid growth and evolving dynamics, with significant implications for companies involved in chip production and supply chain management [42][43]. This summary encapsulates the key points discussed in the conference call, providing insights into the current state and future outlook of the AI semiconductor industry.

Financial Data and Key Metrics Changes - In Q3 2025, total revenue was $17.4 million, up 5% sequentially and 18% year-over-year, exceeding guidance [17] - Annual contract value plus royalties reached $74.9 million, a 24% year-over-year increase, marking a new record [18] - Remaining performance obligations were $104.7 million, representing a 34% year-over-year increase, surpassing the $100 million milestone for the first time [18] - Non-GAAP gross profit was $15.9 million, with a gross margin of 91% [18] - Non-GAAP operating loss was $3.5 million, in line with guidance [19] - GAAP net loss was $9 million, or diluted net loss per share of $0.21 [20] Business Line Data and Key Metrics Changes - AI applications accounted for over half of licensing dollars in Q3, indicating strong product adoption across multiple vertical markets [6] - FlexGen was deployed by multiple new customers, including in the automotive sector, highlighting its growing adoption [8][9] - The company saw increased adoption of chiplets for high-end automotive applications, with two of the top five EV automotive OEMs expanding their use of Arteris technology [11] Market Data and Key Metrics Changes - The semiconductor industry is shifting from traditional monolithic chips to chiplets for multi-die SoC architectures, particularly driven by AI workloads [10] - The company is experiencing a growing demand for advanced boundary nodes, particularly in the 5nm, 3nm, and 2nm processes [9] Company Strategy and Development Direction - The company aims to enhance its product portfolio and expand collaborations with major technology firms, as evidenced by partnerships with Altera and AMD [6][8] - Arteris joined the UALink Consortium to support the scaling of data center solutions, indicating a strategic focus on AI workloads [13] - Continuous innovation is a priority, with recognition received for its technology, including awards for innovative technology [14][15] Management's Comments on Operating Environment and Future Outlook - Management expressed optimism about the strong deal execution and the potential for accelerated interest from major customers [21] - The company anticipates that AI workloads will drive significant growth, with expectations that data center applications will represent 25%-35% of future business [47] Other Important Information - The company ended the quarter with $56.2 million in cash and no financial debt, indicating a strong balance sheet [20] - Free cash flow was positive at $2.5 million for the quarter, above guidance [20] Q&A Session Summary Question: Can you talk more about Altera? - Management indicated that there are further opportunities with Altera, as they continue to evolve and grow [24] Question: What led to AMD's increased usage of your product? - Management noted that AMD has multiple groups, and the expansion reflects their satisfaction with the initial collaboration [25] Question: How important is reliability and safety in your interconnects? - Management emphasized that reliability is crucial, as any issues can lead to significant delays and problems for customers [26] Question: What is the timing for licenses from the UALink Consortium? - Management stated that they are already involved in designs and following the consortium's protocol to support data center scale-up efforts [30] Question: What is the royalty growth expectation? - Management explained that there is typically a 3-6 year lag between design starts and mass production, but they are seeing early signs of royalty growth [34][36] Question: How many top tech companies are customers? - Management indicated that they have penetrated over 50% of the top 40 semiconductor and system electronics companies, with significant room for growth [39][40]

Core Viewpoint - Turkey is preparing to initiate large-scale domestic chip production to reduce reliance on foreign technology [2][3] Group 1: Domestic Chip Production Plans - Yongatek Microelectronics, a Turkish chip design company, has been working since 2014 to become a national chip design and production center [2] - The company is collaborating with Turkish appliance manufacturer Beko to develop microcontrollers (MCUs) as part of the HIT-30 funding program, with prototype production expected by the end of this year and mass production starting next year [2] - Beko alone is projected to use 30 million MCUs annually, with potential demand in defense, robotics, and IoT reaching 50 million units [2] Group 2: Global Chip Market Context - The ongoing US-China tech and chip trade war poses a threat to other countries' development of autonomous chip capabilities [2] - Major US companies like Nvidia, Qualcomm, Broadcom, and Apple are relocating chip production back to the US, which could create new fronts in the "chip war" [3] - Chips are expected to become a decisive resource of the century, with AI emerging as a key competitive arena [3] Group 3: Investment and Infrastructure - Turkey plans to provide approximately $5 billion in support to attract international tech companies to establish production facilities in the country [3] - Currently, Turkey relies almost entirely on imported chips, with limited domestic production of sensors [3] Group 4: Initial Production Focus - The first chips produced in Turkey will focus on home appliances, with potential for 28nm or 40nm chips, and possibly 22nm chips for the automotive sector in the future [4][5] - Establishing chip production lines may take up to three years, and collaboration with institutions like Aselsan and TÜBITAK is encouraged [5] Group 5: Defense and Advanced Technology - The defense industry faces chip supply bottlenecks, particularly with field-programmable gate arrays (FPGAs), which are widely used [5] - Yongatek is working with foreign companies to develop autonomous FPGAs and is also developing AI chips for smart cameras and smart city security applications [5] - The AI camera chip is expected to enter mass production by 2027-2028, while FPGA development is ongoing through the European Union [5] Group 6: Talent and Knowledge Retention - To end reliance on foreign technology, Turkey needs to establish more chip design centers and encourage Turkish engineers working abroad to return and contribute to national development [6]

Challenges with Current NoC Solution - Current NoC IP requires all instances to be placed on a block design canvas, making the block design a bottleneck for teams modifying NoC connectivity or attributes [4][6] - Routing AXI busses through the RTL hierarchy is a tedious process [5][6] - Additional complications arise when considering DFX use cases [6] Modular NoC Solution Overview - The modular NoC solution allows the NoC to be distributed among various design sources and hierarchies, resolving issues with the current solution [7] - The solution comprises three main steps: connecting AXI busses to Xilinx Parameterizable Macros (XPMs), adding constraint files (XDCs) to define connectivity and QoS parameters, and executing the `validate_noc` command [7][9][10] - The `validate_noc` command ensures full connectivity between XPM instances, runs DRCs, and executes the NoC compiler to generate the NoC solution [10][21] Key Features and Benefits - Teams can develop solutions independently, and the tool ensures the NoC is not overcommitted [8][10] - The solution maintains compatibility with the current solution, and simulation, debug flows, Vitis Unified IDE, and system software support are unchanged [11] - The solution is designed with enough flexibility to accommodate future enhancements such as security and isolation features [12] Supported Use Cases - AXI Master in the RTL accessing a port of the DDR memory controller on the block design [25] - A master on the BD accessing a peripheral in the RTL [26] - An RTL master accessing peripherals of the processing subsystem [26] - RTL to RTL NoC transfers [27] Tutorials and Further Learning - A series of tutorials are available for download, covering foundational concepts, DFX basics, advanced NoC properties, advanced DFX topics, and HBM [30]

Modular NoC Solution Overview - The modular NoC solution involves connecting AXI busses to Xilinx parameterizable macros (XPMs), adding constraint files (XDCs) to define connectivity and quality of service (QoS) parameters, and running the validate NoC command [2] - The focus is on adding constraint files (XDCs) to define connectivity and QoS parameters for each NoC connection [3] XDC Constraint File Configuration - XDC files can be specified per module and do not require RTL elaboration when modified [4] - The XDC file defines the addressing aperture of the NSU, ensuring addresses are routed appropriately; if the NSU is in the block design, the aperture is defined in the BD and doesn't need specification in the XDC [6] - The XDC file creates NoC connections between NMUs and NSUs and applies QoS constraints to those connections [7] - Setting the USED_IN property of the XDC file to "synthesis_pre" is necessary for the validation command to find the NoC constraints [10] Creating NoC Connections - The "get_noc_interfaces" command is used to get a list of available NoC interfaces in the design [11] - The "create_noc_connection" command is used to create connections between NMUs and NSUs [12][15] - The "set_property" command is used to specify QoS properties like READ_BANDWIDTH, READ_AVERAGE_BURST, WRITE_BANDWIDTH, and WRITE_AVERAGE_BURST, as well as TDEST_IDs for the connections [15][16]

Core Viewpoint - The article discusses the acquisition of Xilinx by AMD, focusing on the developments and performance of Xilinx post-acquisition, particularly in the context of AI, data centers, and FPGA technology. Group 1: Acquisition Rationale - AMD's acquisition of Xilinx for $49 billion was primarily aimed at enhancing capabilities in AI, data centers, and edge computing, rather than traditional markets like 5G and automotive [2][4]. - Xilinx's FPGA and AI engine technologies complement AMD's CPU and GPU offerings, providing efficient solutions for data-intensive applications [2]. Group 2: Historical Context - The article references Intel's acquisition of Altera, which was influenced by Microsoft's promotion of FPGA in data centers, ultimately leading to Intel's underperformance in the FPGA market [3]. - Despite initial expectations, the use of FPGA in data centers did not meet Microsoft's needs, leading to a preference for NVIDIA GPUs for AI model training [3]. Group 3: Post-Acquisition Developments - AMD established the Adaptive and Embedded Computing Group (AECG) to focus on FPGA and SoC roadmaps, led by former Xilinx CEO Victor Peng [4]. - Xilinx's product updates post-acquisition have been moderate, with expectations for stable growth in the FPGA market rather than significant breakthroughs [8][11]. Group 4: Financial Performance - Xilinx's revenue for the fiscal year 2021 was $3.15 billion, showing stability despite global supply chain challenges [11]. - The Embedded business segment revenue for AMD in 2022 was approximately $4.53 billion, reflecting a 17% increase in 2023 to $5.3 billion, attributed to the integration of Xilinx's revenue [17][18]. - However, the Embedded segment revenue is projected to decline to $3.6 billion in 2024, a 33% decrease from 2023, influenced by market demand and U.S. export restrictions [19][22]. Group 5: Market Outlook - The article concludes that three years post-acquisition, there have been no groundbreaking products from the integration, and the FPGA market remains stable [22]. - AMD's data center business saw significant growth, reaching $12.6 billion in 2024, a 94% increase, but the specific contribution of FPGA technology remains unclear [22].

Core Viewpoint - The article discusses the evolution and impact of FPGA technology over the past 40 years, highlighting its significant role in various industries and its potential for future applications, especially in AI and adaptive computing [3][5][11]. Group 1: Historical Context and Development - The first commercial FPGA, XC2064, was introduced in 1985, challenging the prevailing industry norms by allowing for configurable logic blocks [1]. - FPGA technology has led to the creation of a market valued at over $10 billion, with a projected compound annual growth rate (CAGR) of 10% from 2023 to 2029, reaching $15.4 billion [5][10]. Group 2: Current Applications and Market Presence - FPGAs are now ubiquitous in various sectors, including automotive, aerospace, telecommunications, and data centers, demonstrating their versatility and adaptability [6][10]. - AMD has delivered over 3 billion FPGAs and adaptive SoCs to more than 7,000 customers across different market segments [10]. Group 3: Future Directions and Innovations - The future of FPGA technology is focused on enhancing edge AI applications, with potential uses in autonomous driving, robotics, and 6G networks [11][12]. - Innovations in hardware and software are necessary to address challenges such as design complexity and high power consumption, with AMD investing in tools to improve developer accessibility [12][13].