Group 1 - Huawei launched AI SSD products, including the Huawei OceanDisk EX/SP/LC series, with capacities reaching up to 122/245 TB, marking the largest single-disk capacity in the industry [1] - The AI SSD is optimized for AI workloads, combining multiple core technologies developed by Huawei, and is expected to be a key breakthrough for domestic SSDs [1] - The rapid proliferation of AI applications has led to exponential data growth, with the total global internet corpus increasing from 350 PB (text) to 154 ZB (multi-modal), highlighting the limitations of traditional storage media [1] Group 2 - The model training phase faces significant challenges, requiring 13.4 TB of memory and 168 cards for training a 671B model, which severely limits training efficiency and flexibility [1] - The model inference phase also struggles with slow performance, with an average time to first token (TTFT) of 1000 ms, which is twice that of American models, and a token per second (TPS) rate of only 25, significantly impacting user experience [2] - High-performance AI SSDs are becoming the industry choice, but overseas manufacturers dominate the SSD market, with Samsung, SK Hynix, Micron, Kioxia, and SanDisk leading the market share [2] Group 3 - Despite the current dominance of HDDs in server storage, the advantages of SSDs in AI scenarios, such as energy efficiency and low operating costs, are driving rapid penetration, with SSDs expected to account for 9%-10% of server storage solutions by 2024 [2] - The domestic market is predicted to gradually replace HDDs with large-capacity QLC SSDs, facilitating a transition from a "capacity-oriented" to a "performance and capacity dual-optimization" model [3] - As of June 2023, China's storage capacity reached 1680 EB, showing significant growth and advancements in external flash memory applications, particularly in finance, manufacturing, and internet sectors [3]

Summary of Conference Call on Scale Up Network Growth from NVIDIA's Perspective Industry Overview - The discussion revolves around the **Scale Up network** in the context of **NVIDIA** and its implications for the broader **computing power** industry, particularly in AI and parallel computing applications [1][5][9]. Core Insights and Arguments - **Scaling Law**: The concept of a "Scaling Law" in networks is proposed, emphasizing the need for larger cross-cabinet connections rather than just existing ASIC and cabinet solutions [1][5]. - **NVIDIA's Strategy**: NVIDIA aims to address hardware memory wall issues and parallel computing demands by increasing **Nvlink bandwidth** and expanding the **Up scale** from H100 to GH200, although initial adoption was low due to high costs and insufficient inference demand [6][8]. - **Memory Wall**: The memory wall refers to the disparity between the rapid growth of model parameters and computing power compared to memory speed, necessitating more HBM interconnect support for model inference and GPU operations [1][10]. - **Performance Metrics**: The GB200 card shows significant performance differences compared to B200, with a threefold performance gap at 10 TPS, which increases to sevenfold at 20 TPS, highlighting the advantages of Scale Up networks under increased communication pressure [4][14][15]. - **Future Demand**: As Scale Up demand becomes more apparent, segments such as **fiber optics**, **AEC**, and **switches** are expected to benefit significantly, driving market growth [9][28]. Additional Important Points - **Parallel Computing**: The evolution of computing paradigms is shifting towards GPU-based parallel computing, which includes various forms such as data parallelism and tensor parallelism, each with different communication frequency and data size requirements [11][12]. - **Network Expansion Needs**: The need for a second-layer network connection between cabinets is emphasized, with recommendations for using fiber optics and AEC to facilitate this expansion [4][23][24]. - **Market Trends**: The overall network connection growth rate is anticipated to outpace chip demand growth, benefiting the optical module and switch industries significantly [28][30]. - **Misconceptions in Market Understanding**: There is a prevalent misconception that Scale Up networks are limited to cabinet-level solutions, whereas they actually require larger networks composed of multiple cabinets to meet user TPS demands effectively [29][30]. This summary encapsulates the key points discussed in the conference call, providing insights into the growth potential and strategic direction of the Scale Up network within the computing power industry.

Core Insights - The report emphasizes the necessity of Scale Up networks due to the "memory wall" issue and the evolution of AI computing paradigms, which necessitate the pooling of memory through Scale Up solutions [1][3] Group 1: Scale Up Network Expansion - Nvidia is continuously expanding the Scale Up network through two main paths: enhancing single-card bandwidth with NVLink 5.0 achieving 7200 Gb/s and increasing supernode sizes from H100NVL8 to GH200 and GB200 [2] - The Scale Up network is expected to follow a Scaling Law, with the second layer of Scale Up networks emerging, requiring a specific ratio of optical and AEC connections to chips [2][4] Group 2: Addressing the Memory Wall - The "memory wall" problem is characterized by the growing gap between the parameter size of large models and single-card memory, as well as the disparity between single-card computing power and memory [3] - To enhance computational efficiency, various parallel computing methods are employed, including data parallelism, pipeline parallelism, tensor parallelism, and expert parallelism, which significantly increase communication frequency and capacity requirements [3] Group 3: Need for Larger Scale Up Networks - The demand for larger Scale Up networks is driven by Total Cost of Ownership (TCO), user experience, and model capability expansion, as the Tokens Per Second (TPS) consumed by single users is expected to rise [3] - The report suggests that the Scale Up size is non-linearly related to expected single-user TPS and actual single-card performance, indicating a need for larger Scale Up networks to maintain performance [3] Group 4: Building Larger Scale Up Networks - To construct larger Scale Up networks, a second layer of Scale Up switches is needed between cabinets, with optical and AEC connections expected to coexist in the new network structure [4] - The report highlights that each GPU requires nine additional equivalent 1.6T connections, which is 3-4.5 times that of Scale Out networks, and every four GPUs necessitate an additional switch, which is 7.5-12 times that of Scale Out networks [4] Group 5: Investment Opportunities - The ongoing demand for Scale Up networks is anticipated to drive exponential growth in network connection requirements, benefiting sectors such as optical interconnects and switches [4] - Relevant companies in the optical interconnect space include Zhongji Xuchuang, Xinyi Sheng, and Tianfu Tong, while switch manufacturers include Ruijie Networks and Broadcom [5]

Core Viewpoint - The article discusses China's breakthrough in developing domestic High Bandwidth Memory (HBM) technology, overcoming reliance on imports and U.S. export controls, which previously threatened the AI industry's growth [1][12][24]. Group 1: HBM Technology and Its Importance - HBM is likened to a "super oil tank" for AI, crucial for providing the necessary data supply to high-performance computing systems [5][10]. - The "memory wall" problem in computing is addressed by HBM, which allows for vertical stacking of memory chips, significantly improving data transfer speeds and reducing energy consumption [9][10]. - The successful development of domestic HBM3 samples marks a significant milestone for China, making it the third country globally to enter the HBM market after the U.S. and South Korea [22][24]. Group 2: Impact of U.S. Export Controls - In late 2024, the U.S. imposed export controls on HBM, severely impacting China's AI industry by cutting off access to critical technology [12][14]. - The export restrictions highlighted the vulnerability of China's high-performance computing projects, which were heavily reliant on imported HBM [14][16]. Group 3: Development and Collaboration - The development of domestic HBM involved extensive collaboration among semiconductor companies, packaging and testing firms, and research institutions, forming a powerful coalition to tackle technical challenges [20][22]. - The successful creation of HBM3 samples was achieved within eight months, showcasing the dedication and innovation of Chinese engineers in the face of external pressures [16][18]. Group 4: Strategic Significance - The advancement in HBM technology provides a foundational security for national-level computing projects, allowing China to build data centers and intelligent computing centers without dependency on foreign components [25][27]. - The domestic market for HBM is projected to account for nearly one-third of global demand by 2025, creating a valuable environment for iterative improvements and innovation [27][29].

Investment Rating - The report indicates a positive outlook for the storage chip industry, highlighting significant growth potential driven by technological advancements and market dynamics [1][16]. Core Insights - The storage chip industry is undergoing a transformation, with domestic players like Yangtze Memory Technologies (YMTC) emerging as leaders through innovative technologies such as Xtacking, which separates storage units from control circuits to enhance performance and reduce costs [2][3]. - Major global players, including Samsung and Micron, are reducing production to address oversupply, with Samsung announcing a 20% cut and Micron a 10% cut in NAND Flash production [5][6]. - The market share of domestic storage chip manufacturers is expected to grow significantly, with YMTC projected to increase its NAND Flash market share to 10% by 2025, while Longsys is anticipated to capture 15% of the global DRAM market [6][17]. Summary by Sections Market Dynamics - The storage chip market is characterized by oligopolistic competition, with Samsung holding a 32% share in the NAND market and 39% in the DRAM market, while domestic players like YMTC and Longsys hold significantly smaller shares [3][4]. - The industry is experiencing a supply-demand imbalance, with high inventory levels of 6-8 weeks, complicating the recovery process despite production cuts [5][6]. Technological Innovations - The report emphasizes the importance of new technologies such as HBM (High Bandwidth Memory) and the emergence of solutions like Groq's LPU chip, which integrates SRAM with computing units to overcome memory bandwidth limitations [8][9]. - Innovations in storage architecture, such as the 3FS architecture by DeepSeek, are redefining AI storage paradigms by eliminating the need for DRAM as a cache layer, significantly improving performance [9][10]. Future Outlook - The global storage market is projected to exceed $230 billion by 2025, driven by AI-related demand and ongoing technological advancements [16][17]. - The transition from HDD to enterprise SSDs is accelerating, with predictions that all-flash arrays will surpass 50% of the enterprise storage market by 2028 [10][12]. Investment Trends - The report notes a surge in investment activity within the storage chip sector, with several significant financing events occurring in early 2025, indicating strong investor interest in both upstream and downstream segments [17][18].