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CEO手捧1.8纳米晶圆:英特尔的生死赌注
Sou Hu Cai Jing· 2025-10-10 07:12
当地时间10月9日,英特尔在官网上公布的一张最新照片。CEO陈立武双手托举着一块代号"Panther Lake"的CPU芯片晶圆——这是全球首款基于 1.8纳米工艺的PC芯片。与上一代Intel 3相比,18A工艺能效提升最高可达15%,芯片密度提升最高可达30%。 图片来源:英特尔官网 公开信息显示,《纽约时报》去年12月的报道和彭博社今年初的分析均指出,英特尔18A工艺的良率尚不足10%,而竞争对手台积电的2nm芯片 良品率已经达到30%。 行业咨询公司Creative Strategies的首席分析师本·巴亚林表示,英特尔所展示的18A工艺,必须能说服客户提前预订其下一代14A芯片制造技术。 若未达预期,可能会对英特尔耗资巨大的芯片制造计划带来致命打击,使公司再度陷入危机。 据智通财经报道,英特尔近期获得多方资金注入:美国政府通过《芯片与科学法案》注资89亿美元,软银集团认购20亿美元,英伟达以50亿美 元入股。三轮投资合计159亿美元,推动英特尔股价自8月初以来累计上涨68.3%。 按照量产计划,陈立武手中的这块晶圆将在今年晚些时候进入亚利桑那Fab 52工厂的大规模量产阶段,首款型号计划于年底前出货 ...
台积电否认
半导体芯闻· 2025-09-28 09:47
如果您希望可以时常见面,欢迎标星收藏哦~ 来源:内容来自半导体芯闻综合 。 台积电近日重申,公司尚未与任何公司就潜在投资或合作进行讨论,尽管有传言称陷入困境的英特 尔公司正在寻求台积电的参与。 全球最大的芯片代工制造商台积电在一份声明中驳斥了《华尔街日报》的一篇报道称,英特尔已与 台积电接洽,寻求对英特尔制造业务的投资或建立合作伙伴关系。 该公司表示,从未与任何公司就建立合资企业或从事技术许可或转让进行谈判。 点这里加关注,锁定更多原创内容 *免责声明:文章内容系作者个人观点,半导体芯闻转载仅为了传达一种不同的观点,不代表半导体芯闻对该 观点赞同或支持,如果有任何异议,欢迎联系我们。 分析师表示,《华尔街日报》的报道曝光后,台积电的美国存托凭证(ADR)隔夜在美国下跌了 1.44%,原因是人们担心如果这家台湾芯片制造商与英特尔合作,可能会失去客户的信任,并导致 订单减少。 分析人士表示,台积电对英特尔的投资可能有助于这家美国公司改进其技术,这将为台积电带来更 强大的竞争对手,而这种合作可能会导致台湾方面的技术泄露。 英特尔在半导体制造技术上一直无法跟上台积电的步伐,目前已获得美国政府、日本软银集团和总 部位于 ...
Beyond-EUV,新方向!
半导体芯闻· 2025-09-18 10:40
Core Viewpoint - The article discusses advancements in lithography technology, particularly the development of "Beyond-EUV" (B-EUV) lithography, which utilizes a wavelength of 6.5nm to 6.7nm, potentially allowing for resolutions below 5nm, surpassing current EUV technology [2][3][18]. Summary by Sections Lithography Technology Evolution - The evolution of lithography has progressed from contact to projection methods, with current mainstream technology using extreme ultraviolet (EUV) light at a wavelength of 13.5nm [3][5]. - The need for higher resolution in lithography can be achieved by either increasing numerical aperture (NA) or shortening the wavelength [3]. Challenges of EUV and B-EUV - EUV technology faces challenges due to its high absorption rates by materials, necessitating advanced mirrors for effective light reflection [5][6]. - B-EUV technology is still in its infancy, with no industry-standard methods for generating the required 6.7nm wavelength radiation [6][19]. Innovations in Light Sources - Various companies are exploring new light sources for lithography, including the development of high-efficiency laser systems and compact, high-power sources [10][11][13]. - Inversion is working on Laser Wakefield Acceleration (LWFA) to create high-energy light sources, while xLight is developing free electron lasers (FEL) to enhance EUV power output significantly [13][16]. Breakthroughs in Photoresist Materials - Johns Hopkins University has made significant progress in photoresist materials, discovering that metals like zinc can effectively absorb B-EUV light and trigger chemical reactions for fine pattern etching [18][19]. - The development of a new technique called Chemical Liquid Deposition (CLD) allows for the creation of thin films that can be used in semiconductor manufacturing, highlighting the importance of matching materials with the appropriate wavelengths [19][20]. Future Prospects - The advancements in B-EUV technology and associated materials could lead to significant improvements in semiconductor manufacturing efficiency and cost reduction, although challenges remain before widespread adoption [20].
中国芯片制造技术与西方存20年差距,光刻设备成关键瓶颈
Xin Lang Cai Jing· 2025-09-03 22:15
Core Insights - A recent report from a well-known international investment institution indicates that China has a technological gap of approximately 20 years in advanced chip manufacturing compared to Western developed countries [1] - The report highlights a significant disparity in photolithography equipment manufacturing between China and the United States, identifying it as a major obstacle to producing high-end chips in China [1] Industry Summary - The most advanced photolithography equipment is developed and manufactured by European companies, which rely on core components from the United States, thus being affected by export controls [1] - Due to external restrictions, Chinese companies face difficulties in obtaining high-end photolithography equipment, directly impacting their research and mass production capabilities in advanced processes [1] - For instance, domestic major chip manufacturers are forced to use relatively outdated technologies to produce 7-nanometer chips, which not only affects production efficiency but also significantly increases manufacturing costs [1] Technology and Supply Chain - The manufacturing of high-end photolithography equipment involves a global supply chain, with key components primarily located in the US and Europe, indicating a substantial gap in China's self-sufficiency in this area [1] - Photolithography is a core technology that transfers chip design patterns onto silicon wafers, and high-end equipment enables finer line delineation, thereby enhancing overall chip performance [1] - After the pattern transfer, multiple processes such as etching, deposition, and cleaning are required to complete chip manufacturing, underscoring the irreplaceable role of photolithography equipment in the chip manufacturing process and its influence on the industry's advancement towards high-end development [1]
8.7犀牛财经早报:7月私募产品新备案数量创近两年月度新高 人保健康领115万元罚单
Xi Niu Cai Jing· 2025-08-07 01:35
Group 1: Private Equity Market - In July, the number of newly registered private equity securities investment funds increased by nearly 20% compared to June, reaching a two-year monthly high [1] - Nearly 70% of the new registered private equity products were stock strategy funds, totaling 887, which represents a month-on-month growth of 24.58% [1] - Year-to-date, the number of new registered private equity securities investment funds has increased by over 60% compared to the previous year, with a total of 6,759 funds registered by the end of July [1] Group 2: Quantitative Private Equity - The issuance of quantitative private equity products has surged, with July seeing a total of 1,298 registered securities products, an 18% increase month-on-month, marking a 27-month high [2] - The top ten registered funds in July were all from billion-dollar quantitative institutions, indicating a rapid growth in their management scale [2] Group 3: Disney's Financial Performance - Disney's third-quarter revenue exceeded expectations, with a 2.1% increase to $23.7 billion, driven by growth in theme parks and streaming services [3] - The theme park division saw a revenue increase of 13% to $2.52 billion, while streaming services achieved a quarterly profit of $346 million [3] - Traditional entertainment television revenue declined by 28%, and the film studio reported losses amid a broader industry contraction [3] Group 4: Gree Electric's Chip Development - Gree Electric has a chip team of nearly 1,000 people, with over 60% being technical personnel, indicating a strong focus on semiconductor development [9][10] - The company has been involved in the chip sector since 2015, establishing multiple research and development entities for various semiconductor products [10] Group 5: Market Trends - The U.S. stock market saw all three major indices rise, with the Dow Jones up 0.19%, the Nasdaq up 1.21%, and the S&P 500 up 0.73% [11] - Apple announced a significant investment plan in the U.S. to avoid potential tariffs, contributing to a surge in its stock price [11]
英特尔先进工艺,有变
半导体芯闻· 2025-07-02 10:21
Core Viewpoint - Intel's new CEO, Lip-Bu Tan, is considering significant changes to the company's contract manufacturing business to attract major clients, which may incur high costs compared to previous plans [1][2]. Group 1: Strategic Changes - The new strategy for Intel's contract manufacturing will not include marketing certain long-developed chip manufacturing technologies to external clients [1]. - Intel's 18A process, which has seen substantial investment, is reportedly losing appeal to new customers, prompting the need for potential write-downs [1][2]. - The company is focusing more resources on the 14A process, which is expected to be more competitive than TSMC's N2 technology, aiming to attract major clients like Apple and Nvidia [2]. Group 2: Financial Implications - Intel is projected to incur losses of up to $18.8 billion in 2024, marking its first loss since 1986 [3]. - The potential costs associated with the shift in strategy could lead to losses in the hundreds of millions or even billions of dollars [1][2]. Group 3: Production Plans - Intel plans to achieve mass production of the 18A chips later this year, with internal chips expected to be delivered ahead of external customer orders [4]. - The timely delivery of 14A chips to secure large contracts remains uncertain, and Intel may continue with its existing 18A chip plans [4][5].
0.7nm芯片会用的晶体管
半导体芯闻· 2025-06-19 10:32
Core Viewpoint - Leading foundries and IDM manufacturers are advancing towards the production of 2nm (or equivalent) technology nodes, with GAA (Gate-All-Around) nanosheet transistors playing a crucial role in this transition [1][2]. Group 1: GAA Nanosheet Technology - GAA nanosheet devices are designed to further reduce the size of SRAM and logic standard cells by vertically stacking two or more nanosheet-like conductive channels [1]. - The configuration allows designers to minimize the height of logic standard cells while enhancing gate control over the channel, even at shorter channel lengths [1]. - GAA nanosheet technology is expected to last at least three generations before transitioning to CFET (Complementary FET) technology, with the A10 node anticipated to have a cell height as low as 90nm [2]. Group 2: Forksheet Device Architecture - Forksheet device architecture, introduced by imec, offers greater scalability compared to conventional GAA nanosheet technology [4][5]. - The inner wall forksheet structure allows for tighter n-to-p spacing, enabling further reduction in cell area while still providing performance improvements [5]. - imec demonstrated the manufacturability of the 300mm inner wall forksheet process flow, confirming its potential to extend the roadmap for logic and SRAM nanosheets to the A10 node [6]. Group 3: Challenges and Improvements - Despite successful hardware demonstrations, concerns regarding the manufacturability of the inner wall forksheet architecture led imec to reconsider its design [6][8]. - The outer wall forksheet design, presented at VLSI 2025, aims to reduce process complexity while maintaining performance and area scalability [9][11]. - The outer wall forksheet allows for a thicker dielectric wall (up to 15nm) without affecting the 90nm cell height, simplifying the integration process [11][16]. Group 4: Performance and Power Advantages - The outer wall forksheet is expected to provide significant advantages over the inner wall design in five key areas, including improved gate control and reduced parasitic capacitance [14][18]. - A benchmark study indicated that the area of SRAM cells based on the outer wall forksheet is reduced by 22% compared to A14 nanosheet architecture [25]. - The ability to achieve full channel strain in the outer wall forksheet design is anticipated to enhance performance, particularly in driving current [19][25]. Group 5: Future Outlook - imec is currently exploring the compatibility of the outer wall forksheet design with CFET architecture and the potential PPA benefits that could arise from this innovative scaling booster [27].
ASML麻烦了?英国电子束光刻机,绕过EUV,制造5nm芯片
Xin Lang Cai Jing· 2025-05-08 13:23
Group 1 - The core viewpoint is that ASML dominates the photolithography market, holding over 80% market share, particularly in the high-end EUV lithography machines, which are essential for manufacturing chips below 7nm [1] - Global companies are seeking alternatives to bypass ASML's monopoly, especially regarding EUV technology, which could potentially reshape the semiconductor equipment landscape [3] - Various alternative technologies have been proposed, including Japan's NIL nanoimprint technology and the US's EBL electron beam technology, which are claimed to be capable of producing 5nm chips [5] Group 2 - The University of Southampton in the UK has announced the establishment of the first advanced electron beam lithography center with a resolution below 5nm, marking a significant development in chip manufacturing technology that does not rely on EUV machines [5][7] - The current electron beam lithography technology is limited to 200mm wafers (8 inches), with future advancements needed to support 300mm (12 inches) wafers [7] - If breakthroughs in electron beam lithography are achieved, ASML may face significant challenges, leading to a potential reshuffling of the current market dynamics [7]