| 项目 | 2025年1-6月 /2025年6月30日 | 12月31日 | 2024年度/2024年 2023年度/2023年 2022年度/2022年 12月 31 日 | 12月 31 日 | | --- | --- | --- | --- | --- | | 资产总额(万元) | 2.141.711.96 | 2,033,200.79 | 1,273,379.19 | 652,254.76 | | 归属于母公司所有者权益 (万元) | 1.408.879.11 | 1.359.149.28 | 797.934.48 | 381,551.14 | | 资产负债率(母公司) | 0.08% | 0.06% | 0.00% | 0.36% | | 营业收入(万元) | 317,799.62 | 470.539.56 | 303.825.98 | 163.261.51 | | 净利润(万元) | 43.489.45 | 21.365.32 | 3.413.06 | -32.857.12 | 在晶圆级封装领域，基于领先的中段硅片加工能力，公司快速实现了12英寸大尺寸晶圆级芯片封装(晶圆级 扇入型封装，WLCS ...

2月24日，上海证券交易所上市审核委员会2026年第6次审议会议召开，审议结果显示，盛合晶微半导体有限公司（以下简称"盛合晶微"）科创板IPO申 请"符合发行条件、上市条件和信息披露要求"。 据招股书显示，盛合晶微是全球领先的集成电路晶圆级先进封测企业，起步于先进的12英寸中段硅片加工，并进一步提供晶圆级封装(WLP)和芯粒多芯片 集成封装等全流程的先进封测服务，致力于支持各类高性能芯片，尤其是图形处理器(GPU)、中央处理器(CPU)、人工智能芯片等，通过超越摩尔定律 (MorethanMoore)的异构集成方式，实现高算力、高带宽、低功耗等的全面性能提升。目前，盛合晶微是全球范围内营收规模较大且增长较快的集成电路先 进封测企业。根据Gartner的统计，2024年度，公司是全球第十大、境内第四大封测企业，且公司2022年度至2024年度营业收入的复合增长率在全球前十大 企业中位居第一。在主营业务领域中，盛合晶微已大规模向客户提供的各类服务均在中国内地处于领先地位。根据灼识咨询的统计，截至2024年末，公司 是中国内地12英寸Bumping产能规模最大的企业；2024年度，公司是中国内地12英寸WLCSP收 ...

Core Viewpoint - Shenghe Jingwei Semiconductor Co., Ltd. has responded to the second round of IPO inquiry from the Sci-Tech Innovation Board, with CICC as the sponsor [2] Group 1: Company Structure and Shareholding - The company has no actual controller, and major shareholders holding more than 5% of shares, including Advpackaging, have committed to a 36-month lock-up period starting from the listing date, with a total lock-up ratio of 39.22% [2] - There are interconnections among several shareholders, such as Puhua Chuangyu, Puhua Zhixin, and Hua Capital, which can be traced back to three natural person shareholders: Liu Yue, Chen Datong, and Wu Haibin [2] Group 2: Board and Management Relationships - The board consists of 9 directors, with some directors having relationships with shareholders, including being appointed by relevant shareholders or holding more than 5% equity in related shareholders [4] - The company has confirmed that there are no undisclosed relationships between senior management and shareholders, aside from those already disclosed [4] Group 3: Director Backgrounds - The company provided a detailed table of directors and their relationships with shareholders, indicating various levels of involvement and shareholdings [5] - Notable positions include the Chairman and CEO, who holds 18.14% of the equity in the employee stock ownership platform, and other directors with similar ties to shareholder entities [5] Group 4: Business Overview - Shenghe Jingwei is an advanced packaging and testing enterprise in the integrated circuit industry, focusing on 12-inch silicon wafer processing and providing advanced packaging services such as wafer-level packaging (WLP) and multi-chip integration packaging [2] - The company aims to support high-performance chips, particularly GPUs, CPUs, and AI chips, by enhancing performance through heterogeneous integration beyond Moore's Law, achieving high computing power, high bandwidth, and low power consumption [2]

Group 1 - The report emphasizes that advanced packaging is crucial for enhancing chip performance and reliability, especially in the context of the AI wave driving demand for higher integration and performance in semiconductors [8][21][25] - The semiconductor packaging and testing industry in China is expected to grow significantly, with the market size projected to reach 438.98 billion yuan by 2029, reflecting a compound annual growth rate (CAGR) of 5.8% from 2024 to 2029 [28][29] - Advanced packaging is anticipated to account for 50% of the semiconductor packaging market by 2029, with a CAGR of 10.6%, outpacing traditional packaging growth [28][29] Group 2 - The report highlights the rise of independent third-party testing services in the semiconductor industry, driven by the increasing number of IC design companies and the growing demand for testing services [42][43] - The competitive landscape for wafer testing is relatively concentrated due to high technical and investment barriers, with fewer participants compared to finished chip testing [42][43] - The report notes that independent third-party testing firms often collaborate with integrated packaging and testing companies, outsourcing wafer testing while also competing in finished chip testing [42][43]

Core Viewpoint - NVIDIA and Synopsys have announced a landmark strategic partnership involving a $2 billion investment from NVIDIA to integrate GPU-accelerated computing with Synopsys' leading EDA and semiconductor IP products, aiming to significantly accelerate chip design cycles and reduce power consumption [1][2]. Group 1: Partnership Details - The collaboration aims to create a unified cloud-native design environment that integrates Synopsys' tools with NVIDIA's computing platforms, enabling chip designers to run full-chip layout, design rule checks, and electromagnetic simulations at speeds 10 to 50 times faster than traditional CPU-based processes [1][2]. - The partnership includes the development of "Synopsys.ai Copilot," an AI-driven EDA suite that leverages NVIDIA's technology to optimize design layouts and automate testing platform generation [2][3]. Group 2: Technological Innovations - Integration of NVIDIA's cuPPA tool into Synopsys PrimePower will allow for precise dynamic power simulation across multi-chip systems, crucial for next-generation AI accelerators and autonomous vehicle SoCs [3]. - An open "NVIDIA-Synopsys foundry design kit" will provide pre-validated reference flows for TSMC's 2nm and Intel's 18A process nodes, lowering the design complexity for startups and large enterprises [3]. Group 3: Market Impact - Analysts view this partnership as a strategic defense for NVIDIA, reinforcing its competitive edge in AI training hardware by securing collaboration with Synopsys, which holds over 55% market share in the EDA sector [3]. - The agreement includes a clause requiring chips designed using their joint processes to include an NVIDIA "design watermark," which has raised concerns about potential implications for future foundry operations [4]. Group 4: Broader Applications - The partnership extends beyond semiconductors, aiming to address engineering challenges across various industries, including aerospace and automotive, by leveraging NVIDIA's AI capabilities and Synopsys' engineering solutions [5][6]. - Both companies plan to enable cloud-ready solutions for GPU-accelerated engineering, making advanced design capabilities accessible to engineering teams of all sizes [6][7].

Investment Rating - The report rates the advanced packaging industry as "stronger than the market" [1] Core Viewpoints - The advanced packaging technology is positioned as a key path to overcome the limitations of Moore's Law, driven by the exponential growth in computing power required for AI and large model training [2][14] - The global advanced packaging market is projected to exceed $79 billion by 2030, highlighting its role as a core growth engine in the semiconductor industry [2][23] - The demand for advanced packaging is surging due to the increasing need for high-performance AI chips, with TSMC's CoWoS technology becoming a critical support process for high-performance AI chips [2][17] Summary by Sections Chapter 1: Growing Demand for Intelligent Computing - The demand for intelligent computing is rapidly increasing, with significant growth in enterprise-level markets [5][9] - China's intelligent computing scale is expected to reach 725.3 EFLOPS in 2024, a year-on-year increase of 74.1% [9][10] Chapter 2: Diverse Packaging Paths - Advanced packaging technologies are evolving rapidly, with a focus on 2.5D/3D packaging solutions that are gaining popularity [2][18] - The global advanced packaging market is expected to grow from $46.1 billion in 2024 to $79.1 billion by 2030, with a compound annual growth rate (CAGR) of 21.71% for 2.5D/3D packaging [23][24] Chapter 3: Investment Recommendations - The report suggests focusing on key players in the advanced packaging sector, such as Changdian Technology, Tongfu Microelectronics, and JCET [2][24]

Core Viewpoint - The company, Shenghe Jingwei, has received approval for its IPO application on the Sci-Tech Innovation Board, aiming to raise 4.8 billion yuan for advanced packaging projects related to multi-chip integration technology [1][4]. Financial Performance - The company reported revenues of approximately 1.633 billion yuan in 2022, 3.038 billion yuan in 2023, and projected revenues of 4.705 billion yuan in 2024, with a net profit of -329 million yuan in 2022, 34.13 million yuan in 2023, and 214 million yuan in 2024 [2]. - The compound annual growth rate (CAGR) of the company's revenue from 2022 to 2024 is the highest among the top ten global packaging and testing companies [2]. Market Position - Shenghe Jingwei is ranked as the tenth largest packaging and testing company globally and the fourth largest domestically, with a leading position in various service areas within mainland China [2]. - The company holds the largest market share in 12-inch WLCSP revenue in mainland China, approximately 31% [2]. Technology and Innovation - The company has established a comprehensive technology platform for multi-chip integration packaging, particularly excelling in 2.5D integration technology, where it ranks first in revenue in mainland China with an 85% market share [3]. - Globally, the company holds an 8% market share in the 2.5D sector, competing with major players like TSMC, Intel, and Samsung [3]. Strategic Goals - The IPO aims to expand production capacity to meet the growing demand for high-performance chips, which are crucial for China's digital economy and AI development [4]. - The company plans to enhance its manufacturing and management systems, focusing on quality control and comprehensive service capabilities in advanced packaging [5].

Core Viewpoint - Shenghe Jingwei Semiconductor Co., Ltd. has received acceptance for its IPO on the Sci-Tech Innovation Board, indicating a significant step in its growth trajectory in the semiconductor industry [3]. Company Overview - Shenghe Jingwei is an advanced packaging and testing enterprise for integrated circuits, focusing on 12-inch silicon wafer processing and providing wafer-level packaging (WLP) and multi-chip integration packaging services [3]. - The company aims to support high-performance chips, particularly GPUs, CPUs, and AI chips, through heterogeneous integration methods that enhance performance metrics such as computing power, bandwidth, and energy efficiency [3]. Financial Performance - The company reported revenues of 1.633 billion yuan, 3.038 billion yuan, and 4.705 billion yuan for the years 2022, 2023, and 2024 respectively, with a projected revenue of 3.178 billion yuan for the first half of 2025 [3]. - Net profits for the same periods were -329 million yuan, 34.13 million yuan, 214 million yuan, and 43.5 million yuan for the first half of 2025 [3]. Market Position - According to Gartner, Shenghe Jingwei is projected to be the 10th largest packaging and testing company globally and the 4th largest domestically by 2024, with the highest compound annual growth rate in revenue among the top ten companies from 2022 to 2024 [3]. Shareholding Structure - As of the date of the prospectus, the largest shareholder is Wuxi Chanfang Fund with a 10.89% stake, followed by a group of shareholders from the China Merchants Bank system with a combined 9.95% [4]. - The company has no controlling shareholder or actual controller, ensuring a dispersed shareholding structure where no single shareholder can dominate the shareholder meetings [5].

Core Insights - Shenghe Jingwei's application for listing on the Sci-Tech Innovation Board has been accepted, marking a significant step in the ongoing trend of semiconductor companies going public in China [1] - Shenghe Jingwei is a leading global provider of advanced packaging services for integrated circuits, focusing on high-performance chips such as GPUs, CPUs, and AI chips, with a strong technological platform in the 2.5D integration field [2] - Since 2020, Shangfeng has invested over 2 billion yuan in more than 20 semiconductor companies, with a significant portion of these companies either in the listing process or already listed, showcasing its strategic focus on the semiconductor sector [3] Company Overview - Shenghe Jingwei specializes in advanced wafer-level packaging and multi-chip integration packaging, aiming to enhance performance metrics like computing power, bandwidth, and energy efficiency [2] - The company is recognized as one of the earliest and largest producers of 2.5D integration technology in mainland China, achieving a market share of approximately 85% in this segment for 2024 [2] Investment Strategy - Shangfeng's investment in Shenghe Jingwei amounted to 150 million yuan, part of a broader strategy to strengthen its competitive edge in the semiconductor industry [3] - The company has focused on investing in sectors that address critical technology gaps, with a significant portion of its investments directed towards semiconductor and new materials companies [3] - Over 60% of the invested companies are either in the process of applying for listing or have already gone public, indicating a successful investment strategy that enhances financial returns and industry influence [3]

Core Viewpoint - The company, through its wholly-owned subsidiary Ningbo Shangrong Logistics, has established a private equity investment fund, Suzhou Puyun, which has invested in SJ Semiconductor Corporation, a leading global integrated circuit advanced packaging and testing enterprise, that has recently applied for an IPO on the Sci-Tech Innovation Board [1][2] Group 1: Company Investment - Ningbo Shangrong has invested 150 million yuan, holding a 67.72% stake in Suzhou Puyun [2] - Suzhou Puyun holds 17,454,646 shares of SJ Semiconductor, representing a 1.086% ownership before the current issuance [2] Group 2: SJ Semiconductor Overview - SJ Semiconductor specializes in advanced packaging and testing services, focusing on 12-inch silicon wafer processing and offering wafer-level packaging (WLP) and multi-chip integration packaging [1] - The company aims to support high-performance chips, particularly GPUs, CPUs, and AI chips, enhancing performance through heterogeneous integration beyond Moore's Law [1]