电子布主要应用于 CCL，CCL 下游为 PCB，PCB 构成 AI 算力机柜芯片的核心 底层材料之一，其核心作用是承载高速信息信号传输通道。随着 AI 发展带动信 号传输速率持续提升并逐步发展至 224G，传输通道的材料性能要求显著抬升。 覆铜板等级标准由日本松下定义，行业常用 MA6、MA7、MA8、MA9 等表述， 数字越大代表覆铜板等级越高。区分不同等级覆铜板的关键参数之一为 DF 指 标，DF 值越小，代表高速传输过程中的信号损耗越低、传输效果越强。公开口 径下 MA9 对 DF 的要求为小于 1/1,000，而产业链实际要求口径为 DF 小于 7/10,000。 菲利华新型电子布产品性能稳定在 DF 约万分之 5.5，虽略逊于日本同类 产品（万分之 1.6），但产能更充裕，整体处于国际领先水平，国内推 进速度领先。 基于 2026 年客户框架指引，菲利华新型电子布销量预计达 1,000 万米， 有望拉动归母净利润 8 亿~10 亿元，公司有望成长为全球龙头，关键催 化包括英伟达芯片发布及 6G 需求。 传统玻纤电子布、Low-Dk 一代/二代电子布与石英电子布在 DF 指标上的差 异分别是什么，为 ...

产业观察 [table_Header]2026.03.01 量子哈密顿学习：密歇根大学实现基因调控网络推 断的新跨越 产业研究中心 摘要：NextX 系列：颠覆性技术周刊 第 7 期（2026.02.21-2026.02.27） 2026 年 2 月 21 日~2026 年 2 月 27 日期间，国内外科技产业共发生 90 起 融资事件，其中国内 60 起、国外 30 起；国内市场中，先进制造、人工智 能、汽车交通行业的融资事件数分别为 28、18、6 件，位列前三。 上周科技企业上市、IPO 速递： 1）通宝光电在北交所挂牌上市 上周科技产业二级市场表现跟踪： 1）涨跌幅：a）大盘指数：上周大盘指数总体上涨，具体表现为：上证指 数全周上涨 1.98%，报 4163 点；深证成指全周上涨 2.80%，报 14495 点； 创业板指上涨 1.05%，报 3310 点。b）科技子行业：上周半导体指数/汽车 电子指数/人工智能指数/元宇宙指数周涨幅为 2.30%/4.46%/1.72%/2.19%， 较万得全 A 指数-0.45/+1.71/-1.03/-0.56 pct。 2）换手率：上周半导体指数、元宇宙指数换 ...

2026 年 2 月 27 日星期五 研究员：张毅驰 从业资格：F03108196 交易咨询资格：Z0021480 联系方式：15018531496 | 板块 | 品种 | 多（空） | 推荐理由 【行情复盘】 沪铜主力合约 夜盘收盘价 CU2604 102550 元/吨，较上一交易日夜盘收盘价下跌 0.4 7%。沪铜次主力合约 CU2605 夜盘收于 102870 元/吨，跌幅 0.42%。截止北京时间 2026-02-27 06:00，COMEX 铜主力合约 HGK26E 收盘价为 6.025 美元/磅（按汇率 换算为 铜主力合约 6.8397 90849 元/吨），较上一交易日下跌 0.31%。LME CA03M E 收于 13259 美元/吨（按汇率 6.8397 换算为 90688 元/吨），跌幅 0.68%。 | | --- | --- | --- | --- | | 有色 | 铜 | 震荡偏多 | 【重要资讯】 1、2 月 26 日，财联社资讯，日本半导体材料厂 Resonac 宣布自 3 月 1 日起上调涨铜 箔基板（CCL）、黏合胶片等印刷电路板（PCB）材料售价，涨幅达 30%以上。 2、 ...

数据显示，截至2026年1月30日，中证人工智能主题指数(930713)前十大权重股分别为中际旭创、新易 盛、寒武纪、澜起科技、科大讯飞、中科曙光、海康威视、豪威集团、芯原股份、金山办公，前十大权 重股合计占比57.27%。 截至2026年2月25日 13:01，中证人工智能主题指数(930713)上涨0.18%，成分股新易盛上涨4.25%，寒武 纪上涨3.03%，中际旭创上涨2.66%，和而泰上涨2.56%，星宸科技上涨2.37%。AI人工智能ETF(512930) 上涨0.18%，最新价报2.28元。 半导体产业链震荡走强，消息面上，日本半导体材料厂Resonac宣布自3月1日起调涨铜箔基板 （CCL）、黏合胶片等印刷电路板（PCB）材料售价、涨幅达30%以上。此外，2月11日，北京大学联 合电子学院团队成功构建全球首个基于集成光量子芯片的大规模量子密钥分发网络，实现量子通信芯片 级全功能集成与网络化部署。 国金证券指出，半导体设备行业呈现出三大核心逻辑：行业规模超预期增长：2025年全球半导体销售额 达到7917亿美元，同比增长25.6%，远超WSTS早前11%的预测，主要由AI算力需求的爆发驱动。预计 ...

Investment Rating - The investment outlook for the Chinese electronic components industry is stable, with overall credit quality expected to remain unchanged over the next 12 to 18 months [5][8]. Core Insights - The industry is driven by the recovery in consumer electronics, rapid growth in automotive electronics, and advancements in artificial intelligence, with traditional consumer electronics providing basic demand support but limited impact on overall growth [15][21]. - The industry is expected to gradually transition towards high-end products, with leading companies leveraging their high-end capacity and technological advantages to maintain a competitive edge [15][21]. - The overall credit risk in the electronic components industry is manageable, with no significant changes in ratings and no instances of bond extensions or defaults reported [22]. Industry Fundamentals Analysis - In 2025, domestic policies such as "trade-in" programs effectively boosted demand in the downstream market, helping to stabilize the electronic components industry amid fluctuating international trade conditions and tariff policies [9][11]. - The global competition landscape in the electronic components sector has remained stable, with significant growth in revenue and profits across various sub-sectors, although operating cash flow has declined [7][22]. - The industry is expected to see substantial order growth driven by automotive electronics and AI demand, with potential for upward adjustments in industry outlook if favorable conditions persist [7][8]. Credit Performance of Industry Enterprises - The financial performance of enterprises within the electronic components industry has improved, with revenue and profit growth reported, although operating cash flow has decreased [22][27]. - The average revenue growth for sample enterprises in the electronic components sector was 27.14% year-on-year, with significant contributions from AI-related demands [27][28]. - The debt scale of sample enterprises increased, but the overall financial leverage remains low, indicating good debt repayment capabilities [34][35].

据泰媒报道，泰国投资促进委员会已批准彭申科技（泰国）有限公司（深 圳臻鼎科技ZDT与泰国公司的合资企业）的四个投资促进项目，总价值超过 650 亿泰铢，用于在巴真府生产先进的印刷电路板，并雇用 5600 名泰国员 工。其中第一个项目于2023年获批，并于2025年9月投产。泰国投资委员会 (BOI) 秘书长纳立表示，ZDT的目标是将泰国打造成为高复杂度PCB的生产基 地，以满足智能手机、人工智能服务器和先进电子设备等对处理性能要求极高 的现代电子产品的需求，并出口到世界各地。 自2017年以来，ZDT一直稳居全球最大PCB制造商之列，是全球电子供应 链的关键参与者。公司年营业额超过1800亿泰铢，在全球拥有超过48000名员 工。除了在泰国建立生产基地外，鹏申科技（泰国）有限公司还十分重视人力 资源开发，已与泰国顶尖教育机构签署合作协议，目标是培养高素质人才。纳 立表示，过去三年PCB领域的投资热潮已助力泰国成为东盟第一大PCB生产基 地，并跻身全球前五，同时也使泰国的电子供应链更加完善。纳立表示，从 2023年到2025年11月，BOI共收到214份与印刷电路板（PCB）相关的项目申 请，总投资额超过300 ...

[Table_Page] 跟踪分析|建筑材料 证券研究报告 [Table_Title] 建筑材料行业 普通电子布存供需缺口，步入涨价大周期 [Table_Summary] 核心观点： | [Table_Grade] 行业评级 | 持有 | | --- | --- | | 前次评级 | 持有 | | 报告日期 | 2026-02-08 | [Table_PicQuote] 相对市场表现 [分析师： Table_Author]谢璐 SAC 执证号：S0260514080004 SFC CE No. BMB592 -10% 2% 14% 26% 38% 50% 02/25 04/25 06/25 09/25 11/25 01/26 建筑材料 沪深300 | 021-38003688 | | --- | | xielu@gf.com.cn | | 分析师： 张乾 | | SAC 执证号：S0260522080003 | | 021-38003687 | | gzzhangqian@gf.com.cn | | 请注意，张乾并非香港证券及期货事务监察委员会的注册 | | [Table_ 相关研究： DocReport] ...

Core Insights - The article discusses the evolution of interconnect complexity in semiconductor devices, highlighting the shift from a two-level routing structure to a five-level structure, which enhances flexibility but increases complexity and decision-making requirements [1][19]. - It emphasizes the gradual nature of these changes, comparing it to the story of "boiling a frog," where the cumulative impact of incremental changes becomes apparent only in hindsight [1]. Group 1: Routing Structure and Challenges - The routing structure or platform is defined as the location of interconnections, historically represented by metal wiring in integrated circuits (IC) and printed circuit boards (PCB), both of which provide multi-layer wiring to maximize connectivity while managing costs [1]. - The differences between chip and PCB design have traditionally been significant, with chip designers focusing on internal wiring and PCB designers on connections to other components [3]. - Increasing the number of layers can reduce wiring density but also raises graphical complexity and sensitivity to lateral etching effects, necessitating careful design considerations [3]. Group 2: Power and Heat Management - The rise in chip power levels, reaching kilowatt levels, complicates heat dissipation, as traditional packaging methods struggle to manage the generated heat effectively [4]. - The increasing integration of circuits within chips leads to higher power density, exacerbating heat management challenges as more heat must be dissipated from smaller volumes [4]. - Flip-chip packaging has emerged as a solution, allowing chips to connect to substrate boards directly, improving heat dissipation and I/O interface availability [4][5]. Group 3: Stacked and 2.5D Integration Technologies - Stacked packaging, which involves vertically stacking multiple chips, presents significant thermal management challenges due to limited heat dissipation paths for chips in the middle of the stack [8]. - The development of 2.5D integration technology utilizes an intermediary layer as a "PCB," allowing for tighter line spacing and the installation of multiple chips, enhancing performance and reducing costs [9][10]. - The intermediary layer can be made from organic or silicon materials, with the latter allowing for finer dimensions, although at a higher cost [9][12]. Group 4: Design and Verification Complexity - The design and verification process for five-layer interconnect systems is significantly more complex than in the past, requiring integrated efforts from chip and packaging designers [12][16]. - Early-stage verification must encompass structural material analysis, layout planning, and thermal simulations, reflecting the need for a multi-physical field approach [16][17]. - The integration of power delivery and signal quality solutions has become more refined, with voltage regulation now occurring closer to the chip, enhancing performance [17][18]. Group 5: Future Implications - The evolution towards a five-layer interconnect structure may influence future chip development decisions, providing clearer insights into the growing flexibility and complexity of chip designs [19]. - The article concludes that while these changes are not revolutionary, they represent a significant shift in how semiconductor devices are designed and managed, impacting all levels of architecture [19].

Core Viewpoint - The article discusses the evolution of interconnect complexity in semiconductor design, highlighting the transition from traditional two-level routing structures to more complex five-level systems, which enhance flexibility but also increase design challenges and costs [1][25]. Group 1: Evolution of Interconnect Structures - Historically, interconnect structures in integrated circuits (IC) and printed circuit boards (PCB) have been limited to two levels, but recent advancements have expanded this to five levels, significantly increasing complexity and decision-making requirements [1][25]. - The distinction between chip-level and PCB-level design has been significant, with chip designers focusing on internal wiring and PCB designers managing connections to other components [3][25]. Group 2: Challenges in Chip Design - Three key trends are challenging traditional interconnect solutions: the importance of signal transmission lines, increased power levels leading to heat dissipation issues, and higher chip integration levels that exacerbate power density challenges [4][5]. - As chip sizes increase, the number of required I/O connections also rises, necessitating new packaging solutions like flip-chip packaging, which connects chips directly to substrate rather than through lead frames [6][7]. Group 3: Advanced Packaging Techniques - 3D stacking of chips using Through-Silicon Vias (TSV) allows for vertical signal transmission but complicates heat dissipation due to limited pathways for heat escape [9][11]. - The introduction of intermediary layers in 2.5D integration technology allows for more compact designs and improved signal routing, with the potential for multiple layers to enhance performance [13][14]. Group 4: Design and Verification Complexity - The design and verification process for five-layer interconnect systems is significantly more complex than in the past, requiring integrated efforts from chip and packaging design teams [17][21]. - Early-stage verification now includes structural material analysis, layout planning, and thermal simulations, expanding beyond traditional functional verification [20][21]. Group 5: Power Delivery and Signal Integrity - The increase in interconnect layers facilitates finer power delivery and signal integrity solutions, allowing voltage regulation to occur closer to the chip and improving overall performance [23][24]. - The integration of decoupling capacitors within the packaging can buffer voltage fluctuations, enhancing signal quality and performance [23][24]. Group 6: Conclusion on Industry Trends - The shift to a five-layer interconnect structure represents a gradual evolution rather than a revolutionary change, reflecting years of incremental improvements in semiconductor design [25][26]. - This complexity in interconnect design will influence future chip development decisions, emphasizing the importance of architecture-level considerations [26].

Core Viewpoint - The article discusses the recent performance of the A-share market, highlighting significant gains in technology stocks, particularly in the semiconductor sector, driven by supply shortages and price increases in CPUs and memory chips [1][18]. Group 1: Market Performance - On January 21, the three major indices in the A-share market collectively rose, with the Shanghai Composite Index increasing by 0.08%, the Shenzhen Component Index by 0.70%, and the ChiNext Index by 0.53% [18]. - The total trading volume across the three markets was 26,240 billion, a decrease of 1,804.27 billion from the previous day, with over 300 stocks rising [18]. - A total of 91 stocks hit the daily limit up, with the maximum consecutive limit up reaching 16 [18]. Group 2: Semiconductor Sector - The semiconductor sector saw a significant rebound, with domestic chip stocks surging. Notably, Longxin Technology hit the daily limit up, and several other stocks like Yingfang Micro and Tongfu Microelectronics also reached their daily limits [18]. - The increase in stock prices is attributed to a shortage in memory chips, with U.S. companies like Micron, Seagate, and SanDisk hitting record highs [18]. - Intel and AMD are expected to raise server CPU prices by 10%-15% in 2026, further driving interest in the semiconductor supply chain [2][18]. Group 3: CPU Demand and AI Impact - The demand for CPUs is projected to increase significantly due to the rise of AI agents, with estimates suggesting a need for up to 1,760,899 CPUs in optimistic scenarios for 2024, compared to a global shipment of 3,200 million CPUs [3]. - The article emphasizes that CPUs may become a bottleneck before GPUs in AI applications, as they are crucial for generating and evaluating tasks in reinforcement learning [11]. - A new paradigm proposed in the DeepSeek paper highlights the importance of CPU memory in handling large parameters, suggesting a shift in how AI models are structured [11][12]. Group 4: Material Costs and Industry Outlook - Japanese semiconductor material manufacturer Resonac announced a price increase of over 30% for PCB materials starting March 1, which could impact the overall cost structure in the semiconductor industry [12]. - Goldman Sachs projects a compound annual growth rate of 34% for optical modules from 2026 to 2028, with expected shipments reaching 94 million units by 2028, indicating a positive outlook for the optical communication sector [18].