场景驱动的创新模式是中国算力产业的独特优势。 2025年12月3日，「甲子光年」在北京万达文华酒店圆满举办"轰然成势，万象归一"2025甲子引力年终盛典。 在算力产业专场圆桌对话中，甲子光年分析师王艺作为主持人，对话后摩智能联合创始人、战略副总裁项之初，海光信息智算产品负责人贺群，蓝耘科技 CTO安江华，新华三集团企业技术部总经理朱哲，围绕《中国算力方案：如何用有限资源做出无限可能？》展开深入探讨。 在当下全球算力竞争从"有没有"转向"够不够、好不好"的深水区，中国算力产业面临先进制程受限、高端GPU供应收紧等独特外部约束。嘉宾们指出，制 程瓶颈、软件生态和系统化工程成为年度高频词，产业正处于从"堆叠算力"到"高效协同"的关键"拐点"。 面对算力不足、互联受限、生态薄弱的"三重困境"，产业界分享了如何通过找准应用场景、构建差异化技术路线、以及推动端云协同来实现突破的策略。 从存算一体芯片的商业化落地，到超节点万卡集群的系统工程，从Scale-up与Scale-out的技术抉择，到液冷技术的必然选择，嘉宾们用实战案例揭示了中 国算力方案的创新路径。 对于未来的全球竞争格局，嘉宾们普遍认为，无论是芯片厂商、系统集 ...

《科创板日报》12月12日讯（记者 黄心怡）记者从知情人士处独家获悉，京东正招募端侧AI芯片领域人才。京东此次的招聘方向主要集中在存算一体AI芯 片领域，产品或将用于机器人、智能家电、智能语音设备等硬件侧。 《科创板日报》记者在招聘网站看到，京东对于存算一体芯片设计相关工程师岗位，开出"25-45k·19薪"、 "40-70k·20薪"、"70-100K*20薪"不等的薪酬待 遇。对此事，京东方面暂无回应。 在具体职责内容上，这些岗位涉及负责面向大模型等生成式AI应用的存算一体芯片架构探索、设计与优化，包括计算单元、存储hierarchy、数据流优化、 近/存内计算范式等满足高性能、低功耗场景需求。 近年间，存算一体技术成为半导体产业的热点，半导体国际巨头如三星、SK海力士、台积电、英特尔、美光、IBM等也纷纷推出最新研究成果。 随着端侧人工智能技术的爆发式增长，智能设备对本地算力与能效的需求日益提高。传统冯·诺依曼架构在数据处理效率上存在瓶颈，"内存墙"问题成为制 约端侧AI性能突破的关键掣肘。而存算一体芯片将计算和存储融合在一起，让数据在存储单元内部就近完成计算，提升了芯片效率，正在成为赋能智能终 端、物 ...

Core Viewpoint - The AI industry is undergoing a significant transformation, shifting from cloud-based computing to edge AI, with a focus on developing AI chips for end devices, which is expected to reshape the future of technology and user interaction [3][8][29]. Group 1: Industry Trends - The global edge AI market is projected to reach 1.2 trillion yuan by 2029, with a compound annual growth rate (CAGR) of 39.6% [8]. - China's edge AI market is expected to achieve 307.7 billion yuan by 2029, with a CAGR of 39.9% [9]. - The transition from cloud-based AI to edge AI is driven by the need for lower latency and cost-effective solutions in various applications, including industrial and consumer sectors [8][10]. Group 2: Technological Evolution - The evolution of computing technology has transitioned from CPU-dominated general computing to GPU-centric intelligent computing, with a significant shift in the architecture of supercomputers from 90% CPU reliance in 2019 to less than 15% by 2025 [6]. - The emergence of large language models (LLMs) and vision-language models (VLMs) has created a demand for "cognitive-level computing," necessitating advancements in both cloud and edge AI chip technologies [5][12]. Group 3: Market Dynamics - Major tech companies are competing in the edge AI space, with significant investments in AI hardware and software solutions, such as OpenAI's acquisition of io for $6.5 billion and the introduction of AI smartphones by ByteDance [3][4]. - The development of model distillation technology allows for the compression of large models, making them suitable for deployment on edge devices, thus enhancing their performance while reducing computational complexity [8][14]. Group 4: Future Outlook - The future of edge AI is expected to involve a shift towards independent neural processing units (dNPUs) as the primary computing architecture, moving away from integrated solutions to meet the growing demands for AI performance [19][21]. - The evolution of edge AI will lead to a multi-tiered approach to computing power, with low, medium, and high-performance solutions tailored to specific application needs [20][21].

2026， 还不看端侧AI芯片就晚了。 2025年，当谷歌启动"捕日计划"，当OpenAI开启"星际之门"，全球AI产业似乎正朝着"算力至上"的云端竞赛狂奔。但与此同时，另一场静默的变革正在 终端设备上悄然发生。 5月，OpenAI以65亿美元收购由苹果前首席设计官Jony Ive创立的AI硬件公司io，计划于2026年底推出首款无屏幕AI硬件产品；11月，马斯克预言，未来 5-6年内传统手机将彻底消失，取而代之的是仅作为"AI推理边缘节点"的设备；12月，字节跳动试水豆包AI手机，一石激起千层浪。 大模型的战火，正从云端算力的"正面战场"，蔓延至亿万个终端设备的"毛细血管"，一场关乎AI未来格局的端侧竞速也正式拉开帷幕。 计算技术史诗级演进， 驱动算力霸主地位交接 计算技术的发展都从来不是线性前进的，而是由范式转换所驱动的： 2020年生成式AI的突破，将加速计算推向新高度——LLM（大语言模型）与VLM（视觉语言模型）的出现，创造了"认知级计算"需求。 与传统任务不同，大模型计算对并行处理能力和海量数据吞吐有着极致的需求，对算力和带宽都提出了更高的要求，特别是VLM模型需要同时处理视觉 与语言数据，以形成 ...

Core Insights - The 2025 Bay Area Semiconductor Industry Ecological Expo concluded on October 17, 2023, with industry professionals expressing optimism about the semiconductor market's growth driven by strong investments in AI computing hardware [1][3] - The global semiconductor market is projected to reach $781.5 billion in 2025, reflecting a year-on-year growth of 16.3% compared to $683.3 billion in 2024, primarily fueled by data center server demand [3][4] - The packaging market is expected to grow at a compound annual growth rate exceeding that of the overall semiconductor industry from 2024 to 2029, with advanced packaging technologies being a key growth driver [4] Market Trends - The semiconductor market is experiencing a bifurcation, with AI-related products showing significant growth while non-AI products are recovering slowly [7] - The demand for AI computing power is expected to surpass training needs by 2026, accounting for over 70% of total computing power demand [7][8] - The global smartphone shipment volume declined by 0.01% year-on-year in Q2 2025, marking the first drop in six quarters, although there remains resilient consumer demand in the Chinese market [4] Technological Developments - The semiconductor industry is transitioning into a "post-Moore's Law" era, with companies exploring advanced processes, packaging solutions, and new technologies like optical quantum chips to enhance performance [8][9] - The introduction of integrated storage-computing architectures aims to address performance degradation issues and improve efficiency in AI computing chips [9][10] - The power supply architecture in data centers is evolving from 48V to 800V high-voltage direct current (HVDC) systems to meet the increasing power demands of high-performance chips [10]

Summary of the Conference Call for Dow's Technology Company and Industry Overview - **Company**: Dow's Technology - **Industry**: AI and Materials Science, specifically focusing on brain-machine interface technology and advanced materials for robotics and sensors [2][3] Core Points and Arguments - **Investment in Long Brain Technology**: Dow's Technology invested $30 million in Long Brain Technology, a leader in non-invasive brain-machine interface technology, founded by Dr. Han Bicheng from Harvard University [4] - **Strategic Goals**: The investment aims to enhance product development efficiency and iteration speed through AI capabilities, aligning with Dow's strategy to become a platform company integrating AI with materials [4] - **Role of New Peison**: New Peison is crucial in Dow's AI strategy, focusing on discovering new materials and enhancing existing ones, particularly in humanoid and special robots, and sensor materials [5] - **AI Chip Development**: New Peison specializes in computing chips, addressing complex AI problems that traditional methods struggle with, and has received recognition from experts in the field [6] - **Artificial Neural Networks**: These networks excel in solving complex problems that cannot be described by equations, such as language models and image recognition, primarily relying on GPU technology [7] Breakthroughs and Innovations - **Advancements in Computing**: New Peison achieved significant breakthroughs in addressing the "curse of dimensionality," improving speed and reducing power consumption in molecular dynamics and density functional theory calculations [8] - **APU Chip Applications**: The APU chip simulates the Schrödinger equation, applicable in various fields of materials science, including military, chemical, lithium battery, photovoltaic, semiconductor, and cosmetics [9][10] - **Future Development Plans**: New Peison plans to expand its technology applications to larger-scale problems, such as weather simulation and vehicle aerodynamics, by developing the EPU chip for high-speed, low-power calculations [11] Additional Important Insights - **Successful Transition**: Dow's Technology transitioned from a focus on ceramic ink materials to the renewable energy sector in 2018, leveraging AI opportunities for larger-scale development [12] - **Collaborative Strategy**: The collaboration with Long Brain Technology and other companies is part of a unified strategy of "AI + materials + applications," aiming for breakthroughs in new material development [5]

Core Viewpoint - The company reported a revenue of 174.28 million yuan for the first half of 2025, a decrease of 1.79% year-on-year, and a net loss attributable to shareholders of 70.78 million yuan, indicating challenges in maintaining profitability amid intense market competition and declining product prices [1][4][10]. Financial Performance - Revenue for the reporting period was 174,275,106.79 yuan, down from 177,454,444.50 yuan in the same period last year [4]. - The total profit was -70,824,859.92 yuan, compared to -74,512,542.56 yuan in the previous year [4]. - The net profit attributable to shareholders was -70,782,426.57 yuan, a slight improvement from -74,350,170.06 yuan year-on-year [4]. - The net profit after deducting non-recurring gains and losses was -77,259,386.16 yuan, compared to -84,471,455.41 yuan in the previous year [4]. - The net cash flow from operating activities was 40,376,147.32 yuan, an increase from -89,030,502.93 yuan in the previous year [4]. Business Overview - The company operates in the semiconductor industry, focusing on the research, design, and sales of storage chips and microcontroller (MCU) chips [10]. - Main products include NOR Flash storage chips, general-purpose 32-bit MCU chips based on Arm Cortex-M0+ architecture, AI chips, and large-capacity storage products [10][12]. - The company employs a Fabless model, outsourcing wafer fabrication, testing, and packaging, allowing it to focus on design and development [10][11]. Product Development - The NOR Flash products utilize industry-recognized Floating Gate technology, with a focus on reliability and stability, and are expected to launch new architecture FLASH products in the second half of 2025 [10][12]. - The MCU product line has seen significant growth, with a 59.98% increase in sales and a 102.99% increase in shipment volume year-on-year [13]. - AI business products include general-purpose AI SoC chips and various AI algorithm models, with successful deployments in consumer electronics and industrial applications [14]. Market Position - The company aims to enhance its market share by expanding its product offerings in high-end applications such as industrial control and automotive electronics [14]. - The introduction of new NAND Flash and eMMC products is expected to meet the growing demand for high-performance storage solutions in smart devices [14].

Core Insights - The recent WAIC highlighted the growing interest in supernodes, with companies like Huawei, ZTE, and H3C showcasing their advancements in this technology [3][4][5] - Supernodes are essential for managing large-scale AI models, enabling efficient resource utilization and high-performance computing [3][4][5] - The shift from traditional AI servers to supernode architectures is driven by the increasing complexity and size of AI models, which now reach trillions of parameters [4][5][9] Group 1: Supernode Technology - Supernodes integrate computing resources to create low-latency, high-bandwidth computing entities, enhancing the efficiency of AI model training and inference [3][4] - The technology allows for performance improvements even when individual chip manufacturing processes are limited, making it a crucial development in the industry [4][9] - Companies are exploring both horizontal (scale out) and vertical (scale up) expansion strategies to optimize supernode performance [5][9] Group 2: Market Dynamics - Domestic AI chip manufacturers are increasing their market share in AI servers, with the proportion of externally sourced chips expected to drop from 63% to 49% this year [10] - Companies like墨芯人工智能 are adopting strategies that focus on specific AI applications, such as inference optimization, to compete with established players like NVIDIA [10][11] - The competitive landscape is shifting, with firms like云天励飞 and后摩智能 targeting niche markets in edge computing and AI inference, avoiding direct competition with larger chip manufacturers [11][12][13] Group 3: Technological Innovations - The introduction of optical interconnects in supernode technology is a significant advancement, providing high bandwidth and low latency for AI workloads [6][9] - Companies are developing solutions that leverage optical communication to enhance the performance of AI chip clusters, addressing the limitations of traditional electrical interconnects [6][9] - The focus on sparse computing techniques allows for lower manufacturing process requirements, enabling more efficient AI model computations [11][12]

Core Insights - The World Artificial Intelligence Conference (WAIC 2025) highlighted the development of domestic computing power chips, particularly the M50 chip from Houmo Intelligence, designed for large model inference in AI PCs and smart terminals [1][4] - Houmo Intelligence's CEO, Wu Qiang, emphasized a shift in the focus of large models from training to inference, and from cloud intelligence to edge and endpoint intelligence [1][4] Company Overview - Houmo Intelligence was founded in 2020, focusing on high-performance AI chip development based on integrated storage and computing technology [3] - The M50 chip is seen as a significant achievement for Houmo Intelligence, showcasing their advancements over the past two years [3] Product Specifications - The M50 chip delivers 160 TOPS INT8 and 100 TFLOPS bFP16 physical computing power, with a maximum memory of 48GB and a bandwidth of 153.6 GB/s, while maintaining a typical power consumption of only 10W [4] - The product matrix from Houmo Intelligence covers a range of computing solutions from edge to endpoint, including the LQ50 Duo M.2 card for AI PCs and companion robots [4] Market Positioning - Wu Qiang stated that domestic companies should adopt differentiated technological paths rather than directly copying international giants like NVIDIA and AMD [4] - Houmo Intelligence aims to integrate storage and computing technology with large models to enable offline usability and data privacy [4] Future Developments - The release of the M50 chip is viewed as a starting point, with plans for more chips to address computing power, power consumption, and bandwidth issues in edge and endpoint AI computing [5] - Houmo Intelligence has initiated research on next-generation DRAM-PIM technology, which aims to achieve 1TB/s on-chip bandwidth and triple the energy efficiency of current levels [9] Target Markets - The M50 chip is applicable in various fields, including consumer terminals, smart offices, and smart industries, with a focus on offline processing to mitigate data transmission risks [8] - Potential clients include Lenovo's next-generation AI PC, iFlytek's smart voice devices, and China Mobile's new 5G+AI edge computing equipment [8]

Core Viewpoint - The article discusses the limitations of the traditional von Neumann architecture in processing power, especially in the context of artificial intelligence and large models, and highlights the potential of in-memory computing technology as a solution to achieve high computing power, high bandwidth, and low power consumption simultaneously [1][5]. Group 1: In-Memory Computing Technology - In-memory computing technology is not new, but its commercial application has only recently begun to gain traction [5]. - The challenges in adopting this technology include the gap between theoretical research and practical implementation, as well as the need for software that provides a user experience similar to traditional chips [6][5]. - The company has focused on in-memory computing due to its research background in high energy efficiency computing and the need to compete with major players like NVIDIA [6][5]. Group 2: Development and Research Focus - The arrival of large AI models has prompted the company to deepen its exploration of the integration of in-memory computing technology with AI applications [7]. - The company has committed significant resources to research architecture, design, and quantization, aiming to create a synergy between in-memory computing and large models [7]. Group 3: New Product Launch - M50 Chip - The M50 chip is described as the most energy-efficient edge AI chip currently available, built on the second-generation SRAM-CIM dual-port architecture [8][10]. - It achieves 160 TOPS at INT8 and 100 TFLOPS at bFP16 with a typical power consumption of only 10W, making it suitable for various smart mobile terminals [10]. - Compared to traditional architectures, the M50 chip offers a 5 to 10 times improvement in energy efficiency [10]. Group 4: Compiler and Software Tools - The new compiler toolchain, "后摩大道," is designed to optimize the performance of the M50 chip, featuring flexible operator support and automated optimization capabilities [11][12]. - This tool aims to lower the entry barrier for developers and enhance the usability of the in-memory computing technology [11]. Group 5: Product Matrix and Applications - The company has introduced a diverse product matrix, including the "力擎" series and various M.2 cards, to support edge applications [13][14]. - These products are designed for a wide range of applications, including consumer electronics, smart offices, and industrial automation, enabling local processing without data transmission risks [16]. Group 6: Future Goals and Innovations - The company aims to become a leader in edge AI chip technology and is developing next-generation DRAM-PIM technology to further enhance computing and storage efficiency [18]. - The goal is to achieve over 1 TB/s on-chip bandwidth and triple the energy efficiency of current technologies, facilitating the deployment of large AI models in everyday devices [18].