后摩尔时代

Search documents
后摩尔时代的新集成与新材料报告(附17页PPT)
材料汇· 2025-06-08 14:03
Core Viewpoint - The article discusses the evolution of semiconductor technology, particularly focusing on the transition from traditional SoC (System on Chip) designs to Chiplet architectures, which are expected to extend the economic benefits of Moore's Law in the post-Moore era [4][6][18]. Group 1: Chiplet Technology - Chiplet architecture allows for modular design, enabling flexible customization for specific applications, which can lead to significant performance and cost optimizations [5][7]. - The Chiplet model is anticipated to reduce development cycles and risks associated with chip manufacturing, as seen in AMD's 32-core Chiplet example, which has a total area of 852 mm² compared to a SoC's 777 mm² [5][6]. - Chiplet technology is gaining traction in various fields, including FPGA, CPU, and GPU, with a projected market growth rate (CAGR) of 46% for FPGA and 58% for GPU applications from 2018 to 2025 [10][9]. Group 2: Advanced Packaging Techniques - Advanced packaging technologies such as 2.5D and 3D packaging are critical for the successful implementation of Chiplet architectures, enhancing integration and performance [13][16]. - The industry is focusing on various advanced packaging methods, including Flip-Chip, Wafer Level Packaging, and System in Package (SiP), which improve electrical performance and reduce overall costs [13][16]. - Major players like TSMC, Intel, and Samsung are investing heavily in high-performance packaging as a key direction for the next generation of semiconductor technology [16]. Group 3: SiC Power Semiconductors - Silicon Carbide (SiC) is emerging as a preferred material in the post-Moore era due to its superior performance in high-power and high-frequency applications, particularly in electric vehicles and renewable energy systems [20][22]. - The global SiC power device market is expected to grow significantly, with a CAGR of 42.4% from 2017 to 2021, driven by applications in electric vehicles and industrial automation [28][29]. - SiC devices offer advantages such as higher efficiency, reduced size, and improved thermal performance compared to traditional silicon devices, making them ideal for high-temperature and high-voltage applications [22][27]. Group 4: Market Dynamics and Trends - The SiC power device market is rapidly expanding, with China increasing its market share significantly, indicating a shift in the global supply chain dynamics [28][30]. - The SiC industry is characterized by a strong reliance on substrate suppliers, with a significant portion of the market controlled by foreign companies, highlighting the need for domestic investment and development [30][32]. - The cost structure of SiC devices is heavily influenced by substrate and epitaxy processes, which are critical for maintaining competitive pricing and performance in the market [30][32].
研判2025!中国芯片级玻璃基板行业发展背景、市场现状及趋势分析:受益于先进封装下大尺寸AI算力芯片更新迭代,玻璃基板对硅基板的替代将加速[图]
Chan Ye Xin Xi Wang· 2025-05-30 01:36
Group 1 - Glass substrates are characterized by high transparency, excellent flatness, and good stability, serving as a support carrier to ensure the reliable fixation of functional materials and the overall stability and lifespan of devices [1][2] - The global advanced packaging market is projected to grow from $28.8 billion in 2019 to $42.5 billion by 2024, indicating a rising penetration rate [1][13] - The introduction of glass substrates can reduce capacitance between interconnections, leading to faster signal transmission and improved overall performance, particularly in data centers, telecommunications, and high-performance computing applications [1][15] Group 2 - The glass substrate industry chain includes key segments such as raw materials, equipment, technology, production, packaging testing, and applications, with special glass materials being crucial for semiconductor manufacturing [6] - The TGV (Through Glass Via) technology is a core technique for glass substrate packaging, enabling vertical electrical interconnections and addressing challenges associated with traditional TSV technology [19][20] - The glass substrate market is expected to reach over $400 million by 2030, with a penetration rate exceeding 2%, although organic substrates will continue to dominate the semiconductor packaging field in the near term [15][17] Group 3 - The glass substrate technology is anticipated to play a significant role in the semiconductor industry, with ongoing advancements focusing on process optimization, improving via precision and density, and expanding the functional applications of glass substrates [25] - The global semiconductor market is projected to reach $635.1 billion in 2024, reflecting a 19.8% year-on-year growth, driven by the increasing demand for high-performance semiconductor products [9]
2025年中国半导体先进封装行业研究:后摩尔时代,先进封装引领半导体创新趋势
Tou Bao Yan Jiu Yuan· 2025-05-20 12:23
Investment Rating - The report does not explicitly state an investment rating for the semiconductor advanced packaging industry Core Insights - Advanced packaging technology is a critical link between chip design and application, significantly enhancing chip performance and reducing power consumption while alleviating constraints in high-end chip manufacturing processes. The Chinese government places high importance on the development of the semiconductor industry, implementing various policies to support independent innovation and technological breakthroughs, making research into China's semiconductor advanced packaging industry particularly significant [2] Summary by Sections Overview of the Semiconductor Packaging Industry - Packaging is a core process in semiconductor manufacturing, involving the placement, fixation, sealing of chips, and connecting chip contacts to the packaging shell [14][18] - The four core functions of packaging include physical protection, mechanical support, electrical connection, and thermal management [17] Development of Packaging Technology - The development of semiconductor packaging technology can be divided into four stages, with the current global packaging technology being in the advanced packaging stage [19][21] - The core goals of packaging technology evolution include miniaturization, improved electrical performance, enhanced thermal management, and cost reduction [21] Market Analysis - The Chinese semiconductor packaging market is expected to reach 355.19 billion yuan by 2025, with advanced packaging accounting for 32% of the market [45][47] - The global packaging testing market is projected to grow from $51 billion in 2016 to $72.27 billion by 2025, with advanced packaging expected to capture half of the market share [47] Advanced Packaging Manufacturers Overview - Global advanced packaging market participants include IDM, Foundry, and OSAT manufacturers, with leading companies adopting a "large platform + technology branch" architecture covering various advanced packaging technologies [51] - Major OSAT manufacturers in mainland China have formed industrial capabilities in advanced packaging through independent research and mergers, covering a wide range of applications from consumer electronics to AI chips [7]
2025年中国半导体先进封装市场研读:后摩尔时代,先进封装引领半导体创新趋势
Tou Bao Yan Jiu Yuan· 2025-05-20 12:16
Investment Rating - The report does not explicitly state an investment rating for the semiconductor advanced packaging industry Core Insights - Advanced packaging technology is a critical link between chip design and application, significantly enhancing chip performance and reducing power consumption while alleviating constraints in high-end chip manufacturing processes [2] - The Chinese government places high importance on the development of the semiconductor industry, implementing various policies to support independent innovation and technological breakthroughs [2] - The advanced packaging market is expected to grow rapidly, with China's packaging market projected to reach 355.19 billion yuan by 2025, with advanced packaging accounting for 32% of the market [45][47] Summary by Sections Overview of the Semiconductor Packaging Industry - Packaging is a core process in semiconductor manufacturing, involving the placement, fixation, sealing of chips, and connecting chip contacts to the package shell [14][18] - The development of semiconductor packaging technology can be divided into four stages, with the current stage being advanced packaging [19][21] Advanced Packaging Technology Types - The global advanced packaging market includes IDM, Foundry, and OSAT manufacturers, with leading companies adopting a "large platform + technology branch" architecture [4][51] - Major OSAT manufacturers in China have formed industrial capabilities through independent research and acquisitions, covering a wide range of applications from consumer electronics to AI chips [7] Market Dynamics - The global packaging testing market is expected to grow from $51 billion in 2016 to $72.27 billion by 2025, with advanced packaging projected to capture half of the market share [47] - China's packaging testing market is growing at a compound annual growth rate (CAGR) of 12.54%, significantly higher than the global market's 3.89% [47] Importance of Advanced Packaging - Advanced packaging is essential for integrating multiple functions within a system, enhancing overall system performance beyond the limitations of Moore's Law [35][38] - The report highlights that advanced packaging can improve chip performance without shrinking process nodes, addressing the rising costs associated with advanced process development [39][44]
混合键合,风云再起
半导体行业观察· 2025-05-03 02:05
Core Viewpoint - The article emphasizes the rapid development and industrialization of hybrid bonding technology as a key enabler for overcoming performance bottlenecks in the semiconductor industry, particularly in the post-Moore's Law era [1][12]. Group 1: Hybrid Bonding Technology Overview - Hybrid bonding technology, also known as direct bonding interconnect, is a core technology in advanced packaging, enabling high-density vertical interconnections between chips through copper-copper and dielectric bonding [3][12]. - This technology allows for interconnect distances below 1μm, significantly increasing the number of I/O contacts per unit area compared to traditional bump bonding, which has distances above 20μm [3][5]. - Advantages include improved thermal management, enhanced reliability, flexibility in 3D integration, and compatibility with existing wafer-level manufacturing processes [3][5]. Group 2: Industry Adoption and Applications - Major semiconductor companies like SK Hynix and Samsung are adopting hybrid bonding in their products, such as HBM3E and 3D DRAM, achieving significant improvements in thermal performance and chip density [5][8]. - Samsung's implementation of hybrid bonding has reduced chip area by 30% while enhancing integration [8]. - TSMC's SoIC technology and NVIDIA's GPUs also utilize hybrid bonding to improve performance and density in advanced applications [10][11]. Group 3: Market Growth and Equipment Demand - The global hybrid bonding equipment market is projected to grow from approximately $421 million in 2023 to $1.332 billion by 2030, with a compound annual growth rate (CAGR) of 30% [13]. - Equipment manufacturers are competing to meet the rising demand for high-precision bonding machines and related technologies, with companies like Applied Materials and ASMPT leading the charge [13][14]. Group 4: Competitive Landscape - Applied Materials is focusing on building a comprehensive hybrid bonding ecosystem through strategic investments and partnerships, aiming to cover the entire process from material to bonding [14][15]. - ASMPT is enhancing its position by developing high-precision bonding technologies and collaborating with industry leaders to drive standardization [17][22]. - BESI is capitalizing on the demand for AI chips and HBM packaging, with a significant market share in CIS sensors and a focus on high-precision bonding equipment [18][19]. Group 5: Future Trends and Challenges - The shift from 2D scaling to 3D integration is reshaping the competitive landscape in the semiconductor industry, with hybrid bonding technology at the forefront [22][23]. - Despite its potential, hybrid bonding faces challenges such as high costs and stringent manufacturing environment requirements, which may slow its widespread adoption [23][21].
参会指南 | 2025异质异构集成封装大会(HIPC 2025)
势银芯链· 2025-04-18 08:28
"宁波膜智信息科技有限公司"为势银(TrendBank)唯一工商注册实体及收款账户 势银研究: 势银产业研究服务 势银数据: 势银数据产品服务 势银咨询: 势银咨询顾问服务 重要会议: 4月29日,2025势银异质异构集成封装产业大会(浙江宁波) 点此报名 添加文末微信,加 先进封装 群 程安排 会议地点安排 会场: 甬江实验室A区·1F 星璨报告厅 签到地点及时间: 4月28日 14:00-18:00: 1楼大堂 4月29日 08:00-17:00: 1F 星璨报告厅 用餐地点: | 用餐类别 | : | 4月29日 | 就餐方式 | 地点 | | --- | --- | --- | --- | --- | | 午餐 | | 自助午餐 | 凭餐券 | 2F自助餐厅 | 4月28日 14:00-18:00: 签到 4月29日 | 09:00-09:10: 签约仪式 | | --- | | 09:10-09:20: 大会致辞 | | 09:20-10:20: 主题演讲 | | 10:20-10:40: 茶歇 | | 10:40-12:00: 主题演讲 | | 12:00-13:30: 午休 | | 13:30- ...