证券研究报告 | 产业经济周报 2025 年 12 月 24 日 产业经济周报 证券分析师 陈梦洁 资格编号：S0120524030002 邮箱：chenmj3＠tebon.com.cn 研究助理 夏欣锐 邮箱：xiaxr＠tebon.com.cn 相关研究 11 月社零低于预期，CoWoS 产能紧 张助力先进封装产业 [Table_Summary] 投资看点： 徐梓煜 资格编号：S0120524080004 邮箱：xuzy＠tebon.com.cn 周天昊 资格编号： S0120525040002 邮箱：zhouth＠tebon.com.cn 徐宇博 资格编号：S0120525090001 邮箱：xuyb5＠tebon.com.cn 请务必阅读正文之后的信息披露和法律声明 [Table_Main] 大消费看点：11 月社零低于预期，名义增速 1.3%；我们认为社零下滑主要受 1） 去年国补高基数影响；2）双十一提前导致消费前置到 10 月。拆分看，商品零售和 餐饮消费增速环比均有所走弱，但从绝对值看，商品零售消费对大盘拖累较深。拆 分细分品类看：其一，占比最大单项——汽车零售走弱是社零承压的核心原因之 一， ...

Summary of Intel's Conference Call Company Overview - **Company**: Intel - **Event**: Barclays Global Tech Conference Key Points Industry and Market Dynamics - The PC market is experiencing a strong demand, with industry unit volumes increasing from an initial estimate of 270 million to approximately 290 million [12] - Server demand is also robust, with customers significantly increasing their forecasts in Q3, leading to tight supply conditions [12][13] - The company is currently undershipping demand in both PC and server markets, with server demand expected to be more constrained than PC demand in the near term [12][17] Product Development and Yields - Intel's first product on the 18A node, Panther Lake, has been successfully launched, with positive feedback from OEM partners [2][3] - Yield improvements on the 18A node have shown a consistent upward trend, with expectations to reach industry-standard yields by the end of 2027 [4][3] - The leadership under Lip-Bu has focused on improving yields and engaging external suppliers to enhance production efficiency [5][6] Technology Roadmap - The transition from 18A to 14A is underway, with early customer engagements showing promising results [19] - The 14A node is reportedly ahead in yield and performance compared to the 18A node at a similar development stage [23] - The company is focusing on internal production for Panther Lake, with plans to bring more wafers in-house for future products like Nova Lake [9][10] Capital Expenditure and Financial Outlook - Intel's CapEx guidance for the current year is set at $18 billion, with expectations for a slight decrease next year, although flexibility remains due to supply constraints [24][25] - The company is de-emphasizing low-end PC products, which is expected to positively impact gross margins [35] - The gross margin for the next year is projected to be in the range of 40%-60%, influenced by various factors including pricing strategies and demand shaping [35][36] AI and ASIC Strategy - Intel is focusing on power-optimized GPUs for inference rather than competing in the LLM training market [42] - The company has a vibrant ASIC business in networking, with plans to expand into XPU-like products [43][44] - There is a strategic emphasis on leveraging Intel Foundry to meet the needs of hyperscalers looking to bypass traditional models [44] Supply Chain and Memory Market - The company is monitoring memory shortages closely, although current customer concerns are primarily about unit volumes rather than rising DRAM prices [39][40] - Historical data suggests that rising DRAM prices have not significantly impacted overall PC market demand, but the situation is being observed closely [40] Conclusion - Intel is navigating a complex landscape with strong demand in both PC and server markets, ongoing yield improvements, and a strategic focus on AI and ASIC development. The company is also managing capital expenditures carefully while addressing supply chain challenges.

Core Viewpoint - TSMC is considering converting a wafer fabrication plant in Arizona into an advanced packaging facility due to the significant demand from U.S. customers for CoWoS technology, which is crucial for enhancing AI performance [1][2] Group 1: TSMC's Strategic Moves - TSMC plans to establish an advanced packaging factory in Arizona by the end of 2027 to address the supply bottleneck and meet the growing demand from AI GPU and ASIC manufacturers [1] - The company is accelerating the introduction of advanced packaging production lines in the U.S. and intends to repurpose an old chip manufacturing site for this purpose [1] - Previously, TSMC outsourced its packaging services in the U.S. to companies like Amkor, but this situation is changing as TSMC aims to bring these capabilities in-house [1] Group 2: Competitive Landscape - Due to supply constraints in CoWoS packaging, U.S. customers are turning to competitors like Intel for advanced packaging solutions, with companies such as Microsoft, Qualcomm, Apple, and Tesla preparing to adopt Intel's EMIB and Foveros technologies [2] - The shift in demand towards Intel's packaging solutions has prompted TSMC to expedite its production plans in Arizona, highlighting the competitive pressures in the semiconductor industry [2] - The development of TSMC's Arizona project is crucial as it is expected to fulfill a significant portion of the U.S. chip industry's needs [2]

Core Insights - Intel's optimism regarding its wafer foundry division is highlighted, particularly with the upcoming 18A process technology and advanced packaging products [1][2] - The company is currently mass-producing Panther Lake chips, set to launch on January 5, with yield rates improving but not yet at optimal levels [1] - Intel's internal facilities are engaging with external customers to assess interest in the 18A-P and 18A-PT process nodes, which are showing promising early progress [2] Group 1 - Intel's 18A process technology is maturing, and the company is looking to reconnect with external clients to gauge their interest [2] - Advanced packaging technologies are seen as a significant opportunity for Intel's wafer foundry, with some clients achieving good results, indicating a shift towards Intel's solutions as alternatives to TSMC's products [2][3] - The company acknowledges a potential underestimation of the advanced packaging business's potential, driven by external demand due to capacity constraints at TSMC [2] Group 2 - Intel's wafer foundry division has not seen a significant drop in optimism compared to previous months, with ongoing discussions about improving the division's offerings [3] - External customers are considering Intel's chip and packaging solutions, contributing to management's confidence in the foundry division's ability to enhance its performance [3]

如果您希望可以时常见面，欢迎标星收藏哦~ 据韩国媒体etnews报道，英特尔正在其位于仁川松岛的Amkor工厂（晶圆厂）推进人工智能 （AI）半导体封装技术。AI封装技术此前一直由英特尔在其自有晶圆厂独家研发，此次是英特 尔首次将该工艺外包。英特尔选择韩国晶圆厂作为强化其半导体供应链的战略基地，这一决定 值得关注。 据业内人士1日透露，英特尔已在Amkor松岛K5工厂建立了尖端封装技术"EMIB"工艺。英特尔 和Amkor于今年4月签署了EMIB技术合作协议，松岛K5工厂被选为实际合作的实施地点。 EMIB是一种2.5D封装技术，可将不同的半导体（芯片）连接起来。例如，在AI加速器中，图 形处理器（GPU）位于中心，高带宽内存（HBM）环绕其周围。处理器和内存之间的信号通过 名为"EMIB（嵌入式多芯片互连桥）"的路径传输，这也是其名称的由来。 目前，该路径采用硅中介层实现。英伟达的AI加速器就是一个典型的例子。然而，硅中介层成 本高昂。EMIB利用嵌入半导体衬底中的硅桥，据称与硅中介层相比，具有更高的性价比和生产 效率。它还拥有精确的2.5D封装优势。 英特尔晶圆代工旨在利用领先的制程工艺技术，为英特尔内部 ...

EMIB是一种2.5D封装技术，可将不同的半导体（芯片）连接起来。例如，在AI加速器中，图形处理 器（GPU）位于中心，高带宽内存（HBM）环绕其周围。处理器和内存之间的信号通过名为"EMIB （嵌入式多芯片互连桥）"的路径传输，这也是其名称的由来。 目前，该路径采用硅中介层实现。英伟达的AI加速器就是一个典型的例子。然而，硅中介层成本高 昂。EMIB利用嵌入半导体衬底中的硅桥，据称与硅中介层相比，具有更高的性价比和生产效率。它 还拥有精确的2.5D封装优势。 公众号记得加星标⭐️，第一时间看推送不会错过。 据韩国媒体etnews报道，英特尔正在其位于仁川松岛的Amkor工厂（晶圆厂）推进人工智能（AI） 半导体封装技术。AI封装技术此前一直由英特尔在其自有晶圆厂独家研发，此次是英特尔首次将该工 艺外包。英特尔选择韩国晶圆厂作为强化其半导体供应链的战略基地，这一决定值得关注。 据业内人士1日透露，英特尔已在Amkor松岛K5工厂建立了尖端封装技术"EMIB"工艺。英特尔和 Amkor于今年4月签署了EMIB技术合作协议，松岛K5工厂被选为实际合作的实施地点。 英特尔在生产高性能半导体时，一直使用其位于美国和马 ...

Core Insights - North American cloud service providers (CSPs) like Google and Meta are actively engaging with Intel regarding the EMIB solution, indicating a shift in the chip landscape with the introduction of Google's TPU v9 by 2027 [1] - EMIB, a 2.5D advanced packaging technology from Intel, is gaining attention as CSPs face challenges with TSMC's CoWoS due to capacity shortages and high costs [1][2] - The rise of ASIC solutions, particularly represented by Google's TPU, is driving the demand for EMIB technology, with expectations of explosive growth in ASIC numbers from major players by 2026-2027 [2] Group 1: EMIB Technology and Market Dynamics - EMIB is positioned as a competitive alternative to TSMC's CoWoS, primarily due to its advantages in area and cost [3] - CoWoS has a high level of technical maturity but faces significant capacity constraints, with NVIDIA alone accounting for over 60% of its production [3] - EMIB allows for highly customizable packaging layouts, which may make it the preferred choice for ASIC applications [3][4] Group 2: Cost and Performance Considerations - EMIB's design simplifies the structure by eliminating expensive intermediary layers, providing a cost-effective solution for AI clients [4] - Despite its advantages, EMIB is currently limited by its interconnect bandwidth and signal transmission distance, making it more suitable for ASIC customers [5]

Group 1: DRAM Industry Insights - The DRAM industry revenue for Q3 2025 increased by 30.9% quarter-over-quarter, reaching $41.4 billion, driven by rising contract prices and increased shipment volumes of conventional DRAM and HBM [2][3] Group 2: Company Performance - SK hynix led the market with a revenue of $13.75 billion in Q3 2025, marking a 12.4% increase from Q2 2025, capturing a market share of 33.2% [3] - Samsung followed closely with a revenue of $13.5 billion, a 30.4% increase from the previous quarter, holding a market share of 32.6% [3] - Micron experienced the highest growth rate of 53.2%, with revenue reaching $10.65 billion and a market share of 25.7% [3] - Nanya and Winbond also showed significant growth, with Nanya's revenue increasing by 84% and Winbond's by 21.4% [3] Group 3: Electric Vehicle Market - Global sales of new energy vehicles (NEVs) reached 5.39 million units in Q3 2025, representing a year-on-year increase of 31%, with battery electric vehicles (BEVs) accounting for 3.71 million units sold, up 48% [8] - BYD led the BEV market with a 15.4% market share, while Tesla held 13.4% [9] Group 4: AR Display Technology Trends - The competition in AR display technology is intensifying, with projections indicating that the penetration rate of LEDoS technology will reach 65% by 2030, up from 37% in 2025 [12]

Core Insights - The article discusses the increasing demand for advanced packaging technologies in the semiconductor industry, particularly due to the tight capacity of TSMC's CoWoS technology, which has led companies to consider Intel's EMIB as an alternative solution [1][2]. Group 1: TSMC's CoWoS Capacity Constraints - TSMC's CoWoS advanced packaging capacity is highly constrained, making it difficult for many ASIC and second-tier AI chip manufacturers to secure sufficient support [1]. - The demand for cloud AI chips has surged, leading to full capacity utilization at TSMC and its associated testing supply chain [2]. - There is a growing need for local production in the U.S., which TSMC currently cannot fully meet due to the requirement of returning the backend processes to Taiwan [2]. Group 2: Intel's EMIB Technology - Intel's EMIB technology is gaining attention due to its cost-effectiveness and good thermal performance, making it suitable for products with lower technical specifications [2][3]. - Companies like Marvell and MediaTek are reportedly exploring EMIB to offer more affordable solutions to their customers [2]. - EMIB is seen as a mature technology that can support urgent Tier 2 projects that require quick design-to-production timelines [3][4]. Group 3: Industry Movements and Collaborations - Major companies like Apple and Qualcomm are actively recruiting talent with knowledge of EMIB technology, indicating a strategic shift towards this packaging method [3]. - The integration of TSMC's front-end wafer fabrication with Intel's EMIB backend is being considered as a viable business model for AI chip supply chains [5]. - There is a trend of increasing collaboration among companies testing EMIB, which may lead to stable order volumes in the long term if successful [4][6].

Core Insights - The demand for AI HPC (High-Performance Computing) is driving the need for advanced packaging solutions, particularly TSMC's CoWoS technology, but some cloud service providers (CSPs) are considering Intel's EMIB technology due to increasing chip integration requirements [1][2] Group 1: CoWoS Technology - TSMC's CoWoS solution connects different functional chips using an interposer, with various versions like CoWoS-S, CoWoS-R, and CoWoS-L developed [1] - The market demand is shifting towards CoWoS-L, especially with NVIDIA's upcoming Blackwell platform set for mass production in 2025 [1] Group 2: EMIB Technology - EMIB offers several advantages over CoWoS, including a simplified structure that eliminates the expensive interposer, leading to higher yield rates [2] - EMIB has a smaller thermal expansion coefficient issue due to its design, which reduces the risk of packaging warping and reliability challenges [2] - EMIB can achieve larger packaging sizes, with EMIB-M already supporting 6 times the mask size, and projections for 8 to 12 times by 2027 [3] Group 3: Market Dynamics - The demand for CoWoS is facing challenges such as capacity shortages and high costs, prompting CSPs like Google and Meta to explore EMIB solutions [2] - Intel's EMIB technology has been in development since 2021 and is already applied in its server CPU platforms, with Google planning to implement it in TPUv9 by 2027 [3] - NVIDIA and AMD, which require high bandwidth and low latency, are expected to continue using CoWoS as their primary packaging solution [3]