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英特尔雇员涉嫌贪污
半导体芯闻· 2025-05-27 10:21
来源:内容 编译自 tomshardware 。 如果您希望可以时常见面,欢迎标星收藏哦~ 据以色列新闻媒体Calcalist报道,英特尔以色列公司已对前雇员 Natalia Avtsin 和前零部件供应 商 Yafim Tsibolevsky 提起法律诉讼,指控他们合谋挪用超过 300 万新谢克尔(约合 84.2 万美 元)。据称,这起挪用公款事件发生在 2023 年 10 月至 2024 年 11 月期间,直到英特尔揭露这 起欺诈行为后才被发现。 https://www.tomshardware.com/tech-industry/intel-uncovers-alleged-embezzlement-involving-former-employee-and-supplier 点这里加关注,锁定更多原创内容 *免责声明:文章内容系作者个人观点,半导体芯闻转载仅为了传达一种不同的观点,不代表半导体芯闻对该 观点赞同或支持,如果有任何异议,欢迎联系我们。 阿夫辛曾在英特尔以色列公司的硬件生产部门工作,直至2024年11月被解雇。英特尔表示,解雇 她是其缩减以色列业务战略的一部分,与她当时尚未发现的涉嫌犯罪无 ...
苹果最强芯片,深度剖析
半导体芯闻· 2025-05-27 10:21
Core Viewpoint - Apple is set to release the high-end Mac Studio with the new M3 Ultra processor in March 2025, featuring significant advancements in processing power and memory, while the MacBook Pro models with M4 Pro and M4 Max will be launched in November 2024 [1][2]. Group 1: Product Specifications - The M3 Max was first introduced in November 2023 and is featured in the highest-end MacBook Pro. It lacks the "Ultra Fusion" interface that was present in previous models [2][3]. - The 2025 Mac Studio will replace all six Thunderbolt 4 ports with Thunderbolt 5, enhancing connectivity options [3][5]. - The internal structure of the 2023 Mac Studio with M2 Ultra and the 2025 Mac Studio with M3 Ultra shows significant changes in components, although the external dimensions remain the same [5][15]. Group 2: Performance Enhancements - The M3 Ultra processor will have a minimum memory configuration of 64GB to 96GB and a maximum of 192GB to 512GB, with CPU cores increasing from 24 to 32 and GPU cores from 76 to 80 [15]. - The M3 Ultra is manufactured using a 3nm process, allowing for more features and memory interfaces to be integrated within a similar area compared to the 5nm M2 Ultra [15][19]. Group 3: Chip Design and Development - The M3 Ultra and M3 Max are distinct chips, with the M3 Ultra utilizing a different version of the M3 Max, tentatively named M3 Max2, which includes the Ultra Fusion interface [19][21]. - Apple has developed its own passive components to optimize power characteristics, showcasing its advanced development capabilities in chip design [12][14].
工业市场,大联大全面布局
半导体芯闻· 2025-05-27 10:21
Core Viewpoint - The industrial market is seen as a promising area for semiconductor companies, especially with the rise of applications in artificial intelligence and smart industries, contrasting with the more cyclical consumer electronics market [1][2]. Group 1: Market Trends and Opportunities - The demand for chips has sharply declined due to geopolitical conflicts and weak end-user demand, affecting the industrial market as well [3]. - However, there are signs of recovery in the industrial market, particularly in emerging applications like humanoid robots and hydrogen energy [3][6]. - The humanoid robot market is projected to grow at a compound annual growth rate (CAGR) of 71% from 2021 to 2030, indicating significant potential despite existing technological challenges [6]. Group 2: Company Strategies and Focus Areas - The company has identified key focus areas within the industrial market, including automation, energy, and edge computing, to better respond to market changes [15]. - The company is restructuring its organization to enhance responsiveness to market trends, particularly in industrial automation and energy sectors [15]. - The company is actively promoting digital power solutions and energy storage products, leveraging partnerships with major suppliers like Infineon [16]. Group 3: Technological Integration and Support - The company is committed to providing comprehensive design solutions to assist clients in shortening product development cycles, including reference designs for industrial applications [19]. - A platform named "Dada Tong" has been established to facilitate online reference and support for developers, enhancing collaboration and problem-solving [20]. - The company is focusing on integrating resources to provide effective solutions for humanoid robots, particularly in the development of dexterous hands and related technologies [20].
台积电痛失订单!
半导体芯闻· 2025-05-27 10:21
Core Viewpoint - SpaceX, led by Elon Musk, is betting on Fan-Out Panel Level Packaging (FOPLP) to meet the production demands of its low Earth orbit satellites, requiring suppliers to expand their FOPLP production lines [1][2]. Group 1: SpaceX and FOPLP Development - SpaceX has signed a Non-Recurring Engineering (NRE) contract with Innolux, which is expected to secure significant orders for power management chips and aims for FOPLP mass production this year [1]. - SpaceX is also building its own FOPLP production line in Malaysia, with a substrate size of 700mm x 700mm, the largest in the industry, targeting RF chips and power management chips for integrated packaging [1]. Group 2: Innolux's Position and Strategy - Innolux, a supplier for Tesla, is extending its collaboration into semiconductors, aiming to develop analog chips for mass production this year [2]. - The company is utilizing its existing 3.5-generation glass substrate for FOPLP, which, while not competitive for panel production, offers significant size advantages for packaging efficiency [2]. Group 3: Clarifications on Technology Capabilities - Following a report suggesting that the display industry's precision standards are insufficient for advanced chip packaging, Innolux clarified that it has not received negative feedback regarding its technical capabilities and that the overlap between display technology and advanced packaging processes is significant [3][4]. - Innolux emphasized that its G3.5 factory can produce the largest substrate size currently applicable for advanced packaging, and it can adjust processes for smaller substrate sizes without technical challenges [4][5]. Group 4: Market Trends and Future Focus - The trend towards larger chip sizes is driving the economic benefits of larger packaging substrates, which Innolux plans to focus on to enhance process efficiency and provide reliable packaging solutions for clients [5].
一颗改变历史进展的芯片
半导体芯闻· 2025-05-26 10:48
Core Insights - The introduction of the Bellmac-32 microprocessor marked a significant advancement in chip technology, combining 3.5-micron CMOS manufacturing with a novel 32-bit architecture, setting a foundation for modern computing devices [1][2][14] - Despite its innovative design, the Bellmac-32 did not achieve commercial success but laid the groundwork for the widespread adoption of CMOS technology in the semiconductor industry [13][14] Group 1: Historical Context - In the late 1970s, AT&T's Bell Labs aimed to leapfrog competitors like IBM and Intel by developing a revolutionary 32-bit microprocessor, the Bellmac-32, which could transmit 32 bits of data in a single clock cycle [5][9] - The Bellmac-32 was recognized with the IEEE Milestone Award, highlighting its historical significance in the evolution of semiconductor technology [2] Group 2: Technical Innovations - The Bellmac-32 utilized CMOS technology, which combined NMOS and PMOS designs to enhance speed while reducing power consumption, a significant improvement over existing technologies [7][14] - The architecture was designed to support Unix operating systems and C programming language, which were emerging technologies at the time, ensuring compatibility with future computing needs [9][10] Group 3: Development Challenges - The development team faced significant challenges, including low yield rates during manufacturing and the absence of advanced CAD tools for chip design verification [11][12] - The first version of the Bellmac-32 was released in 1980 but did not meet performance expectations, leading to further refinements that resulted in a second generation with clock speeds exceeding 6.2 MHz [12][13] Group 4: Market Impact - Although the Bellmac-32 did not become mainstream, it influenced the semiconductor market by demonstrating the effectiveness of CMOS technology, which eventually became the standard for modern microprocessors [13][14] - The shift from NMOS to CMOS technology reshaped the semiconductor landscape, paving the way for the digital revolution in devices like desktops and smartphones [14]
中国快充,要统一了?
半导体芯闻· 2025-05-26 10:48
如果您希望可以时常见面,欢迎标星收藏哦~ 来源:内容来自观察者 ,作者: 杨依婷,谢谢 。 近日,2025融合快充(UFCS)产业发展大会在深圳举行。华为、OPPO、vivo、荣耀共同签署 UFCS互授权意向,标志着国内快充产业协作的进一步深化。与此同时,UFCS 2.0标准的正式发布 及40W融合快充互通的启动,预示着中国统一快充生态建设已迈入全新阶段。 大会现场 大会发布了融合快充UFCS 2.0标准。新标准在技术层面进行了多项优化,不仅实现了40W无鉴权 功率互通,引入了"反向充电"特性,还将Power Change(适配器功率主动调节)升级为必选项, 这些关键增强充分展现了统一快充技术在提升用户体验方面的巨大潜力。 长久以来,由于缺乏统一标准,不同品牌手机之间充电协议及线缆互不兼容的问题普遍存在,这在 一定程度上制约了行业的健康发展。而UFCS 2.0的发布以及产业链的进一步协同,正是推动这一 问题解决的关键步骤。 会上,来自中国通信标准化协会、电信终端产业协会及广东省终端快充行业协会的领导,在讲话中 都高度肯定了融合快充UFCS在提升用户体验、推动绿色发展及构建产业协同方面的积极进展。 中国信息通信 ...
2nm,争霸战
半导体芯闻· 2025-05-26 10:48
Core Viewpoint - The global semiconductor foundry market is witnessing significant advancements with TSMC and Samsung Electronics set to begin mass production of 2nm technology in the second half of the year, indicating a competitive landscape in advanced semiconductor manufacturing [1][2]. Group 1: TSMC Developments - TSMC plans to start mass production of 2nm technology at its Hsinchu and Kaohsiung facilities in the second half of this year, utilizing the GAA technology previously introduced by Samsung in its 3nm process [1]. - Major clients such as Apple, Nvidia, and AMD are expected to launch new products based on TSMC's 2nm semiconductors [1]. Group 2: Samsung Electronics Progress - Samsung Electronics has announced plans to mass-produce 2nm semiconductors for mobile applications in the second half of the year, aiming to recover its foundry profitability [1]. - The upcoming Galaxy S26 smartphone is predicted to feature the Exynos 2600 processor, which will be based on Samsung's 2nm technology [1]. Group 3: Market Competition and Trends - TSMC has achieved a 100% utilization rate for its 3nm process after five quarters of mass production, while it is expected that the 2nm process will reach full utilization within four quarters post-launch [2]. - Samsung, despite initial challenges with its 3nm process, has secured contracts for the upcoming Nintendo Switch 2, marking a significant competitive win against TSMC [2]. - In response to the U.S.-China trade tensions, Samsung is expanding its customer base in China and increasing production to meet strong demand from American clients [2].
芯片刻蚀,迎来巨变
半导体芯闻· 2025-05-26 10:48
如果您希望可以时常见面,欢迎标星收藏哦~ 想象一下,尝试在指甲大小的块体上雕刻出一个微小而复杂的雕塑,一遍又一遍,数十亿 次,几乎没有出错的余地。 芯片制造商在硅片上蚀刻复杂的图案,制造出驱动我们周围大多数电子设备和技术的半导 体,正是如此。随着我们要求更小的设备拥有更高的功率和速度,以极高的精度雕刻这些图 案的需求变得越来越迫切,也越来越具有挑战性。 为了满足半导体生产日益增长的精度标准,一个研究团队最近推出了一项名为 DirectDrive 的突破性技术,该技术为制造计算机芯片的等离子蚀刻工艺带来了前所未有的精度。这项创 新有望支持下一代电子产品的开发,尤其是用于人工智能系统、需要高度紧凑和超高速电路 的电子产品。 从厨房到实验室 DirectDrive 并非一周或一个月研究的成果,而是耗时 20 年才成型。早在 2006 年,加州大学洛 杉矶分校 (UCLA) 工程师 Patrick Pribyl 就提出了一个想法,即在芯片制造蚀刻过程中更好地控 制等离子体。 Pribyl 设计了一种装置,可以快速切换驱动等离子体的射频 (RF) 能量,从而实现更精细的蚀刻控 制。为了测试他的想法,他还在自家厨房里搭建 ...
中国如何突破芯片包围圈?
半导体芯闻· 2025-05-26 10:48
如果您希望可以时常见面,欢迎标星收藏哦~ 另,百度人工智能云端业务总裁沉抖亦在公司财报电话会议上表示,即使没有最先进的芯片,我们 独特的全端人工智能功能,也使我们能够建立强大的应用程式并提供有意义的价值。 百度也大力宣传软件优化和降低运行模型成本的能力,因为它拥有该堆叠中的大部分技术。 来源:内容来自 CNBC ,谢谢 。 面对美芯片限制,中国科技巨头已采取了突围之道,中国最大通讯应用微信的营运商腾讯总裁刘炽 平表示,腾讯目前拥有「相当充足的」的图形处理单元(GPU)芯片库存。 除了拥有大量的GPU存货外,刘炽平表示,与美国公司认为需要扩大GPU集群才能创造更先进的 人工智能的想法相反,腾讯能够使用较少数量的此类芯片,取得良好的训练效果。 他指出,这实际上帮助我们审视现有的高端芯片库存,并表示我们应该有足够的高端芯片来继续进 行几代模型的训练。 他进一步指出,腾讯正在使用「软件优化」来提高效率,以便部署相同数量的GPU来执行特定功 能。且腾讯还在考虑使用不需要如此强大运算能力的小型模型。 此外,腾讯也表示,它可以利用中国目前可用的客制化芯片和半导体。 刘炽平认为,有很多方法可以满足不断扩大和成长的推理需求,我 ...
华为主导新技术,旨在替代HDMI
半导体芯闻· 2025-05-26 10:48
Core Viewpoint - The article discusses the significance of the General-Purpose Multimedia Interface (GPMI) technology, which aims to revolutionize interface technology to meet the demands of future smart applications, particularly in the context of smart homes and industrial IoT [2][24]. Summary by Sections Evolution of Information Storage and Transmission - The progress of civilization is closely linked to the evolution of information storage media and transmission methods, with a notable acceleration in storage technology compared to the slower updates in transmission methods, particularly in interface technology [2]. Introduction to GPMI - GPMI is a restructured interface paradigm designed for smart scenarios, addressing the compatibility issues of existing interfaces in new application contexts. It represents a significant advancement from previous generations of interfaces [3]. GPMI Technical Architecture - The GPMI technology architecture consists of four layers: link layer, tunnel base, adaptation layer, and service layer, with essential components including main and auxiliary links [5]. Core Advantages of GPMI - GPMI boasts seven core advantages: bidirectional multi-stream, bidirectional control, high power supply, ecological compatibility, ultra-fast transmission, quick wake-up, and full-chain security [7]. Bidirectional Multi-Stream Capability - GPMI supports mixed bidirectional transmission of video and data streams, allowing for efficient interconnectivity among multiple devices, with a bandwidth capacity of 192 Gbps and support for up to 128 nodes [10][12]. Bidirectional Control Functionality - The bidirectional control feature enables dynamic reconfiguration of roles between interconnected devices, allowing for enhanced functionality and resource sharing, such as using a TV's network capabilities for other devices [15]. High Power Supply Integration - GPMI integrates power supply capabilities, with Type-B interfaces supporting up to 480W and Type-C interfaces up to 240W, facilitating a unified connection for video, control, data, and power [18]. Ecological Integration - GPMI is compatible with USB standards, ensuring seamless integration with existing devices and laying the groundwork for future standards, which is beneficial for both manufacturers and consumers [21]. Future Opportunities with GPMI - GPMI is expected to unlock new development opportunities in smart scenarios, enhancing multi-screen ecosystems in smart homes and industrial IoT applications, while also fostering new business models such as "display as a service" [24].