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印度半导体,战略转变
半导体芯闻· 2025-07-24 10:21
Core Viewpoint - India's semiconductor development is undergoing a transformation, moving from vision to actionable plans, with investments expected to exceed $15 billion by the second half of 2025 [1] Group 1: Government Initiatives and Support - The Indian government has implemented a $10 billion national semiconductor incentive program, transitioning from a policy document to a budget execution plan, with several high-impact projects approved and initial funding disbursed by mid-2025 [1][2] - State governments are accelerating project preparations by expediting land allocation and utility supply, establishing single-window services for semiconductor investments, and providing subsidies for cleanroom infrastructure and high-tech equipment [2] Group 2: Strategic Focus and Market Positioning - India is focusing on strategic niche markets such as analog, power semiconductors, and outsourced semiconductor assembly and testing (OSAT), aiming to become a key player in the global chip supply chain [1] - The establishment of advanced packaging and manufacturing units in India reflects its serious value proposition in the current geopolitical landscape, with multiple projects expected to be operational or in early stages by the end of 2025 [2] Group 3: Talent and Capability Development - There is a significant talent gap in critical areas such as lithography technology, device physics, and analog design, necessitating both long-term skill development and targeted recruitment of foreign talent [3] Group 4: Supply Chain Challenges and Opportunities - Over 80% of key semiconductor materials are currently imported, with customs delays and ongoing supply chain disruptions posing significant challenges [4] - The semiconductor industry in India is not only building manufacturing capacity but also enhancing capability development, with local firms expanding production of high-precision tools and automation equipment [2] Group 5: Future Outlook and Strategic Execution - The semiconductor industry in India is poised for a vibrant new chapter by the second half of 2025, with numerous opportunities for implementation, emphasizing the need for collaboration with contractors and ecosystem partners to localize operations and leverage production-related incentives [4] - The existence of incubated projects will lay the foundation for a global competitive ecosystem based on strategic intent and industrial execution, presenting a resilient opportunity for long-term participants in the Indian semiconductor value chain [4]
日本芯片设备,继续卖爆
半导体芯闻· 2025-07-24 10:21
如果您希望可以时常见面,欢迎标星收藏哦~ 来源:内容来自半导体芯闻综合。 日本半导体(芯片)制造设备销售续旺,2025年6月份销售额大增17%、连15个月达2位数(10%以 上)增幅,月销售额连8个月高于4,000亿日圆、创下同期历史新高纪录。 日本半导体制造装置协会(SEAJ)23日公布统计数据指出,2025年6月份日本制芯片设备销售额(3 个月移动平均值、包含出口)为4,045.92亿日圆、较去年同月大增17.6%,连续第18个月呈现增 长,增幅连15个月达2位数(10%以上)水准,月销售额连续第20个月突破3,000亿日圆、连8个月 高于4,000亿日圆,就历年同月情况来看、创1986年开始进行统计以来历史新高纪录。 和前一个月份(2025年5月)相比、下滑9.3%,连续第2个月呈现月减。 累计2025年上半年(1-6月期间),日本芯片设备销售额达2兆5,591.76亿日圆、较去年同期暴增 20.0%,就历年同期来看,远超2024年的2兆1,320.23亿日圆、创下历史新高纪录。 日本芯片设备全球市占率(以销售额换算)达3成、仅次于美国位居全球第2大。 SEAJ 7月3日公布预估报告指出,因AI服务器用 ...
芯江湖•浙大派:一支"严门"子弟的CPU风云录
半导体芯闻· 2025-07-24 10:21
Group 1 - The article discusses the rapid evolution of the RISC-V architecture and its significance in the semiconductor industry, highlighting that changes in the next five years will be faster than the past decade [3][34]. - Key figures in the RISC-V ecosystem, such as Dr. Jim Keller and Professor Yan Xiaolang, are mentioned for their contributions and vision in advancing RISC-V technology [5][18]. - The article emphasizes the importance of collaboration between academia and industry, particularly through initiatives like "产教融合" (industry-education integration) [19]. Group 2 - The rise of companies like Zhongtianwei (中天微) and PingTouGe (平头哥) is highlighted, showcasing their innovative approaches and strategic partnerships, particularly with Alibaba [32][34]. - Zhongtianwei's development of the C-Core series of embedded CPUs is noted for its wide application across various sectors, including IoT and automotive electronics [20]. - PingTouGe's acquisition by Alibaba is presented as a pivotal moment for enhancing China's chip development capabilities, with a focus on achieving "自主可控" (independent control) in chip technology [34]. Group 3 - The article introduces new players in the RISC-V landscape, such as Zhihe Computing (知合计算) and Xinkai Technology (芯来科技), emphasizing their unique contributions and innovations in AI and automotive applications [40][49]. - Zhihe Computing aims to develop high-performance AI computing CPUs based on RISC-V architecture, targeting efficient integration of AI into business operations [43]. - Xinkai Technology is recognized for its focus on RISC-V CPU IP development and has achieved significant milestones, including being the first to obtain ASIL-D certification for automotive applications [50][53]. Group 4 - The entrepreneurial journey of Chen Zhijian and his company Jindie Shikong (进迭时空) is highlighted, showcasing the rapid production of RISC-V AI CPU chips and strategic investments to enhance their market position [55][57]. - The article concludes with a reflection on the ongoing evolution of the RISC-V ecosystem and the continuous emergence of new talent and companies, reinforcing the idea that the journey in the semiconductor industry is far from over [58].
2nm代工厂:我不与台积电竞争
半导体芯闻· 2025-07-24 10:21
Core Viewpoint - Rapidus, a joint venture in Japan, aims to mass-produce 2nm chips by 2027, showcasing its prototype just three months after the trial production line was activated [1][2]. Group 1: Company Overview - Rapidus has engaged in discussions with 30-40 potential clients, indicating strong interest in its technology [2]. - The company emphasizes that it will not compete directly with TSMC, focusing instead on providing an alternative supplier option for clients [2]. Group 2: Production Capacity and Market Position - Current production capacity is approximately 7,000 12-inch wafers per month, with plans to increase to 25,000-30,000 wafers upon mass production [2]. - TSMC's main factory is projected to exceed 100,000 wafers, highlighting the significant scale difference between the two companies [2]. Group 3: Industry Context - Rapidus's president noted that TSMC's new facility in Arizona may face challenges in achieving production and yield targets, which could impact its ability to meet demand [2].
一个在华为坐了6年“冷板凳”的专家
半导体芯闻· 2025-07-24 10:21
如果您希望可以时常见面,欢迎标星收藏哦~ 来源:内容转自《华为人》,作者: 李波杰,谢谢 。 若要问,一项研究从策划开始到商用落版本需要花多长时间?我能告诉你,可能是一年,也可能 是五六年,甚至更长。 Sub1G——一种工作频段低于1 GHz的无线电通信技术,是无线通信当中具有非常独特价值的"黄 金"频谱,有覆盖远穿透能力强的优点,被用作无线通信网络的基础覆盖层,但在提升连接速率 方面面临挑战。而Sub1G的Massive MIMO(多天线阵列)是针对Sub1G频段的大规模天线阵 列,通过引入Massive MIMO技术,有效提升网络的上下行连接速度,降低了时延。 迷雾中的两条路径 2018年~2019年间,5G推进如火如荼,华为在C band(C频段)大力推广Massive MIMO,容量 性能相比4G时代有数量级的提升。无线研究部开始布局在其他频段也研究Massive MIMO的可能 性,包括中频1.8G~2.1G、以及Sub1G。其中,由于Sub1G频段低,天线阵子尺寸很大,在有限 的天面空间内做Massive MIMO的难度非常高,挑战很大。 有一天,领导告诉我说,由于之前我在C band Massi ...
知合计算获授人工智能产业工委会工作组组长单位
半导体芯闻· 2025-07-23 09:59
来源: 知合计算官微 未来,工作组还将搭建开放协作平台,培养开发者社区,汇聚产学研力量加速软硬件协同创新,并推动RISC- V在AI芯片领域的产业化应用,促进生态构建。 RISC-V与AI的融合已经成为RISC-V在高性能计算领域发展的核心技术趋势。 作为工作组组长单位,知合计算 已正式发布通推一体的"阿基米德"产品系列,通过在架构和产品层面实现RISC-V与AI的高效融合,加速打造 高性能计算领域的标杆产品。 关于知合计算 知合计算致力于开发基于RISC-V架构的高性能、可扩展"通推一体"CPU芯片,依托自身生态 优势,聚焦应用实际需求,以"应用定义产品"的方式,为包括通用人工智能在内的广泛应用场 景打造创新、高效的算力基础。 近日,人工智能产业工作委员会在中国国际供应链促进博览会期间成功举办"芯生万物·智合致远"全体成员大 会。 大会上,知合计算正式获授RISC-V人工智能技术融合工作组组长单位。 人工智能产业工作委员会由工信部指导成立,汇集国内AI产业链上下游企业与高校研究机构,立足技术、标 准、测试与生态,为产业合作、政企沟通提供平台。 下辖RISC-V人工智能技术融合工作组则旨在推动RISC-V在人 ...
Chiplet生态系统正在慢慢兴起
半导体芯闻· 2025-07-23 09:59
Core Viewpoint - The article discusses the transition from custom chip environments to standardized chiplet designs, emphasizing the need for a robust ecosystem to support this shift [2][4]. Group 1: Chiplet Design and Ecosystem - The importance of application-specific chiplets is highlighted, suggesting that proper system segmentation can enhance efficiency and specialization [4]. - The concept of a "chip ecosystem" is introduced, indicating that it encompasses more than just purchasing chips; it involves a comprehensive infrastructure [5][6]. - The article notes significant advancements in EDA capabilities and standards, which have improved the integration and testing of chiplet systems [5][6]. Group 2: Challenges and Solutions - Key challenges in chiplet design include thermal performance, electromagnetic interference, and stress management, which require new models for integration [8][9]. - The lack of standardized packaging sizes and interfaces is identified as a barrier to effective chiplet integration [9][10]. - The article emphasizes the need for improved interconnect analysis to enhance predictability and reduce computational costs in chiplet design [14]. Group 3: Market Dynamics and Future Outlook - Companies are increasingly seeking cost efficiency, customization, and configurability in chiplet designs, driving the demand for multi-chip and chiplet systems [6][7]. - The article mentions that traditional semiconductor companies are now facing competition from automotive OEMs and emerging tech firms in the chiplet space [13]. - The vision for a chiplet ecosystem includes collaboration across hardware, software, protocols, and EDA processes to accelerate development [13].
这个国家,大力发展半导体
半导体芯闻· 2025-07-23 09:59
Core Viewpoint - The Swiss semiconductor industry is planning to establish a national chip production and research center to prevent falling behind other high-investment countries in the semiconductor sector [1][2]. Group 1: Project Overview - The proposed Chip FabLab will be located in the Zurich Innovation Park and aims to develop and produce chips for high-end niche applications such as robotics, autonomous vehicles, satellite communications, and quantum computing [1]. - The project is still in the planning phase, while other countries are investing billions to boost their semiconductor industries, such as Italy investing €2 billion (CHF 1.87 billion) for a production base and the U.S. company Texas Instruments investing $60 billion (CHF 48 billion) to increase production capacity [3]. Group 2: Financial Aspects - Initial investment for the Chip FabLab is estimated at CHF 100 million (approximately $125 million) for custom chip design and production, while full-scale chip manufacturing services would require CHF 300 million [5]. - The facility is expected to include a 4,000 square meter cleanroom to protect production lines from contamination and is projected to be operational within five years [5]. Group 3: Support and Collaboration - The project has garnered support from various institutions, including the Swiss Electronics Engineering Association (Swissmem), ETH Zurich, and EMPA, as well as interest from Swiss chip experts [9]. - Collaboration between private enterprises and public academia is emphasized, with the aim of maintaining Switzerland's competitiveness in the global semiconductor industry [9]. Group 4: Potential Impact - The establishment of the Chip FabLab is seen as a valuable bridge between research and industrial applications, facilitating technology transfer and prototype development [12]. - The project coordinator aims to announce detailed plans for the facility by the end of the year [12].
热设计成核心竞争力,鲁欧制造已提前布局
半导体芯闻· 2025-07-23 09:59
Core Viewpoint - The article highlights the growing importance of thermal design capabilities in ensuring the reliability of electronic systems, particularly in the context of increasing demand for high-reliability components in the semiconductor, new energy equipment, and industrial electronics sectors. The company Luou Intelligent Manufacturing is emerging as a key player in thermal design automation technology [1][3]. Group 1: Company Overview - Luou Intelligent Manufacturing (Shandong) Digital Technology Co., Ltd. was established in August 2020, focusing on common technology innovation in electronic thermal management. The company aims to build a complete Thermal Design Automation (TDA) tool ecosystem covering the entire thermal design process from measurement to data accumulation [5]. - The company is headquartered in Jinan, Shandong, with a research and market center in Beijing. Its core team possesses strong capabilities in multi-physical modeling, thermal testing, system simulation, and engineering applications across various technical dimensions [5]. Group 2: Product Offerings - Luou has developed two core product systems: - The FASIM multi-physical simulation platform integrates multiple simulation modules (thermal, fluid, electromagnetic, structural, optical) and is designed as a one-stop simulation tool for engineers, emphasizing accuracy and ease of use [8]. - The third-generation "Chixiao" series transient thermal resistance testers and power cycling aging equipment, which are characterized by high precision, rapid response, compact structure, and strong compatibility, have successfully broken the foreign monopoly in this field [8]. Group 3: Industry Collaboration - Luou has established long-term partnerships with key clients such as Huawei, CRRC, China Electronics Technology Group, and others, and has collaborated with institutions like Beihang University and Harbin Institute of Technology to enhance industry-academia cooperation [9][10]. Group 4: Conference Highlights - The third user conference featured discussions on key topics such as reliability, simulation platforms, packaging optimization, and online testing, showcasing the evolving role of electronic thermal management as a strategic element in high-value industries like semiconductors and new energy [11][13]. - Experts from various institutions shared insights on the application prospects of reliability theories, advancements in simulation capabilities, and the integration of testing with commercial decision-making [11][12]. Group 5: Future Vision - Luou's vision is to promote the transformation of thermal design into a systematic and platform-based approach, providing competitive thermal management technology for both the Chinese and global electronic industries. The concept of "thermal digital twin" represents a shift in thinking, making thermal management controllable and design-driven [13].
力积电亏损加剧,提出五大聚焦重点
半导体芯闻· 2025-07-23 09:59
Core Viewpoint - The company Lichee Semiconductor reported a significant increase in net losses for Q2 2025, primarily due to the appreciation of the New Taiwan Dollar and foreign exchange losses, with a net loss of NT$33.3 billion and a loss per share of NT$0.8, compared to NT$0.26 in Q1 [1] Group 1 - In Q2, the company shipped approximately 400,000 wafers, a 9% increase from Q1, but the average selling price (ASP) declined by 2% to 3% due to a 5% appreciation of the New Taiwan Dollar, resulting in a revenue growth of only 1.5% in NT dollar terms [1] - The foreign exchange factors significantly impacted profitability, with a foreign exchange loss of NT$15.9 billion in Q2, leading to a net loss increase from NT$11 billion in Q1 to NT$33.3 billion in Q2 [1] Group 2 - The company plans to focus on five operational priorities, including a low visibility outlook for Q3 in the Greater China region, with weak demand for driver ICs and image sensors, while demand for power management ICs (PMICs) related to AI applications remains strong in Europe and the US [1] - Demand for DRAM foundry services has rebounded, driven by major manufacturers exiting the 8G DDR4 market, prompting customers to stock up, with wafer demand fully loaded and ASPs increasing monthly since last month [2] - The SLC Flash product line is seeing a recovery in demand as end customers reduce inventory, with 24nm SLC Flash now in mass production, and the company expects future shipping momentum as major manufacturers gradually exit the SLC market [2] Group 3 - The company is accelerating its 3D AI Foundry and Interposer layout, with small-scale shipments of Interposer starting in Q2, primarily focusing on CoWoS-S, and plans to expand capacity for Interposer production, which is expected to contribute to gross margins over the next two years [2] - The company is also progressing with DRAM four-layer WoW stacking in conjunction with advanced logic process chips, and is developing eight-layer WoW stacking technology with customers, which, along with Interposer, is expected to become a major profit source for the 3D AI Foundry [2] - The development of an 8-inch GaN application for AI servers on a 100V technology platform is nearing completion, with the first batch of customer samples being sent, and trial production expected to start in Q4 this year, following increased inquiries from US and Japanese customers regarding GaN foundry services [2]