Core Viewpoint - The article discusses the significant shift in the automotive MCU market with the introduction of new embedded storage technologies like PCM and MRAM, moving away from traditional embedded Flash technology. This transition is seen as a strategic move that will have a profound impact on the MCU ecosystem [1][3]. New Storage Pathways - Major MCU manufacturers such as ST, NXP, and Renesas are launching new automotive MCU products featuring advanced embedded storage technologies, indicating a shift from traditional 40nm processes to more advanced nodes like 22nm and 16nm [2]. - The evolution of MCUs is characterized by increased integration of AI acceleration, security units, and wireless modules, positioning them as central components in automotive applications [2]. Embedded Storage Technology Revolution - The rise of embedded non-volatile memory (eNVM) technologies is crucial for addressing the challenges posed by the complexity of software-defined vehicles (SDVs) and the increasing demands for storage space and read/write performance [3]. - Traditional Flash memory is becoming inadequate in terms of density, speed, power consumption, and durability, making new storage solutions essential for MCU advancement [3]. ST's Adoption of PCM - ST has introduced the Stellar series of automotive MCUs featuring phase change memory (PCM), which offers significant advantages over traditional storage technologies [5][6]. - The Stellar xMemory technology is designed to simplify the development process for automotive manufacturers by reducing the need for multiple memory options and associated costs [7][9]. NXP and Renesas Embrace MRAM - NXP has launched the S32K5 series, the first automotive MCU based on 16nm FinFET technology with integrated MRAM, enhancing the performance and flexibility of ECU programming [10]. - Renesas has also released a new MCU with MRAM, emphasizing high durability, data retention, and low power consumption, further showcasing the advantages of MRAM technology [11]. TSMC's Dual Focus on MRAM and RRAM - TSMC is advancing both MRAM and RRAM technologies, aiming to replace traditional eFlash in more advanced process nodes due to the limitations faced by eFlash technology [15]. - TSMC has achieved mass production of RRAM at various nodes and is actively developing MRAM for automotive applications, indicating a strong commitment to new storage technologies [15][16]. Integration of Storage and Computing - The article highlights a trend towards "storage-computing integration," where new storage technologies like PCM and MRAM are not just replacements but catalysts for MCU architecture transformation [19]. - The merging of storage and computing functions is becoming increasingly important in the context of AI, edge computing, and the growing complexity of computational tasks [21]. Conclusion - The MCU landscape is evolving from a focus on basic control systems to a more integrated approach where storage plays a critical role in computing architecture, driven by advancements in embedded storage technologies [23]. - This transformation presents both challenges and opportunities for domestic MCU manufacturers, who must adapt to the rapidly changing technological landscape [23].

公众号记得加星标⭐️，第一时间看推送不会错过。 来源：内容 编译自 phys 。 像 ChatGPT 这样的人工智能系统以耗电而闻名。为了应对这一挑战，光学、光子学和激光中心 (COPL) 的一个团队研发 出了一种光学芯片，能够以超高速传输海量数据。这项技术虽然纤细如发丝，却能提供无与伦比的能源效率。 这项创新技术发表在《自然光子学》杂志上，利用光的能量传输信息。与传统系统仅依赖光强度不同，该芯片还利用了光 的相位，换句话说，就是光的位移。 *免责声明：本文由作者原创。文章内容系作者个人观点，半导体行业观察转载仅为了传达一种不同的观点，不代表半导体行业观察对该观点赞同或支持， 如果有任何异议，欢迎联系半导体行业观察。 END 通过为信号添加新的维度，该系统达到了前所未有的性能水平，同时保持了极小的尺寸。"我们的传输速度从每秒 56 千兆 比特跃升至每秒 1000 千兆比特，"该研究的第一作者、博士生 Alireza Geravand 说道。 研究团队看到了人工智能模型训练的巨大潜力。"以每秒1000千兆比特的速度，你可以在不到七分钟的时间内传输完整的 训练数据集——相当于超过1亿本书。这大约相当于煮一杯咖啡的 ...

Core Viewpoint - Applied Materials has developed an advanced copper interconnect process for logic chips at 2nm and beyond, addressing challenges in performance and reliability due to shrinking interconnect sizes [2][23]. Group 1: Advanced Logic Chip Development - The new copper interconnect process utilizes Low k dielectric materials and RuCo liner technology, demonstrating feasibility through AI accelerator test chips based on the latest 2nm transistor technology [2][23]. - The complexity of interconnects in advanced chips, which can contain billions of transistors, has led to increased resistance and other issues affecting chip performance and reliability [2][23]. - The need for process innovation to reduce resistance and capacitance without compromising reliability and yield is emphasized by industry experts [2][23]. Group 2: Semiconductor Industry Background - The semiconductor industry produces various types of chips, including processors, GPUs, and memory chips, which are essential for numerous electronic systems [3]. - Chips are manufactured in large factories known as fabs, where complex electronic circuits are integrated into silicon wafers [3]. Group 3: Evolution of Transistors and Interconnects - The history of semiconductor technology dates back to the invention of the transistor in 1947, leading to the development of integrated circuits in the late 1950s [7][10]. - The transition from aluminum to copper interconnects in the 1990s significantly improved chip performance due to copper's lower resistivity [11][12]. Group 4: Challenges and Innovations in Interconnect Technology - As technology advances to 20nm and below, copper interconnects face challenges such as RC delay, which affects chip speed [17][18]. - The introduction of FinFET transistors and the shift to cobalt liners have helped mitigate some of these challenges, allowing for the development of chips at 3nm nodes [18][20]. - The industry is moving towards GAA (Gate-All-Around) transistors for 2nm nodes, which promise better performance but come with increased manufacturing complexity and costs [20][23]. Group 5: Applied Materials' Copper Interconnect Process - The copper interconnect process developed by Applied Materials involves several steps, including dielectric deposition, metal filling, annealing, and chemical mechanical polishing (CMP) [25][29]. - The use of RuCo liners and TaN barriers in the process allows for reduced resistance and improved performance, with a reported performance enhancement of 2.5% in a 2nm test chip [24][25]. - The integration of back-side power delivery networks (BSPDN) in advanced nodes aims to address power distribution challenges while maintaining signal integrity [32][35].

Core Viewpoint - GlobalFoundries' acquisition of MIPS is aimed at enhancing its service offerings without transitioning into an Integrated Device Manufacturer (IDM) model, focusing on providing ready-to-use computing IP to accelerate customers' product launch processes [2][4][5]. Group 1: Acquisition Purpose - The acquisition is intended to provide customers, especially those new to chip development or seeking vertical integration, with a simplified system design process through ready-to-use IP modules [4][5]. - GlobalFoundries emphasizes that it remains a pure foundry focused on helping customers create world-class products, and the acquisition will expand its capabilities to offer a more comprehensive service portfolio [4][5]. Group 2: Competitive Landscape - By offering RISC-V processor IP, GlobalFoundries may compete directly with existing IP suppliers like Andes Technology, but it believes that combining IP with its differentiated manufacturing processes will provide unique advantages to customers [4][6]. - The acquisition positions GlobalFoundries as the first foundry to offer processor IP based on the open-source RISC-V architecture, significantly enhancing its attractiveness to new market entrants [6]. Group 3: MIPS Operations - MIPS will continue to operate independently as a subsidiary of GlobalFoundries, maintaining existing customer relationships and ongoing projects without interruption [8][9]. - The strategy is to keep MIPS as an open and independent IP supplier, with no immediate changes planned for its product offerings or customer collaboration methods [9].

以专注分析科技行业薪酬的Levels.fyi提供的案例为例，可以看出英伟达一些"相当普通"的个体贡献者如今可能已经成为 百万富翁。而那些职位级别更高的员工，如今可能正经历更为惊人的财富变革。 Levels.fyi参考了2022年9月英伟达的一份真实聘用合同。彼时，一名中期职业发展的硬件工程师获得了如下薪资方案：18 万美元年薪、5万美元股票奖励，以及4万美元签约奖金。 Levels.fyi假设这名员工此后未再获得任何股票或奖金，只是持有了那一次性的股票奖励。然而，由于英伟达股价自那时 起一路飙升，并在本周三创下每股162.88美元的收盘纪录，那份股票的价值如今几乎涨到了70万美元，总薪酬高达85.1万 美元。 通常来说，科技公司每年都会追加股票奖励，因此这个估算可能还远低于现实情况。简而言之：只要这位"普通员工"留在 公司至今，他/她现在基本就是个百万富翁。 谷歌员工也来"围观" 大约一周前，当Levels.fyi联合创始人Zuhayeer Musa在LinkedIn发布这项分析时，一位谷歌员工也参与了讨论。 公众号记得加星标⭐️，第一时间看推送不会错过。 来源：内容来自 businessinsider 。 ...

Core Viewpoint - Intel's subsidiary RealSense has officially spun off to become an independent company, securing $50 million in funding to expand into new markets and accelerate innovation in AI, robotics, and biometrics [3][4]. Group 1: Company Overview - RealSense is a leading developer of computer vision systems, focusing on depth perception and tracking technology, enabling devices like robots and drones to understand their 3D environments [3]. - The company's core product line includes a popular series of "depth cameras" that utilize stereo vision, structured light, and time-of-flight technologies for precise depth measurement [3][4]. - RealSense has embedded its depth camera products in approximately 60% of the global autonomous mobile robots (AMR) and humanoid robots, serving over 3,000 clients worldwide [4]. Group 2: Market Potential - The global robotics market is projected to grow from $50 billion to over $200 billion in the next six years, with significant growth driven by humanoid robots and other smart devices that rely on computer vision technology [4]. - Biometric technology is expected to expand rapidly, becoming a standard feature in airport security and large event access control systems [5]. Group 3: Strategic Initiatives - The funding will be used to expand the sales team, accelerate product development, and recruit AI, robotics, and software engineers to strengthen RealSense's leadership in AI vision technology [5]. - RealSense's CEO emphasized that their technology aims to enhance human capabilities by taking over repetitive tasks, allowing humans to focus on more creative and decision-making roles [5].

Core Viewpoint - AMD is planning to adopt multi-chip module (MCM) architecture for consumer-grade GPUs, leveraging its experience from the Instinct MI200 AI accelerator series, which was the first to implement MCM design [3][5]. Summary by Sections Multi-Chip Module (MCM) Concept - The MCM concept is gaining traction in the graphics processing industry due to limitations of single-chip designs, with AMD being a key player in this transition [3]. - AMD's Instinct MI200 series integrated multiple chiplets, including graphics processing cores, HBM stacked memory, and I/O chips [3]. Technical Innovations - AMD's new patent reveals a "smart switch data structure circuit" that connects compute chiplets with memory controllers, optimizing memory access and reducing latency to nanoseconds [4]. - Each Graphics Compute Die (GCD) will feature L1 and L2 caches, similar to AI accelerators, and will have access to a shared L3 cache through the switch, minimizing global memory access [4]. Ecosystem and Competitive Advantage - AMD has a complete ecosystem in place, utilizing TSMC's InFO-RDL bridging technology and a specific version of Infinity Fabric for chip interconnects [5]. - The integration of gaming and AI architectures into a unified UDNA architecture positions AMD favorably against competitors, despite the complexities associated with chiplet designs [5]. Future Outlook - AMD aims to address latency issues experienced in previous architectures, such as RDNA 3, through innovative solutions like the shared L3 cache [5]. - The market may not see the full impact of these innovations until the release of UDNA 5 [5].

Core Viewpoint - The semiconductor industry is crucial for modern technology and is a key driver of innovation, with the U.S. holding a significant share of the global market but facing challenges from international competitors [1][2]. Group 1: Current State of the Semiconductor Industry - By 2025, semiconductors will be foundational to various sectors, including AI, quantum computing, and defense systems, highlighting their importance in global technological leadership [1]. - The U.S. semiconductor industry has seen a decline in manufacturing capacity from 37% in 1990 to just 10% in 2022, raising concerns about future competitiveness [1]. - The U.S. semiconductor industry currently accounts for over 50% of global chip revenue, but its manufacturing capacity is under threat from international competition [1][43]. Group 2: Government Initiatives and Investments - Significant government incentives and research investments have been implemented to reverse the decline in U.S. semiconductor leadership, with over $500 billion in private investments announced across 28 states [2][11]. - These investments are expected to create over 500,000 jobs and double U.S. chip manufacturing capacity by 2032 [2][11]. - The Advanced Manufacturing Investment Credit (AMIC) has been increased from 25% to 35%, further stimulating investment in the semiconductor sector [11]. Group 3: Research and Development - Federal R&D investments are crucial for maintaining and expanding U.S. technological leadership, with 2024 R&D spending projected to reach $62.7 billion, a 5.7% increase from 2023 [18][19]. - The semiconductor industry invests 17.7% of its revenue in R&D, the second highest among U.S. industries, which supports innovation and market leadership [19][18]. - Ongoing federal research initiatives are essential for fostering innovation and enhancing national security [13][14]. Group 4: Workforce Development - The semiconductor industry employs approximately 345,000 people directly, with a projected shortfall of 67,000 skilled workers by 2030 [29][32]. - Collaboration between government and industry is necessary to expand the pipeline of STEM graduates and attract top engineering talent [32]. - A skilled domestic workforce is vital for maintaining U.S. leadership in the semiconductor sector and ensuring economic and national security [32]. Group 5: Global Market Dynamics - The U.S. semiconductor industry generates about 70% of its revenue from international sales, emphasizing the need for a strong global market presence [40]. - The global semiconductor market is projected to grow to $701 billion by 2025, with the U.S. expected to maintain a significant share [54][55]. - The demand for semiconductors is driven by advancements in AI, 5G, and other transformative technologies, with a strong growth outlook for the next decade [56][59]. Group 6: Economic Contributions - The U.S. semiconductor industry remains a top export sector, with exports projected to reach $57 billion in 2024, reflecting a 13% growth [43][44]. - The industry's growth is supported by increasing domestic manufacturing capacity and significant investments, enhancing export potential [44]. - The semiconductor sector's health is critical for the U.S. economy, influencing various downstream industries such as AI, telecommunications, and healthcare [60][61].

Core Viewpoint - Qualcomm has been relatively inactive in the wearable chip market compared to its smartphone chip investments, but it is now reportedly developing a new wearable platform that could significantly enhance the performance of next-generation Wear OS devices [1][2][3]. Group 1: Qualcomm's Wearable Chip Development - Qualcomm's previous wearable chips were mostly adaptations of existing smartphone chips, with minimal custom designs specifically for wearables [2]. - The new chip, codenamed Aspen and model SW6100, is currently in internal testing and is expected to be a significant upgrade over previous models [3][4]. - The SW6100 chip is manufactured using TSMC processes, which is anticipated to improve energy efficiency compared to previous generations [3]. Group 2: Technical Specifications and Improvements - The SW6100 will feature an upgraded memory controller supporting LPDDR5X, which is expected to enhance battery life compared to the previous W5 Gen 1 that only supported LPDDR4 [3]. - The CPU architecture of the SW6100 includes 1× Cortex-A78 and 4× Cortex-A55 cores, marking a substantial upgrade from the older Cortex-A53 used in previous models [4]. - The introduction of the QCC6100 co-processor is noted, although specific details about it are currently unknown [3]. Group 3: Future Outlook - If the SW6100 chip successfully enters mass production, it is projected to appear in Wear OS smartwatches by 2026 [5].

公众号记得加星标⭐️，第一时间看推送不会错过。 来源：本文编译自 Chip Interfaces ApS 。 飞利浦半导体公司（现为恩智浦半导体公司）于 1980 年发明的 I2C（Inter-Integrated Circuit：内 部集成电路）总线，在简化嵌入式系统通信方面迈出了一大步。它是一种简单的双线接口，用于同 步、多主/多从、单端串行通信。 45 年后，它仍然广泛用于连接低速外设集成电路 (IC)、处理器和微控制器。但如今的硅片已经发 生了变化，我们已经从 8 位 MCU 发展到多核 SOC，从简单的传感器发展到复杂的多模传感器设 备。对带宽、延迟和功耗的需求都在增加，而这正是新型改进型总线变体得以发展的契机。 什么是I3C以及它为何重要？ I3C（Improved Inter-Integrated Circuit：改进型集成电路）是由MIPI 联盟开发的一种总线，是一 种基于 I2C 的双线接口，并对其进行了改进以提高速度和效率。它旨在取代 I2C（以及部分 SP I），同时仍保持与 I2C 的向后兼容。它提供高达 12.5 MHz 的更高时钟速度、无需额外线路的带 内中断、动态寻址、双数据速率 ...