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卓胜微公告:创始人夫妇离婚
半导体行业观察· 2026-02-12 00:56
公众号记得加星标⭐️,第一时间看推送不会错过。 公告进一步指出,本次权益变动未导致公司实际控制人发生变化,公司实际控制人共同控制的表决权 数量未发生变化,不涉及公司控制权变更,对公司的经营管理不构成影响。 按照公告所说,经许志翰先生和 ZHANG YU(张昱)女士协商,许志翰先生拟将其直接持有的公司 17,152,005 股股票分割过户给 ZHANG YU(张昱)女士。本次权益变动的具体情况如下: 本次权益变动前,许志翰先生直接持有公司无限售条件流通股份 34,304,010股,占公司总股本的 6.41%。ZHANG YU(张昱)女士本次权益变动前未持有公司股份。 而根据许志翰先生与 ZHANG YU(张昱)女士签订的《离婚财产分割协议》,就有关股权分割约定 如下: ( 1 ) 许 志 翰 先 生 将 其 直 接 持 有 的 公 司 无 限 售 条 件 流 通 股 份 17,152,005 股 , 占 公 司 总 股 本 的 3.21%,分割至 ZHANG YU(张昱)女士名下; (2)ZHANG YU(张昱)女士直接持有公司股份 17,152,005 股,占公司总股本的 3.21%。根据双 方 约 定 , ...
汽车存储告急,如何破局?
半导体行业观察· 2026-02-12 00:56
Core Viewpoint - The article highlights the increasing importance of storage solutions in the automotive industry, particularly in the context of smart vehicles and the growing demand for AI capabilities, which is leading to a supply crisis in automotive-grade storage components [1][3][19]. Group 1: Market Dynamics - Starting from the second half of 2025, the surge in AI computing infrastructure is igniting a cycle of price increases and shortages in the storage market [1]. - The automotive sector is facing a "storage crisis" due to the rising demand for AI in smart cockpits and advanced driver-assistance systems, coupled with a global shift of suppliers towards AI production [1][3]. - The cost of automotive-grade memory is skyrocketing, with quarterly increases reported as high as 50%, and some forecasts predicting that the supply satisfaction rate for automotive-grade storage could fall below 50% by 2026 [1][4]. Group 2: Storage Requirements in Smart Vehicles - The demand for storage in smart vehicles has evolved from basic functions to becoming a critical component for real-time data processing from various sensors, making it essential for the development of software-defined vehicles (SDVs) [3][4]. - High-end smart vehicles typically require 4-16 DRAM chips and 2-6 NAND Flash chips, with costs rising from $40-90 in early models to $90-220 in current mid-to-high-end models, and potentially exceeding $500 for advanced models [4][7]. Group 3: Competitive Landscape - The disparity in capabilities among storage suppliers is evident, with many only able to provide consumer-grade storage that does not meet the stringent requirements of automotive applications [1][10]. - Jiangbolong, a company with seven years of experience in automotive-grade storage, is positioned to fill this critical gap by transitioning from a background player to a front-line provider [1][19]. Group 4: Jiangbolong's Strategic Positioning - Jiangbolong has developed a comprehensive range of automotive-grade storage products, having established deep partnerships with over 20 OEMs and 50 Tier 1 automotive clients, ensuring high market recognition and collaboration [8][19]. - The company has implemented a dual business model (TCM and PTM) to enhance supply chain stability and provide customized solutions, addressing the challenges posed by the current supply crisis [10][13][16]. Group 5: Future Outlook - The rise of edge AI is transforming the role of storage in vehicles, making it a vital component for processing vast amounts of sensor data in real-time [19][20]. - Jiangbolong aims to leverage its proprietary technology and collaborative ecosystem to ensure a stable supply of high-performance storage solutions, even as demand shifts towards data centers [19][20].
三星公布HBM新路线图
半导体行业观察· 2026-02-12 00:56
公众号记得加星标⭐️,第一时间看推送不会错过。 三星电子设备解决方案(DS)事业部总裁兼首席技术官(CTO)宋在赫公布了公司下一代产品路线 图。 在2月11日于首尔江南区COEX举行的"SEMICON Korea 2026"主题演讲中,三星电子社长宋载赫表 示:"随着人工智能从智能体人工智能(Agent AI)向物理人工智能(Physical AI)发展,我们预计 工作负载(数据计算量)将大幅增加。三星电子正在开发能够显著降低内存带宽限制的技术。" 宋社长强调,三星电子是唯一一家涵盖存储器、晶圆代工(半导体代工制造)和封装的集成器件制造 商(IDM),并表示:"我们计划展示三星半导体独有的强大协同优化能力。"他解释说,三星旨在通 过涵盖设计、工艺、存储器和封装的集成解决方案,引领先进技术的发展。 宋总裁还介绍了下一代HBM架构"cHBM"和"zHBM"的研发进展,并指出"我们正在与客户沟通"。他 分享了"三星定制HBM(cHBM)"的研发成果,并表示"我们正在研发定制HBM,通过主动采用芯片 间接口IP,确保更高的带宽"。cHBM是一种专用集成电路(ASIC),旨在通过为AI半导体客户进行 定制来最大限度地提 ...
拥抱Chiplet,大芯片的必经之路
半导体行业观察· 2026-02-12 00:56
Core Viewpoint - The article discusses the emergence of Chiplet architecture as a transformative solution for high-performance computing (HPC) and artificial intelligence (AI), offering significant advantages in performance, cost, and energy efficiency compared to traditional single-chip processors [2][4]. Group 1: Chiplet Architecture Advantages - Chiplet architecture can provide higher performance at lower costs while reducing energy consumption by up to 10 times compared to traditional single-chip processors [2]. - This architecture allows for better integration of components, reducing the need for data to be transferred off-chip, which in turn lowers power consumption and heat generation [4][5]. - The use of UCIe (Universal Chiplet Interconnect Express) enables a layered architecture that is compatible with other interconnect standards, facilitating tighter chip arrangements and improved performance [4][6]. Group 2: Manufacturing and Scalability - Chiplet architecture improves manufacturing efficiency by allowing for the replacement of defective components without affecting the entire system, thus enhancing yield rates [4][5]. - The scalability of chiplets is achieved through packaging-level scaling, which overcomes limitations of traditional photolithography, enabling systems that exceed the capacity of single chips [5][6]. - The architecture supports 3D designs, allowing for stacked components that enhance computational density and reduce data latency, although this introduces higher costs and complexity [7][8]. Group 3: Market Trends and Future Outlook - The demand for AI and HPC capabilities is driving the adoption of chiplet technology, with companies like NVIDIA pushing the boundaries of traditional chip design [6][7]. - The Chiplet community is still in its early stages but shows strong momentum, with key industry players gathering to discuss advancements and standards [8][9]. - The adoption of UCIe is seen as crucial for establishing chiplet standards and expanding the chiplet community, although some suppliers express caution regarding their investments in UCIe [8][9].
积塔半导体王俊:以系统工艺打造车规级晶圆代工“特色”
半导体行业观察· 2026-02-11 01:27
Core Viewpoint - The article emphasizes the evolving landscape of mature process semiconductor manufacturing, highlighting its increasing importance in the global market and the shift in focus from capacity supply to value and reliability in production, particularly in automotive applications [1][3]. Group 1: Market Dynamics - By 2025, China's mature process chip capacity is expected to account for approximately 28% of the global market, with projections to rise to 39% by 2027 [1]. - The demand for mature process chips is stable and substantial, leading to a wave of capacity expansion and concerns about structural oversupply [1]. Group 2: Automotive Industry Requirements - The automotive industry demands high reliability and consistency in chip production, which creates a significant barrier to entry for foundries due to stringent certification processes [3][4]. - Automotive chips must maintain performance across wider temperature ranges and complex conditions, necessitating higher standards for manufacturing consistency [3]. Group 3: Competitive Landscape - The core competitiveness in automotive foundry does not lie in single-point technologies but in comprehensive system capabilities, including long-term stable multi-process platforms and quality control systems [4][8]. - Companies like Jiata Semiconductor leverage nearly 30 years of experience in automotive electronics to establish a robust quality management system, differentiating themselves from traditional foundries [4]. Group 4: Systematic Approach to Manufacturing - Jiata Semiconductor focuses on building a "automotive foundry base" that emphasizes long-term stable supply and system capability rather than betting on specific process nodes [8][10]. - The company provides a complete manufacturing support system for automotive power systems, integrating various components across different process platforms [8][9]. Group 5: Advanced Packaging and Integration - The traditional linear division of labor in the semiconductor industry is being disrupted by advanced packaging needs, particularly with Chiplet architectures requiring deep collaboration between manufacturing and packaging [10]. - Jiata Semiconductor positions itself as a key player in the Chiplet ecosystem, offering a comprehensive technology library to meet diverse customer needs [10]. Group 6: Redefining the Role of Foundries - The role of foundries is evolving from mere manufacturing to becoming system-level enablers in the product innovation process, fostering long-term technical collaboration with clients [12][16]. - By engaging early in the design process, Jiata aims to clarify system architecture and reduce the risk of redundant competition, moving away from price wars [14][15]. Group 7: Strategic Vision - Jiata Semiconductor's strategy focuses on building differentiated capabilities through systematic collaboration rather than competing solely on price, aiming for sustainable value creation [18]. - The company emphasizes a long-term commitment to quality and customer service, positioning itself for competitive advantage in the evolving semiconductor landscape [18].
英特尔 18A ,真的干成了
半导体行业观察· 2026-02-11 01:27
Core Viewpoint - Intel's 18A process technology represents a significant engineering ambition and commercial uncertainty, with its initial application in the Panther Lake processor showcasing potential breakthroughs in semiconductor design [2] Group 1: Technology Overview - The core of Intel's 18A process is the Backside Power Delivery Network (BSPDN), known internally as PowerVia, which moves power circuits to the back of the chip, allowing for improved signal routing speed, performance density, and power efficiency [2] - This innovation marks a major shift from traditional front-side power management methods and combines PowerVia with Intel's RibbonFET transistor design for the first time in a complete production node [2] Group 2: Competitive Landscape - The 18A technology theoretically positions Intel two generations ahead of competitors like TSMC, which plans to implement a similar system in its A16 process a decade later [5] - However, the leap in chip technology complicates sales, as the BSPDN requires a complete redesign of existing design methodologies, limiting external adoption despite internal success with Panther Lake [5] Group 3: Future Prospects - Analysts expect BSPDN to see broader adoption by the end of this decade, likely aligning with Intel's next-generation process nodes (14A and beyond) becoming more viable for external contracts [6] - By that time, PowerVia technology is anticipated to mature, making the redesign costs more justifiable compared to the gains in energy and computational efficiency [6]
谁真正控制着芯片供应?
半导体行业观察· 2026-02-11 01:27
Core Insights - Semiconductor manufacturing equipment is the most constrained link in the chip supply chain, determining the capacity ramp-up and process node scaling of wafer fabs [2] - The delivery cycle for advanced equipment can take months, leading to wafer shortages and increased chip prices during any disruptions [2] - Despite the recovery of equipment supply since the 2020-2022 period, demand remains strong, driven by AI servers, HBM, and increased capital expenditures from foundries and IDMs [6] Group 1 - The global equipment investment is projected to reach approximately $130 billion by 2025, with China being the largest investor despite U.S. export controls [6] - The supply chain faces several challenges, including the complexity of equipment components sourced from a few suppliers, which creates structural bottlenecks [9] - The long certification cycles for alternative suppliers exacerbate supply disruptions, as wafer fabs require proven performance before switching suppliers [9] Group 2 - Geopolitical factors are reshaping market dynamics, with U.S. export restrictions altering order flows and prompting China to accelerate domestic equipment development [9] - Global logistics and material trade remain fragile, with reliance on specialized inputs that often require international integration [10] - The demand for on-site support and spare parts is increasing, which can limit service capabilities in certain regions [10] Group 3 - Yole Group anticipates three major transformations in the semiconductor equipment ecosystem, focusing on regionalization and collaboration with subsystem suppliers [11] - The diversification of technology will shift the location of bottlenecks, as advanced packaging and heterogeneous integration create new equipment demands [12] - Key players in the semiconductor equipment market include ASML, Applied Materials, Lam Research, and Tokyo Electron, with emerging Chinese OEMs like Naura and AMEC gaining traction [12]
营收创历史新高,中芯国际赵海军:长坡厚雪,久久为功
半导体行业观察· 2026-02-11 01:27
公众号记得加星标⭐️,第一时间看推送不会错过。 来到产能数据方面,据介绍,中芯国际2025年年底折合8英寸标准逻辑月产能为105.9万片,与前一 年年底相比增加约11.1万片。而在整个2025年,中芯国际折合8英寸标准逻辑出货总量约970万片, 年平均产能利用率为93.5%,同比提升8个百分点。 赵海军表示,中芯国际2025年资本开支为81亿美元,高于年初预期,这主要是为了受客户强劲需 求,外部环境变化以及设备交付时间延长等多重因素的影响。"已购买的设备不一定能够在今年就形 成完整生产能力",赵海军在财报说明会上补充说。 赵海军进一步指出,回顾2025年全年,原来在国外设计、国外生产、销售到国内的半导体产业链向本 土化切换带来的重组效应贯穿全年。转换速度最快的是模拟类产品,其次是显示驱动、摄像头、存 储,再然后是MCU、数模混合、逻辑等。中国本土的设计公司抓住了机会,取得了供应链份额。而 公司瞄准客户细分产品需求,加快验证并扩产上量,使得公司在2025年经营业绩再上台阶,产收规模 实现新跨越。 展望2026年,赵海军认为,产业链海外回流、国内客户新产品替代海外老产品的效应将持续下去,为 国内产业链带来持续的增 ...
深耕中国四十年,德州仪器的底气
半导体行业观察· 2026-02-11 01:27
作为模拟芯片行业绝对的龙头,德州仪器(Texas Instruments,简称 TI)在终端市场的号召力 毋庸置疑。 曾经有国内芯片行业从业者告诉半导体行业观察:"德州仪器这些芯片厂商的强大之处不仅体现在 他们拥有广泛的开发者基础、庞大的用户群体以及多样化的参考设计,还体现在他们丰富且配置多 样化的料号,能随时满足你几乎所有的需求,这是其竞争对手难以企及的。" 正因如此,自 1986 年进入中国市场以来,德州仪器成为中国产业发展的可靠支持者。现在,随着 中国产业的转型升级,德州仪器表示,公司将一如既往地支持中国客户。 德州仪器嵌入式处理和 DLP® 产品高级副总裁 Amichai Ron 日前在与半导体行业观察等沟通的时 候也强调:"中国市场始终是 TI 重要的战略市场。" 在中国,坚持做三件事 Amichai 告诉半导体行业观察,展望未来,德州仪器将在中国坚持做三件事: 1. 听取客户需求进行创新:基于中国客户需求做产品创新,解决更多问题; 2. 提供可扩展的产品组合:提供从低端到高端的可扩展产品,满足客户的不同需求,同时最 大程度兼容软件,使客户快速开发; 3. 提供生产制造能力:利用强大的制造能力,确保 ...
一系列超强芯片,即将揭秘
半导体行业观察· 2026-02-11 01:27
Core Insights - The International Solid-State Circuits Conference (ISSCC) will take place from February 15 to 19, 2026, in San Francisco, showcasing significant advancements in semiconductor technology [2] Group 1: AI Chips - AMD's latest AI GPU, Instinct MI350, features a CDNA4 architecture with a theoretical peak performance increase of 1.9 times compared to its predecessor, and improvements in HBM input/output bandwidth and memory capacity by 1.5 times [2] - Rebellions has developed a large-scale AI inference subsystem using UCIe protocol, achieving a performance of 56.8 TPS on the Llama 3.3 model with 700 billion parameters [3] - IBM's AI accelerator, Spyre, is optimized for inference, boasting a throughput 32% higher than the latest GPUs and energy efficiency 2 to 3 times better [3] - MediaTek's MADiC, a generative diffusion accelerator, achieves performance of 7.4 TOPS/mm² and 17.4 TOPS/W, designed for generative image editing on edge devices [4] - NVIDIA's ALPhA-Vision real-time image processor has a face detection latency of 787 microseconds and an accuracy rate of 99.3% [5] Group 2: Memory Technologies - SanDisk and Kioxia have developed a 3D NAND flash memory with a density of 37.6 Gbit/mm², capable of reaching a storage capacity of 2 Tbit and a write speed of 85 MB/s [6] - Samsung is set to release a DRAM module with a capacity of 36GB and a data transfer rate of up to 3.3 TB/s, utilizing 12 chips stacked together [7] - SK Hynix has developed a 16Gbit LPDDR6 SDRAM with a data transfer rate of 14.4 Gbps per I/O pin [7] - Samsung will also introduce a 16Gbit LPDDR6 SDRAM with a data transfer rate of 12.8 Gbps [8] - SK Hynix's 24Gbit GDDR7 DRAM targets mid-range AI inference applications with a data transfer rate of 48 Gbps [8] Group 3: Image Sensors - STMicroelectronics will showcase a lidar receiver with a field of view of 54°×42° and a power consumption of 153 mW [9] - Sony Semiconductor Solutions has developed a Ge-on-Si SPAD sensor array designed for low-power AR/VR applications, with a power consumption of 26 mW at 30 fps [10] - SmartSens Technology's CMOS image sensor features 200 million pixels and supports 8K video recording at 60 fps [11] Group 4: AI Chip Presentations - NVIDIA will present its GB10 processor for desktop AI supercomputers, featuring 20 Armv9.2 cores and a performance of 31 TFLOPS in FP32 mode [12] - STMicroelectronics will discuss the STM32N6 microcontroller series, integrating an Arm Cortex-M55 CPU and a Neural-ART NPU with performance of 600 GOPS and 3 TOPS/W [13] - Microsoft will explain its AI accelerator architecture, MAIA, focusing on packaging technology and power management [13]