公众号记得加星标⭐️，第一时间看推送不会错过。 在谈到本次交易终止的原因时，芯原表示，自筹划重大资产重组事项以来，公司严格按照相关法律法 规要求，积极稳步推进并基本完成本次重大资产重组包括审计和评估在内的各项工作。在推进各项工 作过程中，标的公司管理层及交易对方提出的核心诉求及关键事项与市场环境、政策要求及公司和全 体股东利益存在偏差。近日，公司接到标的公司管理层及交易对方关于终止本次交易的通知，为切实 维护公司及全体股东利益，经充分审慎研究，公司同意终止本次重大资产重组交易。 对于这次收购终止带来的影响，芯原指出，本次终止重大资产重组事项不会对公司正常业务开展和生 产经营活动造成不利影响，亦不存在损害公司及全体股东特别是中小股东利益的情形。未来，公司将 继续强化在 RISC-V 领域的布局；作为芯来智融的股东，公司将与其保持并深化合作关系；同时，公 司将继续扩大与多家 RISC-V IP 核供应商的合作，积极推动 RISC-V 生态体系在中国的快速发展。 作为上海开放处理器产业创新中心的发起单位及中国RISC-V产业联盟（CRVIC）的首任理事长单 位，公司以推动 RISC-V 生态发展为切入点，坚持以"构 ...

Core Insights - The customized AI chip market is experiencing unprecedented growth, with Google's TPU leading the transformation by supporting the Gemini model and opening cloud services to other companies [2] - The market for customized XPU and related infrastructure is accelerating, with projections indicating that the scalable switch market could approach $6 billion by 2030, and the optical interconnect device market could exceed $10 billion [2][4] - Cloud service providers' capital expenditure expectations have surged from an 18% growth rate at the beginning of the year to over 30% [2] Company Performance - Broadcom reported a remarkable fiscal year 2025 with total revenue of $64 billion, a 24% year-over-year increase, and AI business revenue of $20 billion, up 65% [4][5] - Marvell achieved a record revenue of $2.075 billion in the third quarter of fiscal 2026, a 37% year-over-year increase, with data center business revenue of $1.52 billion, up 38% [4][6] XPU Development - Broadcom emphasizes that customers choose self-developed XPUs for hardware-level optimizations that significantly outperform software kernel tuning [8] - The company has secured substantial orders for XPUs, with a total order backlog exceeding $73 billion, nearly half of its total backlog [5][9] High-Speed Interconnect - The independent market for scalable switches is projected to approach $6 billion by 2030, with the optical interconnect device market potentially exceeding $10 billion [12] - Broadcom's AI switch order backlog has surpassed $10 billion, driven by the demand for its Tomahawk 6 switch, which supports a record 102 terabits per second [12][13] Photon Interconnect - Marvell's acquisition of Celestial AI highlights the importance of photon interconnect technology, which offers significant advantages in power efficiency and thermal stability [18][19] - Celestial AI's PF Chiplet can provide up to 16 terabits per second of bandwidth, significantly surpassing current mainstream capacities [19] CXL Technology - CXL technology is becoming crucial for overcoming memory bottlenecks, with Marvell making significant strides in this area [22][23] - Marvell's CXL solutions support both DDR4 and DDR5 memory, enhancing memory capacity and performance [23] Supply Chain Management - Both companies are addressing supply chain challenges, with Broadcom focusing on advanced packaging technology to ensure stability and security in supply chains [28][29] - Marvell is aggressively pursuing 2nm process technology to enhance power efficiency and operational cost savings for customers [30] Ecosystem Competition - The competition in the AI chip industry is evolving from single-point technology innovation to comprehensive ecosystem competition, requiring companies to offer complete solutions [31][32] - Both Broadcom and Marvell emphasize the importance of collaboration with ecosystem partners to drive innovation and market expansion [33] Future Outlook - The customized XPU market is expected to enter a rapid growth phase, with Broadcom projecting AI business revenue to exceed $30 billion in fiscal 2026 [35] - Photon interconnect technology is anticipated to reach a commercialization tipping point, with significant revenue contributions expected from Celestial AI starting in fiscal 2028 [35] - The industry is likely to see continued consolidation, with more acquisitions expected as companies seek to strengthen their technological capabilities [36]

虽然学术实验室此前也曾制造过实验性的3D芯片，但这是此类芯片首次展现出明显的性能提升，并 在商业代工厂实现量产。"这开启了芯片生产和创新的新时代，"斯坦福大学电气工程系威廉·E·艾尔 讲席教授兼计算机科学教授苏巴希什·米特拉（Subhasish Mitra）说道。他是描述该芯片的一篇新论 文的主要研究者，该论文在12月6日至10日于旧金山举行的第71届IEEE国际电子器件年会（IEDM 2025）上发表。"正是像这样的突破，才能让我们实现未来人工智能系统所需的1000倍硬件性能提 升。" 平面芯片面临的挑战 像 ChatGPT 和 Claude 这样的现代人工智能模型必须在存储信息的内存和处理信息的计算单元之间 来回传输海量数据。 在传统的二维芯片上，各个组件排列在一个扁平的表面上，内存有限且分布分散，因此数据必须沿着 几条漫长而拥挤的路径传输。由于计算单元的运行速度远超数据传输速度，而且芯片无法在附近存储 足够的内存，系统最终会不断地等待信息。工程师们将这种瓶颈称为"内存墙"，即处理速度超过芯片 数据传输能力的临界点。 公众号记得加星标⭐️，第一时间看推送不会错过。 一个协作团队在美国晶圆代工厂制造出了第一 ...

Core Insights - A research team from MIT, the University of Waterloo, and Samsung Electronics has developed a new method to increase transistor density on chips by stacking additional layers of transistors on existing circuits, which could significantly enhance chip performance and energy efficiency [2][4][5]. Group 1: New Manufacturing Method - The new method involves adding a layer of micro-switches on top of completed chips, similar to traditional chip stacking techniques, to increase the number of transistors integrated into a single chip [2]. - The research team utilized a 2-nanometer thick layer of amorphous indium oxide to construct additional transistors without damaging the sensitive front-end components during the manufacturing process [3][6]. Group 2: Energy Efficiency and Performance - This innovative approach allows for the integration of logic devices and memory components into a compact structure, reducing energy waste and improving computational speed [4][5]. - The new transistors exhibit a switching speed of just 10 nanoseconds, with significantly lower voltage requirements compared to existing devices, leading to reduced power consumption [6]. Group 3: Future Implications - The research indicates that if future processors can utilize both this new technology and traditional chip stacking methods, the limits of transistor density could be greatly surpassed, countering the notion that Moore's Law is reaching its end [3][4]. - The team aims to further integrate these backend transistors into single circuits and enhance their performance, exploring the physical properties of ferroelectric hafnium zirconium oxide for potential new applications [7].

该 公 司 在 芯 片 设 计 方 面 的 做 法 与 超 大 规 模 竞 争 对 手 微 软 、 亚 马 逊 网 络 服 务 和 谷 歌 不 同 ， 它 持 有 Ampere 的少数股权，Ampere 除了为 Oracle 生产处理器外，还为其他公司生产 Arm 兼容的 CPU， 而不是像其他公司那样雇佣自己的团队专门开发供内部使用的处理器。 但甲骨文出售其安培架构股份的做法，与竞争对手超大规模数据中心运营商的做法形成了鲜明对比。 这些运营商一直在开发自己的芯片，以满足人工智能的高需求并降低计算成本。 虽然 Oracle 是Ampere CPU 的大买家，但这家芯片设计公司在过去几年里一直试图通过渠道合作伙 伴来建立销售产品的业务。 安培首席产品官杰夫·维蒂奇 (Jeff Wittich) 在5 月份接受 CRN 采访时表示，公司希望"非常快速 地"发展其渠道业务，但也承认当时渠道业务在销售额中所占比例并不大。 公众号记得加星标⭐️，第一时间看推送不会错过。 甲骨文公司董事长拉里·埃里森周三表示，该公司出售了其在芯片设计公司 Ampere Computing 的股 份，"因为我们不再认为继续在我们的云数据中 ...

Core Insights - The article highlights the growth of storage revenue in Q3 2025, primarily driven by sales of mid-range all-flash arrays, with Pure Storage showing the fastest revenue growth among the top five vendors [2]. Market Overview - The global External OEM Enterprise Storage Systems (ESS) market grew by only 2.1% year-over-year, reaching approximately $8 billion, with the top five vendors holding a combined market share of 56.5% [2]. - Dell leads the market with a 22.7% share, generating $1.812 billion in revenue, but experienced a 49% decline year-over-year [2]. - Huawei ranks second with a 12% market share and $953 million in revenue, marking a 9.5% increase, outperforming the market average [2]. - NetApp, in third place, reported a revenue of $750.16 million, growing by 2.8% due to its all-flash array sales [2]. - Pure Storage achieved a revenue of $539.22 million, reflecting a significant growth of 15.5% year-over-year [2]. - HPE saw a revenue decline of 7.5%, totaling $450.23 million [2]. Product Segment Performance - The overall storage market growth rate from Q3 2024 to Q3 2025 was 2.1% [2]. - All-flash arrays experienced a robust growth rate of 17.6%, while hybrid flash disk arrays and disk drive arrays saw declines of 9.8% and 6.3%, respectively [3][4]. Geographic Performance - The U.S. market faced a decline attributed to weak OEM performance, with a notable drop of 9.9% [7]. - Other regions showed varying growth rates, with Japan at 14.4%, Canada at 12.6%, and Europe, the Middle East, and Africa at 10.5% [7]. Future Outlook - IDC anticipates that the demand for specialized and efficient enterprise storage systems will increase due to the penetration of AI applications in enterprise data centers [5]. - The need for flash storage is expected to grow continuously to support AI-related projects, including training and inference [5].

来源：内容转自小米技术，谢谢。 近日， 第71届国际电子器件大会 IEDM 2025 （International Electron Devices Meeting，简称 IEDM）在美国旧 金山召开。 IEDM 是 全球半导体与电子器件领域最具权威和影响力的顶级会议之一， 以其严苛的评审标准与前瞻性的技 术视野，被誉为"电子器件突破性技术的风向标"和"器件的奥林匹克盛会"，在国际半导体技术界享有很高的学 术地位和广泛的影响力。 会议始于1955年，距今已有七十余年历史，是报告半导体和电子器件技术、设计、制造、物理和建模等领域的 关键技术突破的世界顶级论坛，同时它也是国际著名高校、研发机构和 Intel、 TSMC、三星、 IBM 等发布先 进技术和最新进展的重要窗口和平台。 每一年的 IEDM 盛会，都是全球半导体行业关注的焦点。 本次会议以100 YEARS of FETs: SHAPING the FUTURE of DEVICE INNOVATIONS 为主题，于2025年12月6日至10日召开。 论文简介 入选论文题目：《First Integration of GaN Low-Voltage PA ...

公众号记得加星标⭐️，第一时间看推送不会错过。 即使数据中心中的GPU运行大型语言模型理论上只需要700瓦，但由于电力输送效率低下，实际可能 需要1700瓦。彭邹和他的团队在初创公司PowerLattice表示，他们通过小型化和重新封装高压稳压器 解决了这个问题。 该公司声称，其新型芯片通过缩小电压转换过程并将其显著移近处理器，可降低高达 50% 的功耗， 并使每瓦性能提高一倍。 电力输送的萎缩与转移 邹教授表示，最终制成的微型芯片面积不到目前电压调节器的二十分之一，厚度仅为100微米，大约 相当于一根头发丝的粗细。如此小的尺寸使得微型芯片可以尽可能靠近处理器安装，节省下来的空间 可以为其他组件提供宝贵的安装空间。 邹先生表示，即使尺寸很小，这项专有技术也"高度可配置且可扩展"。客户可以使用多个芯片组来实 现更全面的解决方案，或者如果他们的架构不需要，也可以使用更少的芯片组。邹先生认为，这是 PowerLattice电压调节解决方案的"关键优势之一"。 该公司声称，采用芯片组技术可以为运营商降低 50% 的电力需求，从而有效提升性能。但 Le 认为 这个数字过于乐观。他表示，50% 的节能"或许可以实现，但这 ...

Core Viewpoint - The article discusses the differences between chiplets and soft IP, emphasizing that while both can accelerate time-to-market, they serve different needs and come with distinct challenges in design, integration, and testing [2][20]. Group 1: Chiplet vs Soft IP - Chiplets can be seen as a new type of semiconductor IP, but they differ significantly from the current IP licensing ecosystem, particularly in design integration and verification [2][20]. - Chiplets can be either custom-designed or off-the-shelf, with two camps emerging: one that designs its own chiplets and another that sources components externally [2][20]. - The market for chiplets will coexist with custom chips, with many IP modules becoming off-the-shelf chips that system vendors can mix and match [2][20]. Group 2: Customization and Functionality - The key difference between chiplets and soft IP lies in their customizability; soft IP offers high configurability, while chiplets have fixed functionalities [6][20]. - Chiplets require careful management of startup processes and debugging, which are less of a concern with soft IP [6][20]. - The physical integration of chiplets presents unique challenges, such as managing signal integrity and power distribution, which are not as critical in soft IP [24][20]. Group 3: Testing and Supply Chain - Testing chiplets is more complex than testing soft IP, as chiplets are typically tested independently by suppliers, requiring integration into the overall system testing process [20][20]. - The supply chain for chiplets is more traditional and complex, closely tied to manufacturing nodes and foundries, which increases dependency on suppliers [20][20]. - Built-in self-test (BiST) technology is expected to become more prevalent to address the transparency issues associated with chiplets [22][20]. Group 4: Security and Integration Challenges - Security considerations for chiplets are more challenging than for soft IP, as chiplets have a larger attack surface due to their interconnections and shared resources [20][20]. - Each chip in a multi-chip system must coordinate its security measures, which can lead to inefficiencies if not managed properly [20][20]. - The physical design of chiplets must account for thermal management and signal integrity, requiring advanced modeling tools that go beyond those used for soft IP [24][20].

公众号记得加星标⭐️，第一时间看推送不会错过。 Omdia 最新研究 显示，2025 年第三季度半导体市场表现创历史新高，行业营收达到 2163 亿美元， 环比增长 14.5%。这是全球半导体市场首次单季度营收突破 2000 亿美元大关，此前第二季度也实现 了强劲增长，环比增长 8%。照此速度，到 2025 年，半导体行业总营收有望超过 8000 亿美元。 人工智能和存储产品的需求依然强劲，这两个细分市场均持续跑赢大盘。尽管人工智能一直是近期行 业讨论的焦点，但Omdia指出，2025年第三季度推动增长的细分市场数量较前几个季度有所增加。 从历史数据来看，第三季度的平均增长率略高于7%，而此前市场对2025年第三季度的预期也约为环 比 增 长 5% ， 这 符 合 典 型 的 季 节 性 规 律 。 然 而 ， 第 三 季 度 的 实 际 表 现 却 远 超 预 期 ， 环 比 增 长 超 过 14%，几乎所有半导体品类都超过了上一季度的预期。 营收强劲，各行业均有所贡献 半导体行业蓬勃发展，有望在2025年突破8000亿美元大关，各细分市场的增长也更加均衡。人工智 能和存储器领域引领增长，有望在第四季度创下 ...