公众号记得加星标⭐️，第一时间看推送不会错过。 来源：内容 编译自 pcwatch 。 很难说手机何时首次拥有除通话以外的功能，但就游戏而言，最早出现手机游戏的可能是1998年的诺基亚6110（照片 1），当时附带了贪吃蛇游戏（照片2）。 它搭载的是TI MAD2芯片组"5L43H04"，该芯片组搭载了运行频率为13MHz的"ARM7TDMI"内核。据称，ARM7TDMI 的性能为0.7 DMIPS/MHz，因此在13MHz下运行时，其性能约为9.1 DMIPS。顺便提一下，Arduino Uno R3的性能据称 为9.85 DMIPS，因此，如果您认为它们的性能相似，就很容易理解了。 不过当时还没有应用处理器的概念，5L43H04的主要处理是通信控制，Snake只是附加功能，所以实际上当时比较处理器 性能并没有多大意义。 此后，搭载应用处理器的功能手机开始出现。然而，这一代手机的处理器各不相同（松下使用了基于Uniphier的自有处理 器），因此很难找到公平的比较方法。此外，由于本次讨论的主题是"iPhone之后的智能手机处理器"，我不会讨论iPhone 之前的机型。 此外，由于 Android 制造商众多 ...

公众号记得加星标⭐️，第一时间看推送不会错过。 来源：内容 编译自彭博社 。 德州仪器公司（Texas Instruments Inc.）是汽车和工厂设备制造商的重要芯片制造商，该公司股价在尾盘交易中暴跌，此 前市场担忧关税推动的需求激增将难以持续。 尽管该公司发布的第三季度业绩预测超出了大多数预期，但其前景比一些投资者的预期更为谨慎。在电话会议期间，该公 司股价进一步下跌，当时高管们难以说服分析师，分析师们表示，公司的基调变得越来越消极。 主要担忧在于，关税和贸易争端是否会损害尚处于初期阶段的销售复苏。尽管上季度营收增长了16%，但高管们承认，他 们并不清楚其中有多少来自与关税相关的"拉拢"——客户为了避开关税而购买产品。 "我们有10万名客户，"首席财务官拉斐尔·利扎尔迪（Rafael Lizardi）在接受采访时表示。"我们真的不知道。" 报道发布后，该公司股价在尾盘交易中下跌逾11%。今年以来，该公司股价受益于半导体相关股票的普遍上涨，截至收盘 已上涨15%。 该公司表示，第三季度营收将在44.5亿美元至48亿美元之间。尽管分析师平均预期为45.7亿美元，但部分预测达到了48亿 美元。第三季度每股利润 ...

Core Viewpoint - The article discusses the emergence of Bolt Graphics, a startup aiming to redefine the GPU landscape with its new GPU called Zeus, which focuses on path tracing technology to challenge established giants like NVIDIA, AMD, and Intel [1][19]. Group 1: Path Tracing as a Breakthrough - Path tracing represents a significant advancement in rendering technology, providing a more accurate representation of light behavior compared to traditional real-time ray tracing [2]. - The computational demands of path tracing are substantially higher, requiring ten to a hundred times the power of standard GPUs for real-time applications [2]. Group 2: Bolt Graphics and Zeus GPU - Bolt Graphics was founded by engineers from major companies like NVIDIA, AMD, and Intel, with a mission to create a high-performance path tracing GPU [7]. - The Zeus GPU comes in three versions: Zeus 1c, Zeus 2c, and Zeus 4c, with varying power and performance specifications, including a path tracing performance of approximately 7.7 billion rays per second for the 1c version [7][8]. - The Zeus 4c version is designed for data centers, featuring a TDP of 500W and up to 2TB of DDR5 memory, aimed at high-performance computing (HPC) and rendering farms [8][10]. Group 3: Advantages of Zeus - Zeus GPUs utilize a unique memory architecture combining LPDDR5X for bandwidth and DDR5 for capacity, allowing for a total memory of up to 2.25TB, which is beneficial for both path tracing and HPC datasets [10]. - In terms of performance, Bolt claims that their GPUs can outperform NVIDIA's RTX 5090 by a factor of 10 in certain scenarios, significantly reducing the number of GPUs needed for complex rendering tasks [10][11]. Group 4: Ecosystem Development - Bolt is building an open and customizable ecosystem based on RISC-V architecture, which allows for greater flexibility and community engagement compared to traditional closed architectures [14]. - The company is developing a proprietary path tracing engine called Glow Stick, which aims to integrate with popular rendering tools and provide high-precision sampling and physical Monte Carlo integration [15][16]. Group 5: Challenges and Future Outlook - Despite its potential, Bolt faces significant challenges, including the timeline for mass production, which is projected for late 2026, and the need to establish a robust software ecosystem to support its hardware [17][18]. - The success of Bolt's Zeus GPU could redefine the graphics rendering landscape, particularly in gaming and HPC applications, if it can deliver on its promises of unprecedented visual fidelity and performance [19].

Core Insights - The rapid energy consumption of AI data centers is approximately four times the rate of new power generation, necessitating a fundamental shift in power generation locations, data center construction sites, and more efficient systems, chips, and software architectures [2][4] - In the U.S., data centers consumed about 176 TWh of electricity last year, projected to rise to between 325 and 580 TWh by 2028, representing 6.7% to 12% of total U.S. electricity generation [2][4] - China's energy consumption for data centers is expected to reach 400 TWh next year, with AI driving a 30% annual increase in global energy consumption, where the U.S. and China account for about 80% of this growth [4][22] Energy Consumption and Infrastructure - The U.S. Department of Energy's report highlights the significant increase in energy consumption by data centers, emphasizing the need for a complete overhaul of the power grid to accommodate this growth [2][5] - The average energy loss during power transmission is about 5%, with high-voltage lines losing approximately 2% and low-voltage lines losing about 4% [5][9] - Key areas for improvement include reducing transmission distances, limiting data movement, enhancing processing efficiency, and improving cooling methods near processing components [7][9] Data Processing and System Design - The challenge of data processing proximity is crucial, as reducing the distance data must travel can significantly lower energy consumption [11][12] - Current AI designs prioritize performance over power consumption, but this may need to shift as power supply issues become more pressing [12][13] - Optimizing the collaboration between processors and power regulators can lead to energy savings by reducing the number of intermediate voltage levels [9][13] Cooling Solutions - Cooling costs for data centers can account for 30% to 40% of total power expenses, with liquid cooling potentially halving this cost [17][18] - Direct chip cooling and immersion cooling are two emerging methods to manage heat more effectively, though both present unique challenges [18][19] - The efficiency of cooling technologies is critical, especially as AI workloads increase the dynamic current density in servers [17][19] Financial and Resource Considerations - The semiconductor industry faces pressure to address sustainability and cost issues to maintain growth rates, particularly in AI data centers [21][22] - The total cost of ownership, including cooling and operational costs, will be a determining factor in the deployment of AI data centers [22][23] - The projected increase in AI data center power demand by 350 TWh by 2028-2030 highlights the urgent need for innovative solutions to bridge the gap between energy supply and demand [22][23]

Core Viewpoint - The article focuses on the latest advancements in semiconductor technology presented at the VLSI conference, highlighting innovations in chip manufacturing, including digital twins, advanced logic transistors, and future interconnects, as well as comparisons between Intel's 18A process and TSMC's technologies [1]. Group 1: FlipFET Design - Despite various restrictions, China continues to advance in semiconductor R&D, with Peking University's FlipFET design gaining significant attention for its novel patterning scheme that achieves PPA similar to CFET without the challenges of monolithic or sequential integration [2]. - The FlipFET technology involves a process where NMOS is formed on the front side and PMOS on the back side of the wafer, showcasing good performance for both types of transistors [8][10]. - The main drawback of FlipFET is its cost, as it requires multiple back-end processes and is more susceptible to wafer warping and alignment errors, potentially affecting yield [12]. Group 2: DRAM Developments - DRAM is at a pivotal point in its five-year roadmap with two key advancements: 4F2 and 3D technologies, with 4F2 expected to increase density by 30% compared to 6F2 without reducing minimum feature size [16][23]. - The 4F2 architecture necessitates vertical channel transistors to fit within the unit size, presenting manufacturing challenges due to high aspect ratios [24][31]. - 3D DRAM is being developed concurrently, with Chinese manufacturers showing strong motivation to innovate in this area due to its independence from advanced lithography technologies [36]. Group 3: Digital Twin Technology - Digital twin technology is becoming essential in semiconductor design and manufacturing, allowing for design exploration and optimization in a virtual environment before physical production [79]. - This technology spans atomic-level simulations to wafer-level optimizations, enhancing productivity and yield in semiconductor fabrication [80][87]. - The implementation of "unmanned" fabs is a future goal, aiming for automated maintenance and operation without human intervention, which poses challenges in standardizing processes across different equipment vendors [92]. Group 4: Intel's 18A Process - Intel's 18A process, set to enter mass production in late 2025, combines Gate-All-Around transistors with a PowerVia back power network, significantly reducing interconnect spacing and improving yield [74][78]. - The 18A process claims a 30% reduction in SRAM size compared to Intel's 3rd generation baseline, with performance improvements of approximately 15% at the same power consumption [76]. - The process also features a reduction in the number of front metal layers and an increase in back metal layers to support the new architecture, indicating a shift towards more efficient manufacturing [77].

公众号记得加星标⭐️，第一时间看推送不会错过。 来源：内容 编译自彭博社 。 恩智浦半导体公司公布的业绩预测可能不如一些投资者所期望的那么乐观，导致该公司股价在盘后交易时段下跌。 该公司公布第二季度业绩，扣除股票薪酬等特定成本前的每股收益为2.72美元，营收为29.3亿美元，较去年同期下降6%。 分析师此前预期每股收益仅为2.67美元，销售额略低于去年同期的29亿美元，业绩表现相当不错。 该芯片制造商还报告称，截至 6 月 29 日的季度，经营现金流为 7.79 亿美元，自由现金流为 6.96 亿美元。调整后的毛利 率为 56.5%，略低于一年前的 58.6%。 由于利润率较低，因此恩智浦半导体的净利润为 4.45 亿美元，与去年同期的 4.9 亿美元收入相比略有下降，这并不令人 意外。 恩智浦即将卸任的首席执行官库尔特·西弗斯（Kurt Sievers）（如图）三个月前曾透露计划于10月底退休，他对今天的业 绩表现乐观，称公司实现了稳健的盈利能力和收益。"我们通过强化竞争性产品组合，并根据混合制造战略调整晶圆制造 布局，实现了这一目标，"他解释道。 恩智浦生产的计算机芯片用于汽车、制造、物联网和电信等行业的 ...

公众号记得加星标⭐️，第一时间看推送不会错过。 来源：内容 编译自彭博社 。 上周，台湾半导体制造股份有限公司的市值在台北首次突破 1 万亿美元，受强劲的人工智能需求推动，其销售预期上调。 这家苹果公司 (Apple Inc.) 和英伟达公司 (Nvidia Corp.) 的主要芯片供应商的台湾股市周五攀升至历史新高，较4月份的 低点上涨了近50%。这使得该公司成为自2007年中石油 (PetroChina Co.) 短暂突破1万亿美元大关以来，首只市值超过1 万亿美元的亚洲股票。 台积电股价飙升反映出投资者日益增长的信心，他们相信这家全球顶级芯片制造商将乘着人工智能热潮，进一步巩固其主 导地位。该公司上周将全年营收增长预期上调至约30%，这表明台积电可能在日益激烈的人工智能产能竞争中受益。 高盛集团分析师布鲁斯·卢（Bruce Lu）在台积电季度财报发布后写道："我们认为，台积电对先进节点需求的态度更加积 极，因为人工智能客户的需求没有放缓的迹象。我们预计2026年价格将出现更大幅度的上涨。" 截至周五收盘，台积电的美国存托凭证（ADR）价值约为1.2万亿美元。对于外国投资者来说，持有ADR股票更加便捷， ...

Core Viewpoint - The semiconductor industry is experiencing a significant shift towards chiplet architecture, which allows for the integration of multiple smaller chips into a single package, addressing the challenges of high costs and scalability associated with traditional single-chip designs [2][4][8]. Group 1: Chiplet Technology Overview - Chiplets are designed to be combined into a single package, enabling the creation of larger and more complex systems than traditional single-chip designs [4][8]. - The architecture allows for the separation of I/O and logic functions, optimizing performance and cost by utilizing different manufacturing nodes for various components [4][5]. - Examples include Nvidia's Blackwell B200 GPU, which employs a dual-chiplet design to exceed the limitations of single-chip designs [5]. Group 2: Advantages of Chiplet Architecture - Chiplet architecture can achieve higher yields and lower overall manufacturing costs by utilizing smaller chips [14]. - It allows for the integration of diverse processing elements, such as CPUs, GPUs, and memory controllers, enhancing design flexibility and performance [14]. - The modular nature of chiplet designs supports platform-based design and design reuse, making it easier to adapt to different applications [14]. Group 3: Challenges and Ecosystem Development - The chiplet ecosystem is still developing, with challenges in establishing universal standards for inter-chip communication, such as UCIe and CXL [10][11]. - Effective D2D communication must achieve low latency and high bandwidth across various physical interfaces, complicating system integration [10]. - The long-term vision for a complete chiplet ecosystem involves the seamless integration of pre-validated chiplets from trusted suppliers, which is still years away from realization [11][12]. Group 4: Current Industry Landscape - Major companies like AMD, Intel, and Nvidia are leading the development of multi-chip systems, while smaller firms are forming micro-ecosystems to leverage existing standards [13]. - Collaboration among EDA and IP vendors is crucial for developing standards and tools necessary for chiplet integration [13]. - Despite the hype surrounding chiplet technology, a fully functional chiplet ecosystem may take five to ten years to establish, although companies are already beginning to implement chiplet-based designs [13].

公众号记得加星标⭐️，第一时间看推送不会错过。 7月16日，第五届RISC-V中国峰会在上海张江科学会堂成功举办。奕行智能联合创始人、COO 杨宜博士在峰会发表了题为《RISC-V与虚拟指令技术结合打造创新的计算架构》的主题演讲。 杨宜博士开篇直言："AI的发展改变了软件编程的范式。"随后，他引述OpenAI创始成员Andrej Karpathy 此前在一场演讲中的观点"Software 3.0（软件3.0）时代已经到来"。 杨宜介绍到，Software 1.0 时代是由人类用编程语言编写机器能懂的代码的时代，这是过去 70 年软 件开发的主流形态；Software 2.0 则是以神经网络为核心，我们通过设计神经网络结构、准备数据 集、训练参数来构建能解决问题的程序。至于软件3.0，则是在大语言模型的崛起的大背景下，软件 开发范式的根本性变革。 "软件3.0中，自然语言提示Prompts正在取代传统编程代码，LLM成为新的编程接口。这标志着软件 构建、交互和构思方式的根本性转变。"杨宜总结说，"这也倒逼着硬件3.0阶段的加速到来。" 新时代需要新芯片 正如杨宜所说，软件1.0时，众所周知，CPU是占主导地位的 ...

来源：内容 编译自 tomshardware 。 公众号记得加星标⭐️，第一时间看推送不会错过。 OpenAI 首席执行官 Sam Altman并不以目光短浅而闻名，但他最近的言论甚至突破了他一贯的大胆技术言论的界限。在 X 上的一篇新文章中，Altman 透露，OpenAI 有望在今年年底前"上线超过 100 万个 GPU"。仅此一个数字就已经很惊人 了。 想想埃隆马斯克的 xAI，它在今年早些时候凭借其 Grok 4 模型引起轰动，运行在大约 200,000 个 Nvidia H100 GPU 上。OpenAI 的计算能力是这个的五倍，但对于 Altman 来说这还不够。"为团队感到非常自豪......"他写道，"但现在他们 最好开始研究如何将其提高 100 倍，哈哈。" "哈哈"可能听起来像是在开玩笑，但 Altman 的过往经历表明并非如此。早在 2 月份，他就承认 OpenAI 不得不放慢 GPT-4.5 的推出速度，因为他们实际上" GPU 用完了"。这可不是小问题；考虑到Nvidia 的顶级 AI 硬件到明年的订单也 已售罄，这可谓一记警钟。 此后，Altman 将计算扩展作为首要任务，寻求合作 ...