Core Viewpoint - Heshun Petroleum (603353) is actively pursuing the acquisition of Shanghai Kuixin Integrated Circuit Design Co., with ongoing due diligence and a focus on the Chiplet sector, which is expected to see significant growth in the coming years [1][2][3] Group 1: Company Performance - As of January 9, 2026, Heshun Petroleum's stock closed at 27.81 yuan, up 1.76% from the previous week [1] - The company's total market capitalization is 4.781 billion yuan, ranking 18th out of 30 in the refining and trading sector and 3594th out of 5182 in the A-share market [1] Group 2: Acquisition and Strategic Focus - The acquisition of Kuixin Technology is progressing, with a focus on high-speed interconnect IP and Chiplet solutions, which are critical for high-performance computing [1][2] - Kuixin Technology's Chiplet clients include leading domestic AI chip companies, with products aimed at large model training and scientific computing, expected to achieve mass production in the second half of next year [1][3] Group 3: Future Growth and Market Demand - Kuixin Technology is experiencing a positive growth trend in 2025, with increasing order volumes and stable expansion of core IP and Chiplet solutions [2][3] - The company's future growth will be driven by three main business lines: steady growth in IP business, expansion of AI SIC mass production services, and potential growth from Chiplet and IO Die technologies [2][3]

Core Insights - The report from Jinyuan Securities highlights the exponential growth in costs associated with advanced processes in the semiconductor industry, particularly noting that the design cost of a 2nm chip is approximately $725 million, which is 25 times that of a 65nm chip [1][2] - Capital expenditures (CapEx) for building semiconductor manufacturing facilities also reflect this trend, with the investment required for a 5nm chip factory being five times that of a 20nm factory [1][2] Advanced Packaging Trends - The shift towards advanced packaging is driven by the combination of chiplets and high-end advanced packaging, which allows for mixed processes, reduced time to market, reusability, and improved yield [2] - Chiplets can utilize different processes based on demand, such as using 3nm technology for CPUs while employing mature processes for I/O or analog circuits, thus shortening R&D cycles and design costs [2] - The performance per watt per dollar (Perf/Watt/Dollar) indicates that large chips combined with 3D stacking are more suitable for medium and small systems, while complex systems benefit from the "small die with better yield" approach [2] AI Chip Performance - In terms of raw computational performance, AI-specific chips (ASICs) are weaker than AI GPUs, and even large language models like GPT-4 cannot run on a single chip [3] - To match the performance of AI GPUs, ASICs require larger clusters of dedicated chips, and advanced packaging through chiplets and heterogeneous integration is key to maximizing performance while controlling costs [3] Technological Evolution in Advanced Packaging - The core of technological evolution in advanced packaging is the continuous increase in interconnect I/O count and bandwidth density, transitioning from high-density electronic interconnects to incorporating optical interconnects [4] - The second generation of packaging aims to support higher interconnect I/O demands in the AI era, addressing bandwidth and power consumption bottlenecks [4] 2.5D Packaging Technology - Silicon bridge packaging technology serves as a 2.5D solution, integrating one or more silicon bridges within a specific packaging substrate to ensure interconnectivity between multiple chips [5] - The main factors limiting 2.5D interconnect density include solder bridging risks, intermetallic compounds, and underfill process challenges [5] - Direct bonding and hybrid bonding techniques are crucial for enhancing interconnect density by eliminating solder layers and achieving closer interconnect spacing [5] Advanced Packaging Market Outlook - The advanced packaging market in China is projected to reach approximately 96.7 billion yuan in 2024, accounting for 30.95% of the global market, with expectations to grow to 188.8 billion yuan by 2029, reflecting a compound annual growth rate (CAGR) of 14.30% [7] - By 2029, China's advanced packaging and testing market is anticipated to represent 36% of the global market size [7] - The unit packaging cost is higher due to the complexity of processes and the use of silicon interposers and embedded silicon bridge technology [7] Related Companies - Equipment manufacturers include Tuojing Technology (688072.SH), Zhongwei Company (688012.SH), Shengmei Shanghai (688082.SH), Guangli Technology (300480.SZ), Beifang Huachuang (002371.SZ), and Zhongke Feimiao (688361.SH) [7] - Material suppliers include Dinglong Co., Ltd. (300054.SZ), Anji Technology (688019.SH), and Feikai Materials (300398.SZ) [7] - OSAT companies include Shenghe Jingwei (unlisted), Changdian Technology (600584.SH), and Shenzhen Technology (000021.SZ) [7]

Core Viewpoint - The article discusses the differences between chiplets and soft IP, emphasizing that while both can accelerate time-to-market, they serve different needs and come with distinct challenges in design, integration, and testing [2][20]. Group 1: Chiplet vs Soft IP - Chiplets can be seen as a new type of semiconductor IP, but they differ significantly from the current IP licensing ecosystem, particularly in design integration and verification [2][20]. - Chiplets can be either custom-designed or off-the-shelf, with two camps emerging: one that designs its own chiplets and another that sources components externally [2][20]. - The market for chiplets will coexist with custom chips, with many IP modules becoming off-the-shelf chips that system vendors can mix and match [2][20]. Group 2: Customization and Functionality - The key difference between chiplets and soft IP lies in their customizability; soft IP offers high configurability, while chiplets have fixed functionalities [6][20]. - Chiplets require careful management of startup processes and debugging, which are less of a concern with soft IP [6][20]. - The physical integration of chiplets presents unique challenges, such as managing signal integrity and power distribution, which are not as critical in soft IP [24][20]. Group 3: Testing and Supply Chain - Testing chiplets is more complex than testing soft IP, as chiplets are typically tested independently by suppliers, requiring integration into the overall system testing process [20][20]. - The supply chain for chiplets is more traditional and complex, closely tied to manufacturing nodes and foundries, which increases dependency on suppliers [20][20]. - Built-in self-test (BiST) technology is expected to become more prevalent to address the transparency issues associated with chiplets [22][20]. Group 4: Security and Integration Challenges - Security considerations for chiplets are more challenging than for soft IP, as chiplets have a larger attack surface due to their interconnections and shared resources [20][20]. - Each chip in a multi-chip system must coordinate its security measures, which can lead to inefficiencies if not managed properly [20][20]. - The physical design of chiplets must account for thermal management and signal integrity, requiring advanced modeling tools that go beyond those used for soft IP [24][20].

Core Insights - The global semiconductor market is approaching the $1 trillion mark, driven by explosive demand for AI computing power and accelerated domestic supply chain autonomy, indicating a new growth cycle for the semiconductor industry [1] Group 1: Market Growth and Trends - The global semiconductor market is projected to grow over 25% year-on-year by 2026, reaching $975 billion, marking a strong recovery from previous inventory reductions [1] - AI is identified as the core engine of the current semiconductor cycle, with Huawei predicting a 100,000-fold increase in total computing power by 2035, leading to massive demand for chips and high-end storage [1] Group 2: Storage Industry Dynamics - The AI revolution is fundamentally altering the traditional cycle logic of the storage industry, with exponential growth in data throughput due to advancements in large models and complex reasoning [2] - There is a significant supply-demand gap in the conventional storage market as major manufacturers like Samsung and SK Hynix prioritize capacity for high-bandwidth memory (HBM), with DRAM prices expected to rise by 13-18% by Q4 2025 [2] - The global HBM market is forecasted to have a compound annual growth rate of 33% from 2024 to 2030 [2] Group 3: Domestic Semiconductor Development - China's semiconductor industry is advancing towards core areas of autonomy, particularly in semiconductor equipment and storage chips, with significant breakthroughs in funding and technology [2] - The year 2025 is anticipated to be critical for the growth of domestic equipment orders and performance realization, particularly for leading companies in etching and thin-film deposition [3] Group 4: Investment Opportunities - Investment opportunities in the semiconductor sector can be categorized into two main lines: AI-driven innovation and deepening domestic processes [3] - Key companies benefiting from AI demand include domestic design firms like Cambricon and Haiguang Information, as well as storage companies such as GigaDevice and Jiangbo Long [3][4] - In the semiconductor equipment sector, companies like North Huachuang and Zhongwei Company are highlighted for their breakthroughs in critical processes [3][4] - A comprehensive focus on the entire semiconductor supply chain is recommended, with key players including SMIC and Hua Hong Semiconductor [3][4]

Core Insights - AI is identified as a new driving force for the future of the semiconductor industry, transitioning from traditional computing to AI applications, which are still in the foundational stage but will diversify significantly in the coming years [2][3] - The shift towards AI applications will challenge traditional chip design economies of scale, necessitating new approaches such as Chiplet architecture to manage development costs and enhance market flexibility [3] - Advanced packaging technologies are becoming critical for performance enhancement, with a focus on system design as a key area for future development in the semiconductor sector [3] Group 1 - AI is redefining the meaning of Moore's Law, moving from centralized data centers to edge computing and AIoT applications, which will include smart cars, robots, smart homes, and smart cities [2] - The cost of designing advanced chips, such as TSMC's products below 5nm, can reach approximately $2 billion, making it unfeasible for companies to invest heavily without guaranteed sales [3] - The Chiplet concept allows for modular design, enabling the reuse of high-performance modules across various products, thus distributing development costs and increasing market adaptability [3] Group 2 - The semiconductor industry is approaching physical limits of Moore's Law, with the pace of process miniaturization slowing down, which may challenge Taiwan's leading position in wafer foundry and packaging [3] - Advanced packaging technologies like CoWoS and InFO are becoming essential for improving chip integration efficiency, shifting the focus from merely cost control to performance enhancement [3] - System design is emphasized as a crucial area for future focus, as it will ultimately dictate the direction of industry development [3]

Core Viewpoint - The article discusses the upcoming Heterogeneous Integration Annual Conference organized by TrendBank and the Yongjiang Laboratory, focusing on the strategic opportunities in the new generation of chip development, particularly in heterogeneous integration technology [10][11]. Conference Overview - The conference will take place from November 17-19, 2025, at the Nanyuan Wanghai Hotel in Zhenhai District, Ningbo, with an expected attendance of 300-500 participants [11]. - The theme of the conference is "Focusing on the Frontier of Heterogeneous Integration Technology, Advancing the Journey of Advanced Packaging" [10][11]. Key Topics and Sessions - The conference will cover various advanced packaging technologies, including 2.5D/3D heterogeneous integration, optoelectronic co-packaging, wafer-level bonding, and glass-based packaging [11]. - Notable sessions will include discussions on the challenges and opportunities in heterogeneous integration technology, advanced packaging trends, and the impact of AI on semiconductor manufacturing [4][6][9]. Strategic Importance - Ningbo is highlighted as a core port city with a strong foundation in advanced manufacturing, making it an ideal location for this conference aimed at enhancing the electronic information industry in the Yangtze River Delta region [9][10]. - The Yongjiang Laboratory is recognized as a provincial-level laboratory approved by the Zhejiang provincial government, focusing on electronic information materials and micro-nano device preparation [9][11]. Participation and Registration - The conference offers various ticket options, including early bird discounts for registrations completed by October 31, 2025 [13]. - Participants will have access to conference materials, lunch, and a banquet on November 18 [13].

Core Insights - The conference focuses on the latest trends and innovations in the semiconductor industry, particularly in AI, EDA, and advanced packaging technologies [1][2][3]. Group 1: Opening Ceremony and Keynote Speeches - The opening ceremony featured leaders from various semiconductor organizations, emphasizing the importance of innovation in driving industry upgrades [1]. - Keynote speeches included topics such as the role of AI in semiconductor design and the development of resilient semiconductor value chains [1][2]. Group 2: Semiconductor Development Trends - Discussions highlighted the acceleration of AI-driven Chiplet ecosystems and the importance of EDA tools in the AI era [2][3]. - Presentations covered advancements in AI ASIC platforms and the integration of reconfigurable chips into computing nodes [2][3]. Group 3: Advanced Packaging and Testing - The conference addressed the evolution of advanced packaging technologies, including 2.5D/3D EDA as a bridge for design and process innovation [4][5]. - Topics included the challenges and opportunities in testing advanced packaging solutions and the impact of AI on testing methodologies [4][5]. Group 4: EDA and IC Design Services - The agenda included discussions on the integration of AI in EDA tools, enhancing chip design productivity and efficiency [36][37]. - Presentations focused on the development of domestic EDA platforms and their role in the post-Moore era of three-dimensional multi-chip system design [36][37]. Group 5: Industry Collaboration and Future Directions - The conference emphasized the need for collaboration among industry players to drive innovation and address challenges in semiconductor design and manufacturing [1][2]. - Future trends discussed included the potential of RISC-V architecture in AI applications and the importance of modular and high-performance computing solutions [2][3].

Core Viewpoint - The company is actively developing advanced packaging technologies and expanding its production capacity to capture market opportunities in high-value products and trending market directions [2] Group 1: Company Strategy - The company is focusing on long-term development by enhancing its capabilities in fan-out, wafer-level, and flip-chip packaging technologies [2] - The company is also strategically positioning itself in cutting-edge packaging technologies such as Chiplet and 2D+ to create a differentiated competitive advantage [2] Group 2: Market Position - Currently, the company has no business cooperation with Nvidia, indicating a potential area for future growth or partnership opportunities [2]

Core Viewpoint - The company emphasizes its advanced packaging technologies and aims to capture market opportunities in high-value products, while currently having no collaboration with Nvidia [1] Group 1: Technology Development - The company is developing advanced packaging technologies such as fan-out, wafer-level, and flip-chip packaging, and is expanding its production capacity [1] - The company is actively laying out top-tier packaging technologies like Chiplet and 2D+, creating a differentiated competitive advantage [1] Group 2: Market Position - The company is aligning with industry technology trends and focusing on future high-value products and market hotspots [1] - There is currently no business collaboration between the company and Nvidia [1]

Company Overview - Tongfu Microelectronics is an integrated circuit packaging and testing service provider, offering one-stop services from design simulation to packaging testing for global clients [2][3] - The company covers various fields including AI, high-performance computing, big data storage, 5G, IoT, automotive electronics, and industrial control [2][3] - Major shareholder is Nantong Huada Microelectronics Group, with stable equity structure [2] Financial Performance - Revenue for 2022, 2023, 2024, and the first half of 2025: CNY 21.429 billion, CNY 22.269 billion, CNY 23.882 billion, and CNY 13.038 billion respectively [3] - Net profit for the same periods: CNY 0.502 billion, CNY 0.169 billion, CNY 0.678 billion, and CNY 0.412 billion [3] - 2024 revenue growth of 7.24% and net profit growth of 299.90% [6] - 2025 H1 revenue growth of 17.67% and net profit growth of 27.72% [6] Industry Situation - Global semiconductor market reached USD 346 billion in H1 2025, a year-on-year growth of 18.9% [4] - Forecast for 2025 global semiconductor market size is USD 728 billion, up 15.4% from 2024 [4] - Expected market size for 2026 is USD 800 billion, with a further growth of 9.9% [4] Key Trends in Semiconductor Market - AI-driven growth continues; Asia-Pacific IC design market expected to grow by 15% in 2025 [5] - TSMC maintains dominance in wafer foundry; strong demand for advanced processes [5] - 2025 is a critical year for 2nm wafer manufacturing technology [5] Business Performance in Specific Fields - In H1 2025, the company increased market share in mobile, home appliance, and automotive sectors [9] - Focus on AI and high-performance products, with successful integration of Suzhou and Penang factories [9] Technology Development - Significant progress in large-size FCBGA development, with mass production initiated [11] - Breakthroughs in optical-electrical hybrid packaging technology [11] - Over 1,700 patent applications, with nearly 70% being invention patents [8] Future Outlook - Continued growth expected in AI and new energy vehicle sectors in H2 2025 [10] - Chinese IC packaging and testing industry is anticipated to transition from "catching up" to "keeping pace" and potentially "leading" [10]