（文章来源：证券日报） 证券日报网讯通富微电9月29日在互动平台回答投资者提问时表示，公司紧跟行业技术发展趋势，抓住 市场发展机遇，面向未来高附加值产品以及市场热点方向，立足长远，大力开发扇出型、圆片级、倒装 焊等封装技术并扩充其产能；此外，积极布局Chiplet、2D+等顶尖封装技术，形成了差异化竞争优势。 截至目前，公司暂无与英伟达的相关业务合作。 ...

投资者提问： 公司天天说自己有先进封装技术，到底怎么先进？英伟达最强AI芯片公司可以封装吗？ 免责声明：本信息由新浪财经从公开信息中摘录，不构成任何投资建议；新浪财经不保证数据的准确 性，内容仅供参考。 董秘回答(通富微电SZ002156)： 尊敬的投资者，您好！公司紧跟行业技术发展趋势，抓住市场发展机遇，面向未来高附加值产品以及市 场热点方向，立足长远，大力开发扇出型、圆片级、倒装焊等封装技术并扩充其产能；此外，积极布局 Chiplet、2D+等顶尖封装技术，形成了差异化竞争优势。截至目前，公司暂无与英伟达的相关业务合 作。谢谢！查看更多董秘问答>> ...

Company Overview - Tongfu Microelectronics is an integrated circuit packaging and testing service provider, offering one-stop services from design simulation to packaging testing for global clients [2][3] - The company covers various fields including AI, high-performance computing, big data storage, 5G, IoT, automotive electronics, and industrial control [2][3] - Major shareholder is Nantong Huada Microelectronics Group, with stable equity structure [2] Financial Performance - Revenue for 2022, 2023, 2024, and the first half of 2025: CNY 21.429 billion, CNY 22.269 billion, CNY 23.882 billion, and CNY 13.038 billion respectively [3] - Net profit for the same periods: CNY 0.502 billion, CNY 0.169 billion, CNY 0.678 billion, and CNY 0.412 billion [3] - 2024 revenue growth of 7.24% and net profit growth of 299.90% [6] - 2025 H1 revenue growth of 17.67% and net profit growth of 27.72% [6] Industry Situation - Global semiconductor market reached USD 346 billion in H1 2025, a year-on-year growth of 18.9% [4] - Forecast for 2025 global semiconductor market size is USD 728 billion, up 15.4% from 2024 [4] - Expected market size for 2026 is USD 800 billion, with a further growth of 9.9% [4] Key Trends in Semiconductor Market - AI-driven growth continues; Asia-Pacific IC design market expected to grow by 15% in 2025 [5] - TSMC maintains dominance in wafer foundry; strong demand for advanced processes [5] - 2025 is a critical year for 2nm wafer manufacturing technology [5] Business Performance in Specific Fields - In H1 2025, the company increased market share in mobile, home appliance, and automotive sectors [9] - Focus on AI and high-performance products, with successful integration of Suzhou and Penang factories [9] Technology Development - Significant progress in large-size FCBGA development, with mass production initiated [11] - Breakthroughs in optical-electrical hybrid packaging technology [11] - Over 1,700 patent applications, with nearly 70% being invention patents [8] Future Outlook - Continued growth expected in AI and new energy vehicle sectors in H2 2025 [10] - Chinese IC packaging and testing industry is anticipated to transition from "catching up" to "keeping pace" and potentially "leading" [10]

Market Overview - The A-share market experienced a significant pullback, with the Shanghai Composite Index falling below 3800 points and the ChiNext Index dropping over 4% [1][2] - The trading volume increased to 2.58 trillion yuan, indicating active market participation despite the downturn [3] Sector Performance - The technology sector, particularly communication and electronics, saw substantial declines, with the communication sector down 8.48% and electronics down over 5% [8][11] - Conversely, the consumer sector showed strength, with retail stocks leading gains, including New Xunda rising nearly 13% [5][6] CPO and Chiplet Concepts - The CPO (Co-Packaged Optics) concept stocks faced significant declines, with a drop of nearly 9%, and specific stocks like Cambrian-U falling 14.45% [9][10] - The Chiplet concept also saw a decline of over 10%, indicating a broader trend of profit-taking in high-flying tech stocks [10][11] Investor Sentiment and Strategy - Analysts suggest that the market is facing short-term adjustment pressure, but the long-term "tech bull" logic remains intact [12][14] - Investors are advised to maintain some cash positions to buffer against potential downturns and to consider buying quality stocks that have been oversold [12][14][15] Future Outlook - The market is expected to continue a "volatile upward, structurally differentiated" trend, with a focus on sectors like AI, semiconductors, and renewable energy [14][15] - There is a caution against high-valuation traps and speculative stocks, emphasizing the importance of fundamental analysis in investment decisions [15][16]

Market Overview - The A-share market experienced a significant pullback, with the Shanghai Composite Index falling below 3800 points and the ChiNext Index dropping over 4% [1][2] - The trading volume increased to 2.58 trillion yuan, indicating active trading despite the downturn [2] Sector Performance - The technology sector, particularly communication and electronics, saw substantial declines, with the communication sector down 8.48% and electronics down over 5% [7][8] - In contrast, the consumer sector showed strength, with retail stocks leading gains, including New Xunda rising nearly 13% [4][5] CPO Concept Stocks - CPO (Co-Packaged Optics) concept stocks faced significant declines, with major players like Cambrian-U dropping 14.45% to 1202 yuan per share [10] - The CPO concept index fell by 8.77%, reflecting a broader trend of profit-taking in the computing power sector [9][12] Investment Sentiment - Analysts suggest that the market is undergoing a short-term adjustment, with a potential shift in funds towards lower-priced stocks as investors seek to lock in profits from previously high-performing sectors [12][13] - The sentiment indicates a cautious approach, with recommendations for investors to maintain cash positions to buffer against potential downturns and to capitalize on undervalued stocks during market dips [12][14] Future Outlook - Despite the current pullback, the long-term outlook for the technology sector remains positive, with expectations of renewed upward momentum after the market stabilizes [13][15] - Investment strategies are advised to focus on sectors with strong growth potential, such as AI, semiconductors, and renewable energy, while being wary of high-valuation traps [14][16]

Core Viewpoint - Chiplet technology is a method to meet the growing demands for computing power and I/O bandwidth by splitting SoC functions into smaller heterogeneous or homogeneous chips, integrated into a single system-in-package (SIP) [1] Group 1: System Partitioning - Design teams must consider which functional blocks to include and how to partition these functions across different chipsets, while also selecting the most efficient semiconductor process node for each functional block [2] - Common high-level partitioning schemes may involve separating compute chips, I/O chips, and storage functions into different chipsets, weighing factors like latency, bandwidth, and power consumption based on the chosen process nodes and partitioning [2] Group 2: Process Node Selection - In the latest process nodes, AI accelerators may be ideal for optimizing performance and power, but implementing cache at this node may not be efficient; SRAM is better implemented at lower-cost nodes [3] - A 3D implementation can be considered, where compute chips are on the latest node and SRAM and I/O are on older nodes, exemplified by AMD's Ryzen 7000X3D processor with second-generation 3D V-Cache [3] Group 3: Chip-to-Chip Connection Considerations - UCIe has become the de facto standard for die-to-die connections, with design teams needing to understand bandwidth requirements based on workload, including both data and control bandwidth [4] - Designers have various options for data rates and configurations, needing to balance data rates (ranging from 16G to 64G) and the number of channels to meet chip constraints [4] Group 4: Advanced Packaging Challenges - The focus on packaging technology has intensified, presenting both opportunities and challenges in multi-chip designs [6] - Designers must decide how to interconnect chips in multi-die designs, with considerations for cost, design speed, and interconnect density [6][7] Group 5: Testing and Security Design - Testing planning involves wafer probing to provide known good die (KGD) and using protocols like IEEE 1838 for accessing chips that may not be directly accessible [9] - Security design considerations arise with IP integration, requiring authentication features and potential support for secure computing architectures to protect sensitive data [10]

Investment Rating - The report maintains a "Buy" rating for the company, expecting a relative performance increase of over 15% compared to the benchmark index within the next 6 to 12 months [4][17]. Core Views - The company achieved record high revenue and net profit for Q2, with revenue reaching 6.946 billion yuan, a year-on-year increase of 19.8%, and net profit of 311 million yuan, a year-on-year increase of 38.6% [5][6]. - The company is deeply tied to AMD, benefiting from its strong performance in data center, client, and gaming segments, which has provided robust revenue and profit growth [8][12]. - The company aims for a revenue target of 26.5 billion yuan in 2025, representing a growth of 10.96% from 2024, which is higher than the industry growth rate [12][13]. Summary by Sections Financial Performance - For Q2, the company reported revenue of 6.946 billion yuan, a year-on-year increase of 19.8%, and a net profit of 311 million yuan, a year-on-year increase of 38.6% [6]. - The gross margin was 16.1%, with a net profit margin of 4.48% [6]. Revenue and Profit Forecast - The company forecasts revenue of 22.269 billion yuan for 2023, increasing to 32.542 billion yuan by 2027, with a compound annual growth rate (CAGR) of approximately 11% [4]. - The net profit is projected to grow from 169 million yuan in 2023 to 1.605 billion yuan in 2027, reflecting a significant increase [4]. Investment and Growth Strategy - The company plans to invest 6 billion yuan in facilities, production equipment, IT, and R&D in 2025, which is a 22.7% increase from the previous year [12]. - The company is focusing on advanced packaging technologies and has made significant progress in large-size FCBGA development, which has entered mass production [11].

Core Insights - The ninth China System-Level Packaging Conference highlighted the shift in the Chiplet ecosystem from a closed model to an open standard model, emphasizing collaboration across the industry [1][3] - AI is recognized as a core driver of the fourth industrial revolution, creating significant demand for semiconductor performance in various applications [1] - The integration of Chiplet technology with AI super-node hardware systems is seen as a crucial direction for overcoming limitations in advanced manufacturing processes and enhancing computing power [2] Industry Trends - Chiplet systemization and heterogeneous integration are becoming essential for sustaining computing power growth, widely adopted by major AI chip companies like NVIDIA, AMD, and Broadcom [2] - The release of UCIe 3.0 and the maturation of various Chiplet standards are facilitating a transition towards a more open and collaborative Chiplet ecosystem in China [3] - The complexity of Chiplet integration systems necessitates a shift from traditional design optimization to a more comprehensive system-level optimization approach [2] Company Strategies - The company, Chip and Semiconductor, is focusing on "STCO integrated system design" and developing multi-physics engine technologies to support advanced Chiplet packaging [3] - The company aims to provide a full-stack integrated system EDA solution, enhancing the design of next-generation high-speed and high-frequency smart electronic products across various sectors [3] - There is a call for collaboration among all segments of the domestic Chiplet advanced packaging industry to leverage AI opportunities and strengthen capabilities across materials, processes, design, and EDA tools [3]

Group 1 - The core viewpoint is that the advanced packaging market is expanding due to the rapid development of AI servers and smart vehicles, leading to increased demand for high-integration packaging solutions like Chiplet and 2.5D/3D [1][2] - Advanced packaging is becoming a key technology in the high-performance computing cycle, overcoming the limitations of Moore's Law, as traditional processes struggle with bandwidth, power consumption, and integration density challenges [1][2] - The global advanced packaging market is projected to reach $45 billion in 2024, accounting for over 55% of the overall packaging market, with a forecasted CAGR of 9.4% from 2024 to 2030 [2] Group 2 - The Chinese advanced packaging market is expected to grow rapidly, reaching a market size of 69.8 billion yuan in 2024, with a compound annual growth rate (CAGR) of 18.7% from 2020 to 2024, although its penetration rate remains at 40% [3] - Major players like TSMC are leading the AI packaging ecosystem with their CoWoS technology, while domestic manufacturers are accelerating their layouts to capture market opportunities [4] - Companies such as Longi Technology, Tongfu Microelectronics, and Huatian Technology are making significant advancements in various packaging technologies, positioning themselves competitively in the high-end process breakthrough and market share enhancement [4]

Summary of Key Points from the Conference Call Industry Overview - **Industry Focus**: The conference call primarily discusses the semiconductor industry, specifically the advanced packaging segment and the adoption of chiplet architectures. - **Key Technologies**: Emphasis on CoWoS (Chip-on-Wafer-on-Substrate) and FOCoS (Fan-Out Chip on Substrate) technologies as critical for advanced packaging solutions. Core Insights and Arguments - **Chiplet Adoption**: The adoption of chiplet architectures is accelerating, particularly as the industry transitions to 2nm nodes. Projections indicate chiplet penetration for nodes 5nm and below will reach 21% in 2025, 30% in 2026, and 37% in 2027, with 2nm node adoption expected to reach 57% by 2027E [1][40]. - **Cost and Yield Improvements**: Chiplet architectures can significantly lower manufacturing costs by splitting larger dies into smaller ones, improving yield rates. For instance, manufacturing costs can be reduced by 79.2% when transitioning from a single large die to multiple smaller chiplets [1][24][36]. - **Growing Demand for CoWoS**: The increasing chiplet penetration is expected to drive demand for CoWoS technology, which facilitates high-speed die-to-die interconnections. This demand is projected to grow at a CAGR of 71% for capacity and 63% for shipments from 2025 to 2027E [1][54][55]. Company-Specific Insights - **TSMC (2330.TW)**: - TSMC is a leader in advanced semiconductor packaging, particularly through its CoWoS technology, which is essential for AI and HPC applications. The company is expected to see significant revenue growth from CoWoS, with projections indicating it will account for 8.3% to 15.3% of TSMC's revenue from 2025 to 2027E [1][66]. - TSMC's CoWoS capacity is forecasted to reach 75k, 120k, and 170k in 2025, 2026, and 2027, respectively, reflecting aggressive capacity expansions to meet demand [1][66]. - **ASE (3711.TW)**: - ASE is gaining traction with its FOCoS technology, which is a cost-effective alternative to CoWoS, typically priced at half the cost. ASE's revenue from advanced packaging is expected to grow by 15% and 11% YoY in 2025 and 2026, respectively [1][67][69]. - **All Ring (6187.TWO)**: - All Ring is positioned to benefit from the advanced packaging trend, with expectations of revenue growth of 42% and 18% in 2025 and 2026, driven by CoWoS capacity expansion and new opportunities in CPO (Co-Packaged Optics) [1][71]. - **GPTC (3131.TWO)**: - GPTC is a key supplier of wet processing equipment for advanced packaging, with a market share of approximately 50% at TSMC. The company is expected to see revenue growth of 18.7% CAGR from 2024 to 2027, driven by the complexity of advanced packaging technologies [1][74][90]. Additional Important Insights - **Market Dynamics**: The report highlights the shift from traditional packaging methods to advanced solutions like CoWoS and FOCoS, indicating a broader market trend towards higher integration and performance in semiconductor designs [1][53]. - **Total Addressable Market (TAM)**: The total addressable market for CoWoS is projected to reach US$27.8 billion by 2027, growing at a CAGR of 65% from 2025 to 2027E [1][55][60]. - **Risks and Challenges**: Key risks include potential deterioration in end-demand, competition, and execution challenges that could impact profitability and market share for the companies involved [1][80][85][89]. This summary encapsulates the critical insights and projections discussed in the conference call, focusing on the semiconductor industry's evolution towards advanced packaging technologies and the implications for key players in the market.