Workflow
半导体芯闻
icon
Search documents
马来西亚,研发出7纳米AI芯片
半导体芯闻· 2025-08-26 10:09
Group 1 - Malaysia has launched its first homegrown AI processor, MARS1000, developed by SkyeChip using 7nm technology, aimed at edge workloads and applications such as autonomous robotics and smart cities [2] - The MARS1000 launch is part of a broader initiative where local companies, including Elliance, SkyeChip, Kaltech, and Estek Automation, signed a memorandum of understanding to collaboratively design Malaysia's first edge AI system [2] - Malaysia is becoming a significant player in the semiconductor packaging sector, accounting for approximately 10% of the global chip packaging market, with electronics making up nearly 40% of its total exports [3] Group 2 - The state of Johor is emerging as a hub for AI data centers, attracting substantial investments from major companies like Oracle and Microsoft, and ranking ninth in the Asia-Pacific region for AI data center market [3] - The Malaysian government, led by Prime Minister Anwar Ibrahim, is committed to investing at least 25 billion ringgit (approximately 6 billion USD) to enhance the country's capabilities in chip design, wafer manufacturing, and AI data centers [4] - U.S. restrictions on AI chip exports to Malaysia and Thailand complicate the country's efforts to strengthen its position in the global value chain, raising concerns about potential semiconductor smuggling to restricted markets like China [4]
三星2nm工艺迎来新客户
半导体芯闻· 2025-08-26 10:09
Core Viewpoint - DEEPX has signed a development agreement with Samsung Foundry and Gaonchips to create the next-generation generative AI chip, DX-M2, utilizing advanced 2nm technology, marking DEEPX as the first commercial client for this process in the AI chip sector [2][3]. Group 1: Development and Production Timeline - The multi-project wafer (MPW) prototype production is scheduled for the first half of 2026, with mass production targeted for 2027, aiming to enhance South Korea's high-value semiconductor industry and accelerate the global 2nm AI semiconductor ecosystem [2]. - The early commitment to Samsung's 2nm GAA process is crucial for DEEPX, as achieving practical device-level generative AI with existing technology nodes is nearly impossible due to high computational demands and strict power constraints [2][3]. Group 2: Performance and Efficiency - The 2nm process offers a power-to-performance ratio that is approximately twice as efficient as DEEPX's current 5nm-based DX-M1 chip, which is essential for overcoming technological barriers [3]. - The DX-M2 chip is designed to provide ultra-low power, device-level AI solutions, significantly outperforming data center capabilities in terms of energy efficiency, with a performance ratio tens of times higher than traditional data centers [3][5]. - The chip can perform real-time inference on models with up to 20 billion parameters at a speed of 20 to 30 tokens per second, consuming only 5 watts or less, which is a significant advancement compared to competitors running smaller models [3][4]. Group 3: Strategic Importance - DX-M2 is positioned to be the world's first practical device-level solution capable of real-time processing of advanced generative AI models, bridging the gap between high-performance AI and energy efficiency [4][5]. - DEEPX's CEO emphasizes that DX-M2 will lead the large-scale application and industrialization of generative AI, aiming to eliminate current cost and energy barriers associated with AI technology [5].
拜登政府半导体基金项目,彻底被叫停
半导体芯闻· 2025-08-26 10:09
如果您希望可以时常见面,欢迎标星收藏哦~ 来 源 :内容来自 路透社 。 美国商务部周一表示,其下属的一个机构将接管价值74亿美元的半导体研究基金的运营监督责 任。商务部称,拜登政府为处理这项职能而设立的私人非营利组织"充当了半导体'小金库'"。 美国国家标准与技术研究院(National Institute of Standards and Technology)将从美国半导体 技术促进中心(Natcast)手中,接管国家半导体技术中心(National Semiconductor Technology Center)的运营责任。国家半导体技术中心是拜登政府时期成立的一个公私合营联盟。 该部门称,拜登政府非法设立了Natcast,因此授予该组织高达74亿美元纳税人资金的协议无效。 美国商务部周一在一份声明中表示,Natcast是"规避法律明确规定、禁止政府机构成立公司的行 为",并指出拜登政府"在Natcast安插了前拜登政府官员"。 商务部长霍华德·卢特尼克(Howard Lutnick)在声明中说:"从一开始,Natcast就充当了半导 体'小金库',除了用美国纳税人的钱中饱拜登的拥护者私囊外,没有做任 ...
SK海力士第9代3D NAND即将上市
半导体芯闻· 2025-08-26 10:09
如果您希望可以时常见面,欢迎标星收藏哦~ 来 源 :内容来自 tom'shardware 。 周一,SK海力士宣布已开始批量生产其 321层、2Tb 3D QLC NAND 存储设备。该设备有望用于 数据中心,制造容量高达 244TB 甚至更高的超大容量 SSD,同时也能为个人电脑生产价格相对低 廉的高容量硬盘,足以与市面上一些顶级固态硬盘相抗衡。 SK海力士的 321层 2Tb (256GB) 3D QLC NAND 存储设备属于该公司的 V9Q 系列产品。其输 入/输出接口速度为 3200 MT/s,仅比最先进的 3D TLC NAND IC(如该公司即将推出的 V9T 321L 3D TLC NAND)的 3600 MT/s 略慢。此外,新的 2Tb V9Q IC 具备六个平面(据推测, 上一代 3D QLC NAND 设备为四个),这能实现更多的并行操作,显著提高了多重读取速度。 制造商声称,与 2023 年发布的旧款 V7Q 设备相比,其 2Tb V9Q 设备的写入性能提高了 56%, 读取性能提高了 18%。性能的提升归功于更高的输入/输出速度和强化的内部架构。此外,该公司 还声称,新的 2Tb ...
英特尔,错在了哪里?
半导体芯闻· 2025-08-26 10:09
Core Viewpoint - Intel has made significant strategic missteps, particularly in the context of the AI wave, which has led to its decline in the semiconductor industry [2] Group 1: Historical Context and Missteps - Intel's historical misjudgment began with a belief in its manufacturing dominance, which led to complacency and a lack of competition awareness [2] - The 2012 Q&A session highlighted a misguided confidence in Intel's integrated device manufacturing (IDM) model, which underestimated the capabilities of competitors like TSMC, Apple, NVIDIA, and AMD [2] Group 2: Technical and Product Development Failures - Intel lost its leading position in process technology due to multiple delays in its 10nm project, which was hampered by overly ambitious transistor density goals and reliance on complex techniques instead of adopting EUV technology sooner [3] - The classic "Tick-Tock" development model was abandoned in 2016, leading to a slower "process-architecture-optimization" approach, coinciding with the 10nm issues and resulting in stagnation in product updates [5] - The launch of the Sapphire Rapids Xeon processors faced multiple delays and significant redesigns, allowing AMD's Epyc processors to gain market share in the server segment [6] Group 3: Strategic Market Decisions - Intel exited the smartphone SoC market in 2016 and sold its 5G modem business to Apple in 2019, effectively abandoning the mobile market [7] - The cancellation of the Larrabee discrete GPU project delayed Intel's credible GPU roadmap, further impacting its competitive position [7] Group 4: Security and Trust Issues - The discovery of vulnerabilities like Meltdown and Spectre forced Intel to implement remedial measures that compromised performance and eroded trust during a critical period of technological challenges [8] Group 5: Competitive Landscape - AMD capitalized on Intel's manufacturing delays, steadily increasing its market share in x86 servers and desktops, with projections indicating AMD's server market share could exceed 20% by 2025 [9] - NVIDIA has dominated the AI accelerator market, shifting focus away from traditional CPU roadmaps [9] Group 6: Corporate Culture and Financial Management - Intel's extensive stock buybacks and complex investments, such as the later-closed Optane and sold NAND business, coincided with poor performance in its core manufacturing operations [10] - In 2024, Intel's stock price plummeted, prompting a large-scale cost-cutting plan [10] Group 7: Shift in Manufacturing Strategy - Increasingly, Intel has relied on TSMC for chip manufacturing, undermining its historical IDM advantage [11] - The company is at a critical juncture, needing to innovate and adapt to regain its competitive edge in the semiconductor industry [11]
台积电2nm,重大调整!
半导体芯闻· 2025-08-25 10:24
Core Viewpoint - TSMC is removing semiconductor equipment made in mainland China from its advanced chip production lines to avoid potential disruptions from upcoming U.S. restrictions [2][3] Group 1: Equipment and Production Strategy - TSMC plans to stop using Chinese equipment in its latest 2nm chip production line, which is set to begin mass production this year [2] - The decision is influenced by the potential U.S. regulations that may prohibit chip manufacturers receiving U.S. funding from using equipment from "foreign entities of concern," interpreted to include mainland China [2] - TSMC is also reviewing its chip manufacturing materials and chemicals to reduce reliance on mainland Chinese supplies while increasing local procurement in mainland China to align with local policies [3] Group 2: Future Production Capacity - TSMC's chairman and CEO, C.C. Wei, stated that the company is accelerating the construction of its semiconductor factory in Arizona, which will account for approximately 30% of its advanced chip capacity (2nm and beyond) once completed [3] - The company had initially planned to gradually replace Chinese equipment in its 3nm process but decided to fully eliminate it starting from the newly launched 2nm node due to the complexities and resource demands of changing verified suppliers [3]
首发C2基带!苹果折叠屏首曝
半导体芯闻· 2025-08-25 10:24
Core Viewpoint - Apple is preparing to launch its foldable iPhone, expected to be one of the most ambitious iPhones in its history, featuring a redesigned biometric system and innovative camera configurations [2][3]. Group 1: Design and Features - The foldable iPhone will adopt a book-style fold, with an internal display size of approximately 8 inches, aligning with industry standards [3]. - It is expected to feature a four-camera setup: one front camera, two rear cameras, and one internal camera, consistent with the upcoming iPhone 17 Pro series [3]. - The device will maintain full functionality in a closed state, equipped with a 5-6 inch external display for convenience [5]. Group 2: Biometric and Connectivity Innovations - The foldable iPhone is likely to reintroduce Touch ID instead of Face ID, which may be more suitable for the device's form factor [4]. - Apple plans to replace Qualcomm's modem with its custom C2 series chip, enhancing connectivity performance and energy efficiency [4][6]. Group 3: Pricing and Market Expectations - The anticipated price for the foldable iPhone could reach up to $1,800, available in black and white color options [6]. - The focus will be on whether the foldable iPhone can attract users and disrupt the market, especially as the iPhone 17 series is expected to have minimal design changes [6].
半导体制造,到底怎么用水?
半导体芯闻· 2025-08-25 10:24
Core Viewpoint - The article emphasizes the complexity of water usage in semiconductor manufacturing, highlighting that while fabs consume millions of gallons of water daily, much of it is recycled and reused within the facility, with actual consumption primarily occurring through evaporation in cooling systems [2][3][29]. Water Usage in Semiconductor Fabs - Water is essential for advanced chip architecture, lithography, and backend packaging, serving multiple roles including cooling and waste transport [2]. - The average daily water usage in semiconductor fabs can reach millions of gallons, with cooling towers being the primary source of water loss due to evaporation [2][4]. - In hot and arid regions, evaporation plays a dominant role in water loss, while in cooler climates, the loss is significantly lower [2][4]. Water Management Strategies - Fabs are increasingly implementing smarter wastewater classification, reuse, and heat recovery technologies to reduce water demand [2][5]. - The water intake for a large fab can be equivalent to the water usage of a city with a population of one million, but most of this water is treated and reused within the facility [3][4]. - The water system in modern fabs consists of interconnected cycles, where raw or recycled water is treated to become ultra-pure water (UPW) for wafer processing [4][5]. Reuse and Recycling - Water undergoes multiple usage cycles within the fab, with ultra-pure water typically used only once, while other water types are collected for reuse in less sensitive applications [5][12]. - Companies like UMC have achieved high water recovery rates, with UMC reporting an overall process water recovery rate of 84.3% [12][13]. - The use of recycled water is prioritized, with UMC's Singapore facility using approximately 97.6% recycled water in 2024 [13]. Infrastructure and Planning - Municipal water suppliers must demonstrate their capacity to meet long-term water needs for industrial projects, as seen in Phoenix, Arizona [3][7]. - Effective water management requires long-term planning and infrastructure development to support semiconductor manufacturing [7][8]. Challenges and Innovations - The purity of water is a critical factor that limits reuse; maintaining high purity levels is essential for advanced manufacturing processes [9][10]. - Digital twin technology is being utilized to optimize water and chemical flows, allowing for real-time monitoring and predictive maintenance [16][17]. - The industry faces challenges in measuring persistent chemicals at trillionth-level concentrations, which complicates water management strategies [26][27]. Conclusion - The key issue is not the volume of water used by fabs, but rather how much is recycled and how much is truly consumed, with evaporation being a significant factor in water balance [29]. - Effective water management strategies, including classification, routing, and monitoring, are essential for sustainable semiconductor manufacturing [29].
特朗普,救不了英特尔
半导体芯闻· 2025-08-25 10:24
Core Viewpoint - The article discusses the recent investment of nearly $8.9 billion by the U.S. government into Intel in exchange for a 9.9% equity stake, highlighting that this funding may not be sufficient to revitalize Intel's foundry business without securing external customers for its advanced 14A process technology [2][3]. Group 1: Investment and Financial Implications - The $8.9 billion investment is part of a broader federal initiative to support domestic manufacturing, but analysts argue that Intel needs substantial customer orders to make its foundry operations economically viable [2][3]. - Intel's CEO Lip Bu Tan warned that without major customer commitments, the company might have to exit the foundry business, emphasizing the need for sufficient order volume to justify investments in advanced manufacturing nodes [2][3]. - The U.S. government will become Intel's largest shareholder through this transaction, which includes a 17.5% discount on the share price compared to the previous closing price [3]. Group 2: Operational Challenges - Intel is currently facing issues with yield rates in its 18A process technology, which is critical for delivering qualified chips to customers [3]. - Analysts express concerns that poor yield rates could deter new customers from utilizing Intel's foundry services, exacerbating the company's ongoing operational challenges [3]. - The article notes that while the government investment signals support for Intel, it does not provide additional funding beyond what was previously allocated, indicating a potential decrease in government backing [6]. Group 3: Market Reactions and Future Outlook - Following the announcement of the investment, Intel's stock price rose by 5.5%, although it later fell by 1% in after-hours trading due to the details of the deal [4]. - The cumulative stock price increase for Intel this year stands at 23%, attributed to significant layoffs announced by the new CEO [4]. - Analysts suggest that while government support could benefit Intel, there are concerns regarding governance implications and the company's ability to prioritize shareholder interests [6].
321层QLC NAND,宣布量产
半导体芯闻· 2025-08-25 10:24
Core Insights - SK Hynix has completed the development of a 321-layer 2Tb QLC NAND flash product and has officially started mass production [2][3] - The new QLC NAND product features a significant increase in data transfer speed, with a 100% improvement compared to the previous generation, and enhancements in write performance by 56% and read performance by 18% [3] Product Development - NAND flash memory is a non-volatile storage semiconductor that retains data even when power is off, categorized by the number of bits stored per cell, with QLC storing 4 bits per cell [2] - The new product doubles the capacity of existing products, addressing the complexity of memory management that comes with larger capacities [2] - To enhance performance, the number of independently operating units (Planes) within the NAND has been increased from 4 to 6, allowing for more parallel operations [2] Market Strategy - SK Hynix plans to initially implement the 321-layer NAND in PC SSDs, with plans to expand to data centers and smartphones [3] - The company aims to achieve double the integration level through packaging technology that stacks 32 NANDs, targeting the AI server market with high-capacity eSSD solutions [3] - The company’s NAND development head emphasized that the mass production of this product significantly strengthens their large-capacity product lineup while ensuring price competitiveness [3]