证券代码：688216 证券简称：气派科技 气派科技股份有限公司 的论证分析报告 二〇二五年八月 气派科技股份有限公司 2025 年度向特定对象发行 A 股股票方案的论证分析报告 气派科技股份有限公司（以下简称"公司"或"气派科技"）是在上海证券 交易所科创板上市的公司。为满足公司业务发展的资金需求，进一步增强公司资 本实力、提升盈利能力，公司根据《中华人民共和国公司法》（以下简称"《公 司法》"）、《中华人民共和国证券法》（以下简称"《证券法》"）和《上市 公司证券发行注册管理办法》（以下简称"《注册管理办法》"）等法律、法规 和规范性文件的相关规定，公司拟通过向特定对象发行 A 股股票（以下简称"本 次发行"）的方式募集资金不超过 15,900.00 万元（含本数），扣除相关发行费 用后将全部用于补充流动资金。公司编制了本次发行方案的论证分析报告（以下 简称"本报告"）。 如无特别说明，本报告相关用语与《气派科技股份有限公司 2025 年度向特 定对象发行 A 股股票预案》中的释义具有相同含义。 一、本次向特定对象发行的背景和目的 （一）本次发行的背景 半导体产业是电子信息产业的基础和核心，是科技创新的先 ...

Core Viewpoint - TSMC is significantly expanding its CoWoS capacity, with projections indicating a rise from 70k wpm at the end of 2025 to 100-105k wpm by the end of 2026, and further exceeding 130k wpm by 2027, showcasing a growth rate that outpaces the industry average [1][2]. Capacity Expansion - TSMC's CoWoS capacity will reach 675k wafers in 2025, 1.08 million wafers in 2026 (a 60% year-on-year increase), and 1.43 million wafers in 2027 (a 31% year-on-year increase) [1]. - The expansion is concentrated in specific factories, with the Tainan AP8 factory expected to contribute approximately 30k wpm by the end of 2026, primarily serving high-end chips for NVIDIA and AMD [2]. Utilization Rates - Due to order matching issues with NVIDIA, CoWoS utilization is expected to drop to around 90% from Q4 2025 to Q1 2026, with some capacity expansion plans delayed from Q2 to Q3 2026. However, utilization is projected to return to full capacity in the second half of 2026 with the mass production of new projects [4]. Customer Allocation - In 2026, NVIDIA is projected to occupy 50.1% of CoWoS capacity, down from 51.4% in 2025, with an allocation of approximately 541k wafers [5][6]. - AMD's CoWoS capacity is expected to grow from 52k wafers in 2025 to 99k wafers in 2026, while Broadcom's capacity is projected to reach 187k wafers, benefiting from the production of Google TPU and Meta V3 ASIC [5][6]. Technology Developments - TSMC is focusing on advanced packaging technologies such as CoPoS and WMCM, with CoPoS expected to be commercially available by the end of 2028, while WMCM is set for mass production in Q2 2026 [11][14]. - CoPoS technology offers higher yield efficiency and lower costs compared to CoWoS, while WMCM is positioned as a cost-effective solution for mid-range markets [12][14]. Supply Chain and Global Strategy - TSMC plans to outsource CoWoS backend processes to ASE/SPIL, which is expected to generate significant revenue growth for these companies [15]. - TSMC's aggressive investment strategy in the U.S. aims to establish advanced packaging facilities, enhancing local supply chain capabilities and addressing global supply chain restructuring [15]. AI Business Contribution - AI-related revenue for TSMC is projected to increase from 6% in 2023 to 35% in 2026, with front-end wafer revenue at $45.162 billion and CoWoS backend revenue at $6.273 billion, becoming a core growth driver [16].

Group 1: Core Insights - Citigroup has raised TSMC's CoWoS capacity forecast from 800,000 to 870,000 units by 2026, driven by strong AI demand and larger chip sizes [1] - Despite some downstream ODM manufacturers showing weak guidance, supply chain leaders like Hon Hai remain optimistic, with Nvidia's wafer revenue expected to grow over 50% year-on-year by 2026 [1] - Cloud service providers' ASIC development plans are identified as a second growth engine for TSMC, expanding advanced packaging demand into more applications like server CPUs [1][5] Group 2: AI Infrastructure Complexity - The complexity of AI infrastructure is increasing, with power consumption for AI systems potentially reaching 800-900 kW per rack by 2027/2028, raising demands on cooling and power systems [2] - The importance of high-speed serial and parallel interfaces (SerDes I/O) is growing, leading to more network switch chips and server CPUs adopting advanced packaging technologies [2] - Leading suppliers in the AI supply chain are expected to enjoy better growth prospects due to the increasing complexity of chip and system design [2] Group 3: Nvidia's Product Iteration - Nvidia's GB200 remains the primary configuration for AI data centers, with the GB300 expected to ramp up in Q4 2025 [3] - The next-generation system, Vera Rubin, is anticipated to be officially launched at the 2026 GTC conference and will utilize advanced N3 process GPUs and higher memory densities [3] Group 4: Cloud Providers' ASIC Accelerators - Google and AWS are leading in the development of self-developed ecosystems among cloud service providers, with ASIC chip shipments expected to reach 400,000 to 500,000 units by 2026 [4] - Google is collaborating with MediaTek for its TPU supply chain, while AWS's Trainium 3 is expected to achieve larger-scale production in the second half of 2026 [4] - Microsoft is slower in developing its own AI ASICs but is resuming activities related to the Maia 300, with small-scale production expected next year [4] Group 5: Advanced Packaging Demand Expansion - The application of advanced packaging technology is expanding beyond AI accelerators to include network switch chips and server CPUs, providing more growth opportunities for TSMC [5] - The increasing complexity of systems and data transmission requirements are raising industry entry barriers, allowing leading suppliers to gain competitive advantages [5] - Factors such as larger chip sizes and the ramp-up of ASIC accelerators in the second half of 2026 are supporting the optimistic outlook for TSMC's CoWoS capacity [5]

Group 1 - Huawei plans to officially open source UCM by September 2025, initially launching in the Magic Engine community and gradually contributing to mainstream inference engine communities and sharing with all Share Everything storage vendors and ecosystem partners [2] - Samsung is developing a 415mm x 510mm panel-level advanced packaging System on Panel (SoP) to compete for large-scale chip system integration orders against Intel and TSMC, utilizing a technology that eliminates PCB substrates and silicon interlayers [3] - Ford is recalling over 103,000 F-150 vehicles in the U.S. due to potential fatigue-related failures of rear axle hub bolts, highlighting the company's proactive responsibility in addressing safety concerns [4] Group 2 - JD Group CEO Xu Ran stated that the current subsidy war lacks innovation and creates a negative impact on the market, emphasizing that the company will not participate in harmful internal competition [5][6] - Micron announced a global halt on the development of future mobile NAND products due to ongoing weak financial performance in the mobile NAND market, while continuing to support other NAND solutions [6] - The film "Adventure" has surpassed 70 million yuan in total box office revenue within five days of its release [7] Group 3 - McDonald's clarified its recruitment of retired employees, stating that it adheres to legal regulations and provides compliant compensation and commercial insurance [8] - Douyin e-commerce has taken strict measures against infringement and counterfeiting, processing over 24,000 accounts for violations related to unauthorized use of creators' images and AI-generated content [9] - Galaxy Entertainment reported a 19% year-on-year increase in shareholder profit to 5.2 billion HKD for the first half of 2025, with net revenue rising 8% to 23.2 billion HKD [10] Group 4 - The all-new Tank 500 has officially started pre-sales with a starting price of 360,000 yuan, featuring advanced intelligent driving systems and achieving 7,289 orders within two hours of pre-sale [11] - Xiaomi's car sales personnel clarified that the requirement to settle over 200,000 yuan in remaining payments applies only to specific customers with special circumstances, aiming to improve delivery efficiency [12] - Former Honor CEO Zhao Ming denied rumors of joining Zhijie Auto, emphasizing his focus on personal recovery and planning [13][14]

Core Viewpoint - The company, Yongxi Electronics (Ningbo) Co., Ltd., maintains a stable credit rating of A with a stable outlook, supported by its technological strength and long-term partnerships with key chip enterprises, despite facing challenges in capacity expansion and profitability [3][4][5]. Financial Performance - Total assets increased from 83.21 billion yuan in 2022 to 123.31 billion yuan in 2023, with total liabilities rising from 53.76 billion yuan to 83.33 billion yuan during the same period [6][22]. - The company reported significant revenue growth, with total operating income rising from 21.77 billion yuan in 2022 to 36.09 billion yuan in 2023, while net profit improved from a loss of 1.35 billion yuan to a profit of 0.09 billion yuan [8][21]. - The gross profit margin decreased from 21.91% in 2022 to 13.90% in 2023, primarily due to increased costs associated with the second-phase factory construction [20][21]. Operational Capacity - The company is in a capacity expansion phase, with production capacity for non-wafer-level packaging increasing from 349.9 million units in 2022 to 575.7 million units in 2024, and production volume rising from 269 million units to 518 million units during the same period [17][16]. - The utilization rate for non-wafer-level packaging reached 90% in 2024, indicating effective capacity management [16]. R&D and Technological Development - The company has a strong focus on advanced packaging technologies, with R&D expenditures increasing from 1.22 billion yuan in 2022 to 2.17 billion yuan in 2024, representing a growing commitment to innovation [18][17]. - As of 2024, the company holds 400 patents, including 158 invention patents, showcasing its competitive technological capabilities [17][18]. Market Position and Customer Relationships - The company has established long-term relationships with major domestic chip manufacturers, with the top five customers accounting for approximately 38.38% of total sales in 2023 [13][14]. - The company benefits from strong customer loyalty and has successfully expanded its client base, particularly in the automotive and 5G sectors [13][14]. Industry Context - The global packaging and testing market is highly concentrated, with the top five companies holding over 50% market share, indicating significant competitive pressures [10][11]. - The advanced packaging market is expected to grow significantly, driven by increasing demand from high-performance computing and AI applications, positioning the company favorably for future growth [11][12].

Core Viewpoint - The report highlights the financial performance and operational status of Qipai Technology Co., Ltd. for the first half of 2025, indicating a slight increase in revenue but a significant increase in net losses compared to the previous year. Financial Performance - The company's revenue for the first half of 2025 was approximately 325.91 million yuan, representing a 4.09% increase from 313.10 million yuan in the same period last year [3][15]. - The total profit for the period was a loss of approximately 62.66 million yuan, compared to a loss of 51.17 million yuan in the previous year [3][15]. - The net profit attributable to shareholders was a loss of approximately 58.67 million yuan, worsening from a loss of 40.60 million yuan year-on-year [3][15]. - The net cash flow from operating activities was approximately 14.11 million yuan, down 62.33% from 37.45 million yuan in the previous year [3][15]. - The company's net assets at the end of the reporting period were approximately 597.18 million yuan, down 8.64% from 653.63 million yuan at the end of the previous year [3][15]. Industry Overview - The semiconductor packaging and testing industry is experiencing a recovery, with global semiconductor market sales reaching 59 billion USD in May 2025, a year-on-year increase of 27% [5][7]. - The global semiconductor market is projected to grow to 718.9 billion USD in 2025, reflecting a 13.2% year-on-year increase [5][7]. - The demand for AI chips is expected to drive an 8% growth in the packaging and testing industry, with increasing needs for high-reliability and miniaturized packaging in automotive electronics and IoT [7]. Business Operations - The main business of the company includes semiconductor packaging and testing, divided into integrated circuit packaging testing, power device packaging testing, and wafer testing [5][8]. - The company has developed over 300 types of packaging forms, including MEMS, FC, GaN RF devices, and various traditional and advanced packaging technologies [8][13]. - The company emphasizes continuous R&D investment, with a total R&D expenditure of approximately 26.02 million yuan in the first half of 2025, a 2.50% increase year-on-year [16]. Competitive Advantages - The company has established a strong competitive edge through its proprietary technologies in packaging, including GaN microwave RF packaging and high-density matrix packaging technologies [18][19]. - The company has a well-structured team with extensive experience in semiconductor packaging and testing, contributing to its innovation and operational efficiency [19][20]. - The company operates a flexible production model that allows for quick adjustments to production plans based on customer orders, enhancing market responsiveness [20][21].

Core Viewpoint - The AiTech Forum on semiconductors, organized by Aijian Securities, aims to create a high-end dialogue platform for industry, research, and capital to address core challenges in the semiconductor industry, particularly in technology barriers, ecosystem construction, and capital collaboration [1] Group 1: Forum and White Paper - The forum focused on "Changes and Constants in the Semiconductor Industry in the AI Era" and released the "Semiconductor Industry White Paper," providing comprehensive insights and forward-looking guidance for industry development [1] - The white paper was jointly published by Aijian Securities and the Pudong New Area Economic and Information Commission, presenting a systematic view of the development trajectory and future trends of China's semiconductor industry, supported by extensive data [2] Group 2: Key Areas of Focus - The white paper highlights three frontier areas: advanced packaging technology, which is crucial for enhancing chip performance as the limits of Moore's Law approach, with AI computing power demands accelerating its commercialization [2] - High-performance storage is projected to exceed 1800EB in total storage capacity in China by 2025, with a focus on the technological upgrades of DRAM and NAND Flash products [2] - The demand surge in sectors like electric vehicles, 5G, and AI is driving the localization of high-performance semiconductor materials, with significant breakthroughs expected in subfields like photoresists and wet electronic chemicals within the next 3 to 5 years [2] Group 3: Industry Trends - The semiconductor industry is currently in a recovery phase, expected to return to positive growth by the end of 2024, with a forecast for restorative growth in 2025 [2] - Due to the long construction cycles of wafer fabs and rapid demand changes, cyclical fluctuations caused by supply-demand mismatches will continue, particularly evident in storage chips due to their high standardization [2] Group 4: Strategic Collaborations - Aijian Securities signed strategic cooperation agreements with several semiconductor companies during the event, aiming to harness the synergy between finance and industry to explore new paradigms of ecological collaboration [3]

Summary of Conference Call on Zhongcai Technology and the Electronic Fabric Industry Company and Industry Overview - The conference call focused on Zhongcai Technology and the electronic fabric industry, particularly the demand for low dielectric constant (low DK) and low coefficient of thermal expansion (low CTE) materials [2][3][5]. Key Points and Arguments 1. **Order Growth and Market Dynamics** - NOCT orders have exceeded expectations, driving growth in the electronic fabric sector alongside increased demand for high-performance materials and orthogonal backplanes [2][3]. - The orthogonal backplane corresponds to a PCB market space of approximately $8 billion, with electronic fabric contributing 8%-9% of its value [2][7]. 2. **Market Projections for Low DK and Low CTE Materials** - Low DK electronic fabric demand is projected to grow from 90 million meters in 2025 to 230 million meters by 2027, with a significant compound annual growth rate [2][8]. - Low CTE fiber fabric is crucial for reducing chip deformation, especially in high-heat environments, with demand driven by companies like Huawei adopting advanced packaging techniques [2][11]. 3. **Supply Chain and Production Capacity** - Zhongcai Technology plans to reach an annual production capacity of 35 million meters by the end of 2026, while Honghe Technology aims for 20 million meters [4][17]. - The global supply landscape shows that overseas companies hold 50% of the market, with Zhongcai being the largest supplier at 20% [4][23]. 4. **Technological Advancements and Production Challenges** - The introduction of COROP technology has significantly increased the application space for low CTE materials [3]. - Production of low CTE materials faces high barriers, including drawing and surface treatment processes, leading to a relatively tight supply [12][16]. 5. **Future Market Potential** - The low CTE market is expected to reach a scale of 30 billion RMB by 2027, with domestic companies likely to capture a significant share of the profits [15]. - The market for low DK materials could expand to 20 billion RMB by 2027, driven by high-end product demand [9]. 6. **Competitive Landscape** - Zhongcai and Honghe are well-positioned to meet market uncertainties due to their comprehensive product structures [4][22]. - The competition is expected to intensify as companies like Feilihua and Linzhou Guangyuan also expand their production capacities [19][30]. Other Important Insights - The demand for low CTE materials is not only driven by AI applications but also by advanced packaging technologies used in high-end devices like Apple's M series chips [11]. - The electronic fabric industry is currently in a tight balance, with supply gaps expected to persist into 2025 despite rapid capacity expansions [23]. - The transition from traditional to advanced packaging techniques is anticipated to enhance the usage of low CTE materials significantly [13][14]. This summary encapsulates the critical insights from the conference call, highlighting the growth potential and competitive dynamics within the electronic fabric industry, particularly focusing on low DK and low CTE materials.

Core Viewpoint - The semiconductor packaging industry is experiencing a shift from CoWoS technology to emerging alternatives like CoPoS and FOPLP due to the limitations and challenges faced by CoWoS, particularly in terms of complexity, cost, and capacity constraints [1][36]. Group 1: CoWoS Technology Challenges - CoWoS packaging technology has become a focal point in the industry but is now facing significant challenges such as high production costs, yield control issues, and electrical performance limitations [1][36]. - The increasing size of AI GPU chips and the number of HBM stacks have led to bottlenecks in CoWoS, particularly due to photomask size limitations [4][36]. - TSMC has acknowledged these challenges and is positioning CoPoS as the next-generation successor to CoWoS, aiming to gradually replace CoWoS-L through technological iterations [4][9]. Group 2: CoPoS Technology Development - CoPoS technology represents a significant evolution from CoWoS by replacing the silicon interposer with a panel-sized substrate, allowing for larger packaging sizes and improved area utilization [6][8]. - CoPoS aims to enhance overall computational performance by integrating more semiconductors within a single package, thus improving yield efficiency and reducing edge waste [6][8]. - TSMC plans to establish a pilot line for CoPoS technology by 2026, with mass production targeted for late 2028 to 2029, with NVIDIA as the first customer [9][36]. Group 3: FOPLP Technology Emergence - FOPLP is emerging as a potential major alternative to CoWoS, leveraging the advantages of fan-out wafer-level packaging while utilizing panel-level substrates for enhanced size and utilization [10][13]. - The FOPLP market is projected to grow significantly, with a compound annual growth rate of 32.5%, reaching approximately $221 million by 2028 [14][36]. - Major industry players like ASE, Samsung, and others are actively investing in FOPLP technology, with ASE planning to establish a production line in Kaohsiung and Samsung already having a foothold in the panel-level packaging sector [11][18][19]. Group 4: CoWoP Technology Introduction - NVIDIA has proposed CoWoP technology, which simplifies the traditional packaging structure by integrating the chip directly onto the PCB, potentially reducing costs and improving performance [25][30]. - CoWoP aims to enhance signal integrity and power delivery while reducing thermal issues, but it faces significant technical challenges related to PCB manufacturing capabilities [30][36]. - The transition to CoWoP is seen as a long-term project for NVIDIA, with potential benefits including reduced costs and improved performance, although short-term adoption remains uncertain due to existing dependencies on traditional packaging methods [33][35].

Core Viewpoint - The semiconductor industry is experiencing a shift from CoWoS packaging technology to emerging alternatives like CoPoS and FOPLP due to the limitations and challenges faced by CoWoS, including high production costs and capacity bottlenecks [2][39]. Group 1: CoWoS Technology Challenges - CoWoS packaging technology has become a focal point due to the rise of AI and GPU chips, but it faces significant challenges such as complex processes, high production costs, and issues with yield control and testing [2][39]. - The increasing size of AI GPU chips and the number of HBM stacks have led to limitations in CoWoS, particularly due to photomask size constraints [6][39]. Group 2: CoPoS as an Evolution - CoPoS technology is seen as the next evolution of CoWoS, with TSMC positioning it as a successor that offers greater flexibility and economic benefits [4][6]. - CoPoS replaces the silicon interposer with a panel-sized substrate, allowing for larger packaging sizes and improved area utilization, which enhances production flexibility and scalability [8][11]. Group 3: FOPLP Technology Emergence - FOPLP is gaining traction as a potential major alternative to CoWoS, with its ability to support larger chip sizes and higher I/O density, making it suitable for AI and high-performance computing applications [12][14]. - The FOPLP market is projected to grow significantly, with a compound annual growth rate of 32.5%, reaching approximately $221 million by 2028 [18][21]. Group 4: Industry Players and Developments - Major companies like ASE, Samsung, and TSMC are actively investing in FOPLP technology, with ASE planning to establish a production line in Kaohsiung and Samsung having acquired PLP technology to support its development [22][23]. - TSMC is also advancing its FOPLP technology, with plans for a dedicated production line and initial trials expected to begin in 2026 [24][25]. Group 5: CoWoP Technology Introduction - CoWoP, proposed by NVIDIA, aims to simplify the packaging structure by integrating the chip directly onto the PCB, potentially reducing costs and improving performance [29][31]. - However, CoWoP faces significant challenges, including the need for high-precision PCB manufacturing and the risk of yield issues during the transition from existing technologies [35][37]. Group 6: Future Outlook - The semiconductor industry is currently balancing mature technologies like CoWoS with emerging solutions such as CoPoS, FOPLP, and CoWoP, which are expected to reshape the landscape as they mature [39].