Core Viewpoint - The ongoing AI boom is driving advancements in semiconductor packaging technologies, particularly Fan-out Panel Level Packaging (FOPLP), which is expected to enhance chip efficiency and market competitiveness [1][2]. Group 1: Advanced Packaging Technologies - Advanced packaging integrates different chips to improve performance, reduce space, and lower power consumption, with TSMC's CoWoS technology being a notable example [1]. - FOPLP technology utilizes square substrates for IC packaging, significantly increasing usable area compared to traditional round wafers, achieving a utilization rate of 95% [1]. - The development of mid-to-high-end semiconductor packaging using 3.5 generation FOPLP glass substrates can provide an area seven times larger than that of a 12-inch glass wafer [1]. Group 2: Industry Collaboration and Development - The Ministry of Economic Affairs, in collaboration with companies like Innolux and the Industrial Technology Research Institute, has launched initiatives to promote FOPLP technology and enhance the value of existing panel production lines [1][2]. - Despite challenges in production technology, such as panel warping and yield issues, ongoing collaboration aims to reduce defects and improve manufacturing processes [2]. Group 3: Market Position and Strategy - Innolux is not competing directly with established semiconductor manufacturers but is leveraging its existing panel production capabilities to transition into advanced packaging [2][3]. - The company plans to utilize its larger glass substrates to meet the increasing demand for IC packaging, with a focus on chip-first solutions to gain market recognition [3]. - The company is committed to continuous improvement in technology and talent development in the FOPLP sector, with expectations for tangible results and shipments this year [3]. Group 4: Future Prospects and Innovations - The company is exploring various advanced technologies, including chip last and redistribution layer (RDL) techniques, while maintaining a focus on validating these technologies rather than solely on mass production [4].

Core Viewpoint - IBM has formed a significant alliance with Deca Technologies in the semiconductor packaging sector, allowing IBM to enter the advanced fan-out wafer-level packaging (FOWLP) market [1][2]. Group 1: IBM and Deca Technologies Collaboration - IBM plans to establish a new high-volume production line at its existing packaging facility in Bromont, Quebec, to produce advanced packaging based on Deca's M series fan-out interconnect technology (MFIT) [1]. - The MFIT technology enables the integration of complex multi-chip packages, particularly for AI and memory-intensive computing applications [2][12]. - The collaboration aims to expand IBM's packaging capabilities and provide North American customers with new fan-out production options [2][9]. Group 2: Background on IBM's Semiconductor History - IBM has a long history in the semiconductor industry, dating back to its founding in 1911, and has made significant contributions, including the invention of DRAM in 1966 [4][5]. - The company entered the commercial semiconductor market in 1993, manufacturing and selling ASICs, processors, and other chips [5]. - In the 2010s, IBM's microelectronics division faced challenges, leading to the sale of its semiconductor business to GlobalFoundries in 2014 [6][8]. Group 3: Current Semiconductor and Packaging Efforts - IBM continues to design processors and chips but relies on foundries for production, with a significant semiconductor R&D center in New York [8]. - The Bromont facility is the largest outsourced semiconductor packaging and testing (OSAT) facility in North America, providing flip-chip packaging and testing services [8]. - IBM is also collaborating with Rapidus to develop 2nm processes based on IBM's nanosheet transistor technology [8]. Group 4: Fan-Out Wafer-Level Packaging (FOWLP) - FOWLP is an advanced packaging technology that integrates complex chips into a small package, enhancing chip performance [1][10]. - The technology gained prominence in 2016 when Apple used TSMC's fan-out packaging in its iPhone 7 [10]. - FOWLP allows for the integration of multiple chips and components, offering a compact solution with numerous I/O interfaces [10][12]. Group 5: Future Developments and Contracts - IBM and SkyWater are developing fan-out packaging capabilities based on Deca's technology, with SkyWater having secured a $120 million contract with the U.S. Department of Defense [11]. - Deca is also advancing its M series technology, which includes the MFIT version, enabling high-density integration of memory and processors [12].

Core Viewpoint - SpaceX, led by Elon Musk, is betting on Fan-Out Panel Level Packaging (FOPLP) to meet the production demands of its low Earth orbit satellites, requiring suppliers to expand their FOPLP production lines [1][2]. Group 1: SpaceX and FOPLP Development - SpaceX has signed a Non-Recurring Engineering (NRE) contract with Innolux, which is expected to secure significant orders for power management chips and aims for FOPLP mass production this year [1]. - SpaceX is also building its own FOPLP production line in Malaysia, with a substrate size of 700mm x 700mm, the largest in the industry, targeting RF chips and power management chips for integrated packaging [1]. Group 2: Innolux's Position and Strategy - Innolux, a supplier for Tesla, is extending its collaboration into semiconductors, aiming to develop analog chips for mass production this year [2]. - The company is utilizing its existing 3.5-generation glass substrate for FOPLP, which, while not competitive for panel production, offers significant size advantages for packaging efficiency [2]. Group 3: Clarifications on Technology Capabilities - Following a report suggesting that the display industry's precision standards are insufficient for advanced chip packaging, Innolux clarified that it has not received negative feedback regarding its technical capabilities and that the overlap between display technology and advanced packaging processes is significant [3][4]. - Innolux emphasized that its G3.5 factory can produce the largest substrate size currently applicable for advanced packaging, and it can adjust processes for smaller substrate sizes without technical challenges [4][5]. Group 4: Market Trends and Future Focus - The trend towards larger chip sizes is driving the economic benefits of larger packaging substrates, which Innolux plans to focus on to enhance process efficiency and provide reliable packaging solutions for clients [5].

Core Viewpoint - Heterogeneous integration presents significant opportunities for performance enhancement and power reduction in semiconductor packaging, but it also introduces complex challenges such as chip misalignment, warpage, and CTE mismatch [1][2]. Group 1: Heterogeneous Integration - Heterogeneous integration allows for the combination of various components with different manufacturing processes into a single package, potentially offering cost-effectiveness and higher yield compared to integrating similar components on a single silicon die [1]. - The integration of devices into a single package can improve performance and reduce overall circuit footprint, although it poses substantial challenges in aligning different components on a single substrate [1]. Group 2: Interconnect and Mediator Layers - Most heterogeneous components utilize some form of mediator layer to connect circuit components, with the choice of materials influenced by the required interconnect and power density [3]. - Managing the thermal expansion coefficient (CTE) differences between silicon devices and copper-based system-level wiring is a fundamental challenge in the design of these mediator layers [3][4]. Group 3: Challenges in Packaging - The process of aligning chips and managing warpage is particularly challenging in panel-level packaging, where the thermal expansion characteristics of materials can lead to misalignment during the assembly process [6][7]. - Once the packaging materials harden, any chip misalignment becomes "frozen," complicating detection and correction of alignment issues [7]. Group 4: Power Devices and Packaging - Packaging is a critical differentiator for power devices, which require low-loss, low-noise, and excellent thermal characteristics [8]. - The degradation of epoxy-based molding compounds due to thermal and electrical fields can lead to brittleness and moisture ingress, necessitating careful consideration of packaging materials [9]. Group 5: Collaborative Design and Optimization - The integration of heterogeneous packaging blurs the lines between on-chip and off-chip environments, emphasizing the need for co-optimization of packaging design and component devices [9]. - Standardized interfaces like UCIe are a good starting point, but thorough simulation of proposed designs remains essential for effective integration [9].

Group 1: Economic Growth Indicators - Jiangsu province's average daily truck flow at highway exits increased by 21,000 vehicles compared to the first quarter, indicating robust economic activity [2][3] - Industrial electricity consumption in Jiangsu grew by 3.1% year-on-year in the first four months, reflecting economic resilience and a positive trend [4] - The province's machinery and electrical products export reached 848.01 billion yuan, a year-on-year increase of 11.1%, accounting for 68.9% of total exports [5] Group 2: Logistics and Transportation Efficiency - The digital freight platform "Yunmanman" improved logistics efficiency, with a 22.6% year-on-year increase in order fulfillment and a 28.8% rise in active shippers [2] - The average monthly truck flow on the Hu-Ning Expressway increased by approximately 21.06% in April compared to the first quarter, showcasing the active logistics network [3] Group 3: Major Projects and Investments - A total of 500 major provincial projects in Jiangsu completed investments of 231.9 billion yuan, achieving a completion rate of 35.5% by the end of April [7] - The province's financial institutions have provided 556.3 billion yuan in financing for major projects, with an increase of 81.2 billion yuan since the beginning of the year [8] Group 4: Sector-Specific Developments - The biopharmaceutical sector saw a significant electricity consumption increase of 20.4%, indicating strong growth potential [4] - The automotive industry experienced a 51.3% surge in production of new energy vehicles in Changzhou during the first quarter, driving electricity consumption in the sector [4][6]

"宁波膜智信息科技有限公司"为势银（TrendBank）唯一工商注册实体及收款账户 添加文末微信，加 先进封装 群 Chiplet先进封装技术是半导体制程微缩脚步放缓后必然发展路径，其拥有独立IP物理化带来的 降本增效优势，以及可模块化异质异构集成特点，正在成为提升芯片性能的又一关键技术解决 方案。 在通州区委副书记、南通高新技术产业开发区党工委常务副书记吴冰冰开幕致辞下，本次交流 会正式开启。 会议上，南通高新技术产业开发区相关领导详细解读了南通在集成电路领域的产业优势、人才 及资源情况、交通运输发展规划。复旦大学智能材料与未来能源创新学院相关领导深入浅出的 势银研究： 势银产业研究服务 势银数据： 势银数据产品服务 势银咨询： 势银咨询顾问服务 重要会议： 4月29日，2025势银异质异构集成封装产业大会（浙江宁波） 点此报名 分享了复旦大学在微电子材料与器件分析技术方向的产学研布局。制局半导体（南通）有限公 司董事长付伟为各与会专家详细介绍了本次在南通高新区落地的先进封装模组制造项目，制局 半导体总投资10.5亿元，聚焦小芯片和异构集成技术，凭借具有高产出、低成本的FOPLP先进 封装解决方案，致力于为 ...

甬矽电子 20250424 摘要 • 永熙公司 2025 年一季度营收同比增长 30%，实现扭亏为盈，受益于二期 产能释放、核心客户深耕及海外客户拓展，尤其在台湾地区新增两家客户 贡献显著，预计二季度仍将保持环比增长。 • 美国对半导体领域关税豁免，中国反制措施覆盖全部关税，利好部分美国 竞品需求。目前客户需求持续增长，但需关注备货影响。公司 local for local 策略推动台湾和欧洲客户需求增长，预计 2025 年增速超公司平均水 平。 • 永熙公司 2.5D/3D 封装产线已于 2024 年四季度通线，正与国内高端客户 进行产品验证，预计最快 2025 年晚些时候进入实质性验证环节，量产收 入时间待定，取决于前道工艺突破。 • 2024 年海外客户收入占比约 15%-20%，毛利率与公司整体持平。随着 AP SoC 和车规产品导入，预计海外客户毛利率将提升，远期目标营收占 比达 30%。 • 公司维持二期投资框架下扩产，2025 年资本开支预计 20-25 亿元。车载 CIS 需求旺盛，已进行新一轮扩产，年产能约 10KK。国内客户出口需求 稳定，未见明显关税影响。 Q&A 请介绍永熙公司 202 ...

Core Viewpoint - The article highlights the recent A+ round financing of Corel Technology, a semiconductor packaging equipment manufacturer, which aims to enhance product development and operational funding. The company has experienced significant growth in revenue over the past three years, doubling its scale [2][3][7]. Company Overview - Corel Technology, established in 2014, focuses on mid-to-high power IGBT/SiC module packaging equipment, providing comprehensive solutions including high-precision placement machines and fully automated micro-level insertion machines. The company emphasizes self-controlled core technology [3][4]. - The IGBT/SiC modules are essential power semiconductor devices with low energy consumption and high power characteristics, widely used in industries such as 5G communication, aerospace, new energy vehicles, and smart grids [3]. Market Growth - The global packaging and testing market for power semiconductor modules is projected to grow, with estimates indicating a market size of $89.9 billion in 2024, a 5% increase year-on-year, and a potential size of $96.1 billion by 2026, with advanced packaging expected to reach $52.2 billion, accounting for 54% of the market [3]. Product Development - Corel has developed domestic energy storage and automotive-grade IGBT module packaging equipment, capable of packaging IGBT/SiC chips into modules with specific functions and performance to meet diverse customer needs [4]. - The TP-3000-HG series high-speed placement machine achieves a placement accuracy of less than 3 microns and supports 6-inch, 8-inch, and 12-inch chip placements [4]. Client Base and Market Position - Corel's products are utilized in emerging industries such as smart consumer electronics, wind power, energy storage, electric vehicles, and high-speed rail. The company has served nearly 100 high-quality clients domestically and internationally, successfully delivering over 30 intelligent packaging lines with a yield rate exceeding 99% [7]. - Corel holds a 10% market share in the domestic market, ranking first among comprehensive line suppliers, with a client coverage rate of 50% among top-tier customers [7]. Future Plans - Over the next three years, Corel plans to continue expanding in the semiconductor packaging industry while increasing collaborations with well-known manufacturers. The company aims to integrate advanced technologies such as AI models and digital twins to enrich its product line and enter high-end markets like advanced packaging, smart medical, and automotive electronics [7]. Investor Perspective - The general manager of Zhejiang Venture Capital expressed confidence in Corel's potential, highlighting the founding team's extensive experience in the semiconductor packaging field and their contributions to the localization and automation of semiconductor equipment [8].

今日早参 2025 年 3 月 07 日 今日热点 宏观：美联储或在 3 月会议放缓缩表 我们预计 2025 年联储可能会结束缩表，但具体的时点受到美国政府触及债 务上限时点的影响。1 月美国政府触及债务上限，财政部管理现金的操作可 能干扰联储对准备金规模的判断。联储 1 月 FOMC 纪要中提及在债务上限 问题解决前可能暂停或者放缓缩表。我们认为，尽管当前各项指标显示准备 金规模仍可以认为处于充裕区间，为了避免重演 2019 年过度缩表的错误， 联储或在 3 月 FOMC 会议宣布放缓缩表，待债务上限问题解决后再评估何 时完全停止缩表，预计最终的缩表时点将被推迟到 2025 年下半年。 风险提示：联储停止缩表速度慢于预期，联储调整国债期限结构导致美债久 期风险上升。 研报发布日期：2025-03-07 研究员 胡李鹏 SAC:S0570525010001 易峘 SAC:S0570520100005 SFC:AMH263 宏观：经济主题记者会：政策落实进一步细化 3 月 6 日，人大召开经济主题记者会，发改委主任郑栅洁、商务部部长王文 涛、财政部部长蓝佛安、央行行长潘功胜、证监会主席吴清出席并回答记者 提问。 ...