公众号记得加星标⭐️，第一时间看推送不会错过。 在三星电子和SK海力士漫长而又紧密交织的历史中，罕见地出现在同一天发布财报的情况，这标志着两家公司在人工智能存储芯片领域激烈竞争的 最新进展。 预计周四的两场财报电话会议将凸显人工智能服务器和数据中心对高性能存储器需求的激增。同时，由于芯片制造商将重心转向先进存储器生产， 而忽视了传统芯片，预计财报也将反映出整个电子行业存储器价格的飙升。 存储器行业曾经以剧烈的繁荣与萧条周期为特征，如今却实现了几年前难以想象的利润，推高了整个行业的估值。自9月初以来，三星的股价已飙 升约130%，而SK海力士的股价也上涨了近两倍。 高盛亚太区首席股票策略师Timothy Moe表示，DRAM和NAND闪存的供应缺口创历史新高，这赋予了存储器制造商强大的定价权。他表示："你 们正处于超常盈利环境下，我们认为这种情况将持续今年甚至明年。"他还补充说，如果人工智能扩展到更多行业，"很有可能这一轮周期会持续更 长时间，而且势头更强劲。" 彭博社调查的分析师预计，SK海力士12月季度的营业利润翻番，达到创纪录的16.6万亿韩元（约合115亿美元）。营收预计将增长超过50%，达到 31.1 ...

公众号记得加星标⭐️，第一时间看推送不会错过。 日前，Lightmatter宣布了激光架构领域的一项突破性进展：超大规模光子学（VLSP：Very Large Scale Photonics ）。这项突破性技术应用于导 光引擎，打造了业界集成度最高的激光平台，支持前所未有的带宽，推动激光器制造从手工装配线向代工厂生产模式转变。VLSP技术利用大规模 光子集成克服了功率扩展的限制，实现了面向人工智能的光子互连路线图，初始阶段即可将光带宽密度提升8倍，并带来前所未有的部署可扩展性 和波长稳定性。 正如Lightmatter的Passage光子互连技术凭借其独特的3D架构突破了海岸线带宽的限制一样，该公司的新型Guide光引擎也代表着激光技术的巨大 飞跃。如今，超大规模数据中心中规模最大的AI集群所依赖的连接性，从根本上来说，受到了带宽密度的限制——这种限制不仅体现在芯片边缘的 I/O上，还体现在即便最先进的光子互连技术，其性能也取决于驱动它们的激光技术本身。 目前的共封装光学器件 (CPO) 和近封装光学器件 (NPO) 解决方案依赖于集成在外部激光器小型可插拔 (ELSFP) 模块中的分立式磷化铟 (InP) ...

该公司周二在一份声明中表示，第一季度营收预计在43.2亿美元至46.8亿美元之间。该预期区间的中值高于此前44.2亿美元的平均预期。第一季度 每股收益预计最高可达1.48美元，高于此前1.26美元的预期。 公众号记得加星标⭐️，第一时间看推送不会错过。 德州仪器公司(Texas Instruments Inc.)股价在盘后交易中飙升，此前该公司发布了出人意料的强劲第一季度业绩预期，表明工业设备和车辆的需求 正在从低迷期中复苏。 财报发布后，德州仪器股价在盘后交易中上涨约8%。截至周二收盘，该公司股价今年已累计上涨13%，至196.63美元。 模拟芯片可以将现实世界的输入信号转换成电子信号，广泛应用于汽车、工厂设备以及其他各种产品中。因此，德州仪器的业绩在很大程度上反映 了经济的晴雨表，能够反映企业对未来销售的信心。 乐观的展望表明，客户已经消化了积压的库存，并开始恢复采购。德州仪器首席执行官哈维夫·伊兰（Haviv Ilan）表示，订单在第四季度有所改 善。伊兰掌管着全球最大的模拟芯片制造商。 伊兰表示，数据中心业务此前在公司营收中所占比例较小，但目前正迅速扩张，并开始对公司业务做出显著贡献。他预计这一趋势将 ...

公众号记得加星标⭐️，第一时间看推送不会错过。 在日本NEPCON展会上发布的幻灯片和实物样品揭示了英特尔玻璃基板令人惊讶的内部结构。与其使用代码名称或营销术语，不如直接看懂以下工 程规格： 10-2-10 堆叠结构： 在2026年1月于东京国际展览中心举办的" NEPCON Japan 2026 "电子制造及封装技术展览会上，英特尔展出了"玻璃芯基板"，这项下一代封装技 术此前曾被传言处于"实验室阶段"甚至"已经停止研发"。此次展出表明，该公司正朝着实际应用阶段迈进。 此次发布会上亮相的是一款尺寸为 78mm x 77mm 的全尺寸原型机，它将英特尔的王牌技术——2.5D 封装技术" EMIB（嵌入式多芯片互连桥） "集成到玻璃基板上。可以说，英特尔晶圆代工凭借其"突破物理限制"的优势，正式进军由英伟达和 AMD 主导的 AI 加速器市场。 为什么现在要用玻璃？答案在于人工智能芯片尺寸增大带来的物理限制，例如翘曲和布线密度过高等。 目前，先进封装技术，例如台积电的CoWoS技术，采用硅中介层和有机基板。然而，随着芯片尺寸增大到光罩尺寸（曝光工具的照射区域）的两到 三倍，传统的有机材料（塑料树脂）由于热胀冷缩 ...

Core Viewpoint - The GPGPU industry is transitioning from merely providing computational power to ensuring that the power is efficient, reliable, and cost-effective for real-world applications, especially in the context of AI and large models [1][3]. Group 1: Industry Trends - The demand for performance in AI has surged, with model training parameters growing from billions to trillions, necessitating a shift from simply increasing GPU numbers to addressing system engineering challenges [3]. - Data centers are evolving from hardware-centric operations to focusing on efficiency, reliability, and sustainability, with key metrics including PUE, TCO, and stability becoming critical [3][4]. - The average utilization rates for inference and training scenarios are low, highlighting inefficiencies in the current growth model of computational power [3][4]. Group 2: Company Developments - Tian Shu Zhi Xin has unveiled its fourth-generation architecture roadmap, aiming to surpass NVIDIA's Hopper architecture by 20% in performance by 2025 [6]. - The company is focusing on high-efficiency, predictable, and sustainable computing power, which is essential for long-term value [4][6]. - The introduction of innovative technologies such as TPC Broadcast, Instruction Co-Exec, and Dynamic Warp Scheduling aims to enhance performance and efficiency in their new architectures [8]. Group 3: Product Launches - The company plans to release multiple chip models, including the "Tian Gai" and "Zhi Kai" series, over the next three years, with a goal of doubling processing capabilities with each generation [9]. - The newly launched "Tong Yang" series includes various models designed for edge computing, emphasizing high performance and low latency for diverse applications [10][12]. - The Tong Yang series products have demonstrated superior performance compared to NVIDIA's AGX Orin in practical tests, showcasing their competitive edge in the market [12]. Group 4: Market Positioning - Tian Shu Zhi Xin aims to establish itself as a leader in the domestic edge computing market, focusing on high-performance, cost-effective solutions that connect AI with the physical world [12][20]. - The company has achieved significant performance improvements across various sectors, including internet AI, finance, and healthcare, with notable metrics such as a 70% increase in report generation efficiency [18]. - The firm emphasizes a comprehensive ecosystem approach, integrating software and hardware solutions to enhance user experience and performance [21][23].

Core Viewpoint - The article discusses the innovative AI technology developed by Google researchers Anna Goldie and Azalia Mirhoseini, which aims to revolutionize chip design by significantly shortening the design cycle from years to weeks, creating a recursive self-improvement loop in AI and chip development [1][3]. Group 1: Company Overview - Ricursive Intelligence was founded in 2025 by Goldie and Mirhoseini after leaving Google, securing $35 million in seed funding led by Sequoia Capital, with a valuation of $750 million [3]. - The company achieved a valuation of $4 billion (approximately 28 billion RMB) by January 2026, raising $335 million (approximately 2.3 billion RMB) with fewer than 10 employees [1][3]. - Ricursive aims to create a platform that closes the feedback loop between AI and the chips it drives, addressing the bottleneck in AI development caused by lengthy chip design processes [3][5]. Group 2: Technology and Innovation - The recursive AI concept originates from Google's AutoML, which designs other machine learning algorithms, and aims to create chips that can train better AI systems, leading to a cycle of continuous improvement [2][3]. - Current chip design processes take two to three years, but Ricursive's approach could reduce this to weeks, allowing for rapid advancements in AI and hardware [3][4]. - The company plans to train AI models similar to AlphaChip, which can design semiconductor components in under six hours, compared to the years required for traditional data center processors [5]. Group 3: Market Context and Competition - Ricursive faces competition from established chip design software providers like Synopsys Inc. and Cadence Design Systems, which also offer AI capabilities to automate chip development processes [6]. - The AI chip design software market is expected to become increasingly crowded, with companies like OpenAI and Anthropic also exploring AI-driven chip design [6]. - Major tech companies like Amazon and Google have developed custom chips for AI and data centers, highlighting the growing importance of tailored chip solutions in the industry [8][9].

在目前的芯片产业，存储涨价已经成为了从业人员关注的重中之重。 据分析机构Counterpoint在此前的一份报告中所说，受人工智能和服务器容量的旺盛需求驱 动，供应商的杠杆率也达到了历史新高。预计2026年第一季度将进一步上涨40%-50%，第二 季度将上涨约20%。由此可见，存储涨价已成定局。 更有甚者，随着金银铜等金属的涨价，以及整个供应链的调整，一场牵连甚广的涨价潮正在 汹涌袭来。这必然会给全球兴起的基础设施建设浪潮带来巨大不确定性。尤其对于中国的服 务器供应商而言，在外忧内患的双重影响下，挑战更是前所未有。 存储暴涨背后：底层逻辑变了 本轮存储涨价潮，是人工智能需求飙升的结果，这是一个不争的事实。 随着大模型厂商对更大模型和更高参数有着迫切需求，且Scaling Law还没失效的当下，云厂商和 大模型企业都前赴后继的投入到基础设施的建设中去。 麦肯锡在早前的一份研究中预测道，到2030年，全球数据中心预计需要6.7万亿美元才能满足日益 增长的计算能力需求。其中，用于处理人工智能（AI）负载的数据中心预计需要5.2万亿美元的资 本支出，而用于支持传统IT应用的数据中心预计需要1.5万亿美元的资本支出。也 ...

公众号记得加星标⭐️，第一时间看推送不会错过。 随着传感器分辨率和读取速度的不断提升，传统的电子防抖技术面临着日益严峻的挑战。画面裁剪造 成的图像损伤越来越大，软件校正的痕迹也更容易被察觉，尤其是在高分辨率视频素材中。专用防抖 硬件通过在图像尚未完全恢复时进行防抖处理来解决这个问题。它还能减轻主图像处理器的计算负 担，因为主图像处理器需要处理越来越多的自动对焦、降噪和色彩信息。这种方法尤其适用于：动作 密集型拍摄、手持长焦拍摄、车载和机器人摄像机拍摄，以及对延迟零容忍的现场制作。这些场景恰 恰是电影制作人最先注意到防抖失效的地方。 索尼很少会主动宣传半导体技术，除非它想引起业界的关注。而这个案例研究恰恰表明了这一点。通 过积极展示一款新型图像稳定芯片，索尼预示着未来相机在处理运动画面方面将发生更深层次的变 革，而这远早于电影制作人在规格表上看到相关参数。 本次展示的核心是索尼半导体解决方案公司开发的专用图像稳定LSI芯片。与传统的电子防抖不同， 这款芯片的工作位置非常靠近图像传感器。它不是在图像处理完成后进行运动校正，而是在图像采集 过程中进行信号稳定。实时图像数据与来自六轴惯性测量单元的精确运动信息相结合， ...

Core Viewpoint - 澜起科技 is a leading international data processing and interconnect chip design company, focusing on high-performance, low-power chip solutions for cloud computing and artificial intelligence, with two main product lines: interconnect chips and the津逮® server platform [1]. Group 1: Product Development - 澜起科技 has launched a high-performance Active Electrical Cable (AEC) solution based on PCIe 6.x/CXL 3.x standards, aimed at supporting high bandwidth and low latency interconnect for large-scale data centers and high-performance server platforms [1][2]. - The AEC solution utilizes self-developed Retimer chips and is designed to meet the stringent requirements for high-speed signal transmission in AI and cloud computing scenarios, enhancing system maintainability through comprehensive monitoring and diagnostic features [1][2]. Group 2: Market Trends - The evolution of data centers towards distributed multi-rack architectures necessitates stable and efficient system-level interconnects, with PCIe links transitioning from rack servers to supernodes, requiring AEC technology for long-distance transmission while maintaining signal integrity [2]. - 澜起科技's AEC solution incorporates self-developed SerDes technology, innovative DSP architecture, and OSFP-XD high-density interface packaging, enabling stable support for PCIe 6.0 x16 high-speed transmission [2]. Group 3: Future Outlook - 澜起科技's president, Stephen Tai, emphasizes the importance of stable and efficient interconnect systems as data centers evolve, highlighting the company's long-term technical accumulation in high-speed interconnects and its proactive approach to market opportunities [3]. - The company has successfully completed the development and system validation of the AEC solution in collaboration with leading domestic cable manufacturers, passing interoperability tests with various devices, including CPUs, xPUs, PCIe switches, and network cards [3]. - Looking ahead, 澜起科技 plans to continue its focus on high-speed interconnect technology, actively developing next-generation products such as PCIe 7.0 Retimer chips and high-speed Ethernet PHY Retimer chips to provide comprehensive and leading interconnect solutions for global customers [3].

Core Viewpoint - The collaboration between Sandia National Laboratories and Intel on advanced memory technology (AMT) indicates a potential return of Intel to the DRAM market, amidst a booming demand driven by AI applications [1][10][11]. Group 1: Intel's Historical Context in DRAM - Intel's involvement in the DRAM market began in 1970 with the launch of the 1103 chip, which became the first commercially successful DRAM product, capturing 90% of the global market share in the 1970s [3][6]. - The company's dominance was challenged in the 1980s by Japanese manufacturers, leading to Intel's exit from the DRAM business in 1985, a decision described as a significant strategic shift in semiconductor history [6][7]. Group 2: Current Market Dynamics - The DRAM industry is experiencing a structural opportunity due to the explosive growth in demand for memory bandwidth and capacity driven by AI workloads, with predictions of a recovery to $100 billion in revenue by 2025 and $150 billion by 2029 [9][10]. - The market is expected to see a significant increase in DRAM contract prices, with general DRAM prices projected to rise by 55-60% and server DRAM prices by over 60% in Q1 2026 [9]. Group 3: AMT Project and Technological Innovations - The AMT project aims to address memory bandwidth and latency issues for critical tasks of the U.S. National Nuclear Security Administration, showcasing Intel's innovative approach to DRAM technology [1][11]. - Intel's Next Generation DRAM Bonding (NGDB) plan introduces a new memory organization and stacking method that enhances performance while reducing power consumption and costs, potentially allowing for broader application of high-bandwidth memory [11][13]. Group 4: Strategic Partnerships and New Ventures - Intel's joint venture with SoftBank, Saimemory, aims to develop low-power stacked DRAM solutions to address the limitations of HBM, with a target of achieving 512GB per chip and reducing power consumption by 40-50% [15][16]. - The project has a total investment of approximately 7 million USD, with significant backing from SoftBank and the Japanese government, highlighting Japan's strategic interest in revitalizing its semiconductor industry [16][17]. Group 5: eDRAM Technology and Future Prospects - Intel's existing expertise in embedded DRAM (eDRAM) positions it well for a return to the storage market, as eDRAM offers low latency and high bandwidth, making it suitable for AI and high-performance computing applications [19][20]. - Despite challenges in eDRAM development, advancements in semiconductor technology are expected to overcome existing limitations, further enhancing Intel's competitive edge in the storage sector [21][22]. Group 6: Conclusion and Future Outlook - Intel's recent activities suggest a multi-faceted approach to re-entering the DRAM market, balancing technological innovation with strategic partnerships [24][25]. - The evolving landscape of memory technology, driven by AI demands, presents Intel with a unique opportunity to redefine its role in the storage industry, potentially leading to a new chapter in its storied history [25].