根据中国劳动法律法规，全体员工有义务遵守公司的劳动纪律、按照公司要求完成工作。因此，全体员工应当继续执行安世国内公司的 工作指示。对于任何其他未经安世国内公司法定代表人同意的外部指示（即使通过outlook、teams等方式传送），大家有权拒绝执行 而不构成违反工作纪律或者法律规定。 今天，安世中国发布了一个致全体员工的通知。 安世中国指出，安世国内公司是运营扎根中国、战略放眼全球的中国企业，必须遵守中国法律、合法合规运营。在任何时候，安世国内 公司都是独立经营、决策的中国企业，法定代表人有权代表公司意志，并最终负责公司全部运营决策，董事、监事、高管对公司承担忠 实勤勉义务。 大家好！相信大家已经从公开信息了解到 闻泰科技 在荷兰的分支机构安世半导体（Nexperia） 受到当地政府的干预，我国商务部亦对安世半导体中 国公司及分包商发布出口管制公告。近日，中国半导体行业协会发声表示将持续关注事态发展并通过合法手段向国际社会表达关切。 2025年10月16日下午，我国商务部发言希望荷兰方坚持契约精神、纠正错误做法；同日，大家收到了以Nexperia Chief Legal Office名义发出的标题 为"Glo ...

Core Points - The European Union (EU) is implementing legislation to standardize USB-C power adapters and cables across various consumer electronics by 2028, aiming for interoperability and sustainability [2][4] - The new regulations will apply to external power supplies (EPS) with a maximum power of 240 watts, requiring at least one USB-C port and detachable cables [2][3] - Manufacturers must clearly label the rated power on the power supply, charging interface, and cables, ensuring the values reflect sustainable charging power [3] Group 1: Legislation Details - The EU's new legislation will encompass a wide range of devices, including gaming consoles, monitors, routers, and wireless chargers, promoting a common charging solution [2] - All EPS exceeding 10 watts must meet minimum energy efficiency standards, including efficiency requirements at 10% load and stricter average efficiency and no-load power consumption standards [3] - Wireless charging bases are also required to reduce standby power consumption and must have replaceable/reusable external structures to extend lifespan and reduce electronic waste [3] Group 2: Impact and Exemptions - The EU estimates that this measure will save approximately 1,070 terawatt-hours (TWh) of electricity annually by 2030, with around 400 million power devices sold each year [4] - Certain device categories are excluded from the new regulations, such as uninterruptible power supplies (UPS), medical devices, specific toys, electric scooters, and emergency lighting control devices [6] - The legislation does not prohibit manufacturers from including chargers or power adapters with their products, allowing companies like Apple and Google to continue bundling power supplies [3]

Core Viewpoint - India is making significant strides in semiconductor design, with the ability to design 2nm chips, showcasing its potential to compete with top international manufacturers [1][2]. Group 1: Technological Advancements - The Indian government emphasizes the importance of data in driving growth, likening data to "new oil" and data centers to "new refineries" [1]. - India has progressed from designing 5nm and 7nm chips to now being capable of designing 2nm chips, which are among the most complex and smallest chips available [1]. - The manufacturing of chips requires extreme precision and purity, with a loss of $200 million possible from just five minutes of power outage during production [1]. Group 2: Government Initiatives - In May 2023, the Indian government introduced a plan to support electronic component manufacturing to address critical bottlenecks in the semiconductor supply chain [2]. - The government is now covering 50% of the project costs for all manufacturing units, chip testing, and packaging units, regardless of chip size [2]. - The Indian Semiconductor Mission (ISM) was approved in 2021 with a budget of ₹760 billion to promote manufacturing, design, and production [2]. Group 3: Investment and Infrastructure - By 2025, India plans to establish its first advanced 3nm chip design center in Noida and Bangalore, marking a significant milestone in its semiconductor capabilities [2][3]. - Five production units are currently under construction, indicating a crucial step towards local chip production [3]. - The state of Madhya Pradesh has made significant progress in IT and electronics, planning to invest ₹1.5 billion over the next six years [3]. Group 4: Emerging Technologies - India is transitioning from traditional silicon-based semiconductors to the latest silicon carbide-based semiconductors, which are essential for advanced applications [3]. - The roadmap includes the introduction of advanced 3D glass packaging technology, critical for defense systems and aerospace applications [3].

Core Viewpoint - KAUST has achieved a groundbreaking milestone in chip design by creating the world's first six-layer stacked hybrid CMOS structure, setting new standards for integration density and energy efficiency in large-area electronic devices [1][2]. Group 1: Research Achievements - The research team at KAUST has successfully developed a six-layer stacked hybrid CMOS structure, surpassing the previous limit of two layers in hybrid CMOS technology [1]. - This innovation opens new possibilities for miniaturization and high-performance development of electronic devices, which is crucial for flexible electronics, smart health, and the Internet of Things (IoT) [1]. Group 2: Technical Insights - The traditional method of enhancing integration density by reducing transistor size is reaching quantum mechanical limits, prompting the need for alternative approaches such as vertical stacking of transistors [2]. - KAUST's manufacturing process maintains temperatures below 150°C, with most steps performed at room temperature, minimizing damage to underlying structures during layer addition [2]. - The team has optimized the manufacturing process to achieve smoother surfaces between layers and precise alignment for optimal connectivity, significantly improving the vertical stacking technique [2].

Core Insights - The global storage market is experiencing simultaneous shortages in DRAM, NAND flash, and HDD products, a situation unprecedented in the last 30 years according to ADATA's chairman [1] - Major cloud service providers (CSPs) like OpenAI, Google, Amazon, and Microsoft are now the primary competitors for storage manufacturers, shifting the traditional supply chain dynamics [1] - The focus of storage manufacturers has shifted towards high-value products like HBM and DDR5, leading to a significant reduction in available chips for module manufacturers [2] Group 1: DRAM Market Dynamics - The shortage of DDR4 is expected to last for at least two years, as major manufacturers have nearly halted its production, fulfilling only minimal contractual obligations [2] - The price of DDR4 16Gb has surged approximately 44% in three months and over 413% compared to a year ago, while DDR5 16Gb prices increased by about 83% in just one month [2] Group 2: NAND Flash and HDD Market Trends - The NAND flash market, previously oversupplied, is now heating up due to a shortage of HDDs, forcing companies to purchase more expensive enterprise-grade SSDs [3] - TrendForce predicts a 5% to 10% average price increase for NAND in Q4 due to the surge in SSD orders resulting from HDD production cuts [3] Group 3: Long-term Market Outlook - The current storage crisis driven by AI is fundamentally different from past cyclical fluctuations, indicating a structural demand shift that could sustain a new era of market prosperity until at least 2026 [3]

Core Insights - The article discusses the evolution of data center networking in the era of AI, highlighting the shift from traditional computing chips to the importance of networking in AI model training, particularly with the introduction of NVIDIA's Spectrum-X Ethernet switch [1][5][12]. Group 1: Importance of Networking in AI - The performance of data centers has historically relied on advancements in computing chips, but the advent of AI has redefined the entire computing architecture, emphasizing the need for efficient networking [1]. - In AI model training, communication delays and bandwidth bottlenecks between GPUs have become critical constraints, necessitating the use of thousands of GPUs in parallel to handle large models [1][5]. - The design goals for AI networks focus on minimizing tail latency and ensuring that the slowest node does not hinder overall performance, which is a significant departure from traditional Ethernet performance metrics [5][10]. Group 2: Features of Spectrum-X - Spectrum-X introduces several enhancements to Ethernet for AI applications, including lossless Ethernet, adaptive routing, and congestion control, which are essential for maintaining high performance during AI training [5][6][10]. - The technology employs RoCE for CPU bypass communication, ensuring end-to-end lossless transmission, and utilizes hardware-level telemetry for real-time network status reporting [6][11]. - Spectrum-X's adaptive routing and packet scheduling techniques help manage large data flows effectively, preventing network congestion and maintaining linear scalability in AI clusters [10][12]. Group 3: Industry Impact - The introduction of Spectrum-X represents a strategic shift in the Ethernet networking industry, as NVIDIA integrates multiple components into a cohesive ecosystem, challenging traditional network vendors [13][14]. - Companies that have historically relied on Ethernet standards, such as Broadcom and Cisco, may face significant challenges as NVIDIA's AI-optimized features become integral to data center operations [14][15]. - The competitive landscape is shifting, with traditional network equipment suppliers and emerging interconnect startups needing to adapt to the new AI-driven networking paradigm established by NVIDIA [16][18]. Group 4: InfiniBand vs. Spectrum-X - InfiniBand remains the dominant choice for high-performance computing, offering ultra-low latency and lossless networking, which are critical for AI training at scale [20][21]. - While InfiniBand is characterized by its closed ecosystem, the emergence of Spectrum-X aims to provide similar performance levels within an open Ethernet framework, appealing to a broader range of cloud and enterprise customers [22][24]. - The ongoing development of the Ultra Ethernet Consortium indicates a push from various industry players to create new open standards that can compete with the performance of InfiniBand [22].

Group 1 - Broadcom, a chip giant with a market capitalization of $1.65 trillion, recently conducted layoffs primarily affecting sales, customer success, customer management, and solutions departments [2] - The exact number of layoffs remains unclear, but Broadcom has been implementing rolling layoffs, including significant cuts to its recently acquired software company VMware, which has seen its workforce reduced by about half [2] - Broadcom has benefited significantly from the AI boom by designing chips for AI technologies, having first surpassed a $1 trillion market cap at the end of last year [2] Group 2 - This week, Broadcom signed a strategic agreement with OpenAI to provide a customized AI accelerator with a capacity of 10 gigawatts (GW) [2] - The company has been continuously raising prices for VMware products following the acquisition [2] - Broadcom has not responded to media requests for comments regarding the layoffs [2]

公众号记得加星标⭐️，第一时间看推送不会错过。 来 源： 内容来自CNBC 。 今年7月，埃隆·马斯克（Elon Musk）在名为 Colossus 2 的 xAI 数据中心内部拍摄的照片在其社交 平台 X 上发布。这家人工智能初创公司计划将其打造成位于田纳西州孟菲斯的一座庞大超级计算设 施。 马斯克在 X 上发布的照片中，并没有展示那些装满强大图形处理器（GPU）的昂贵英伟达机架。相 反，他重点展示了服务器背后的电线，其中一张图片显示，成千上万根整齐排列的紫色电缆将计算机 连接在一起。 这些紫色电缆是 Credo 的标志性产品。这是一家总部位于硅谷、成立17年的半导体公司，其名字很 少与人工智能热潮的领导者并列提及。 但华尔街已经注意到了它。 Credo 的股价今年已上涨一倍多，达到 143.61 美元，此前在 2024 年飙升了 245%。这家公司的市 值在 2022 年首次公开募股时约为 14 亿美元，如今已接近 250 亿美元。 Credo 正努力将自己定位为这场万亿美元规模的人工智能基础设施扩张中的关键供应商之一，并在资 金向下游流动的过程中受益。 上周五，摩根大通的分析师开始对该公司进行覆盖，给予 ...

Core Insights - The 2025 Bay Area Semiconductor Industry Expo successfully concluded in Shenzhen, attracting over 600 exhibitors and more than 112,300 attendees over three days, showcasing approximately 2,500 new products [1][4][17] - The event emphasized a dual-track approach focusing on core and specialty sectors, providing a comprehensive view of the entire semiconductor industry chain [2][3] Exhibition Highlights - The expo featured major global players from over 20 countries, including top companies like AMAT, Lam Research, and KLA, alongside prominent domestic firms such as North Huachuang and Shanghai Microelectronics [3] - A differentiated layout was implemented, covering key areas such as chip design, wafer manufacturing, and advanced packaging, while also highlighting emerging sectors like AI chips and RISC-V ecosystems [3][4] New Product Launches - The event served as a platform for significant product launches, with Shenzhen Wanliyan Technology unveiling the world's first 90GHz real-time oscilloscope, marking a 500% performance improvement over previous domestic models [5][6] - Other notable launches included EDA design software by Qiyunfang Technology and various semiconductor components from companies like Hangzhou Zhongxin and Ningxia Dunyuan [6] Industry Forums and Discussions - The expo hosted over 30 specialized forums, including the 2025 Chip Conference, featuring discussions led by industry experts on topics such as core technology breakthroughs and ecosystem collaboration [9][12] - Forums addressed the entire semiconductor value chain, linking technology supply with market demand, and included sessions on advanced lithography and AI chip development [12] Market Engagement and Collaboration - The event facilitated significant market interactions, with around 5,000 professional buyers from leading companies like Samsung and BYD participating, enhancing connections between domestic and international resources [14] - The establishment of the Shenzhen Advanced Manufacturing Supply Chain Innovation Service Platform and a semiconductor fund aimed to inject momentum into the Bay Area's semiconductor industry [12][14] Awards and Recognition - The 2025 "Bay Chip Award" recognized over 100 companies based on votes from 3.7828 million professionals, highlighting excellence in various categories including technology innovation and customer service [15] Future Outlook - The success of the expo has led to high demand for the 2026 event, with over 600 companies already reserving exhibition space, indicating a growing interest in the semiconductor sector [17] - The Bay Area semiconductor industry is positioned for rapid development, driven by innovation and collaboration, contributing to global semiconductor advancements [17]

Core Insights - Broadcom is poised to capitalize on the growing demand for co-packaged optics (CPO) in data centers, leveraging its extensive expertise in optical communications acquired through strategic acquisitions [2][3] - The company has made significant advancements in its CPO technology, particularly with the introduction of the Tomahawk series of Ethernet switch ASICs, which promise improved reliability, reduced power consumption, and lower costs [3][5] CPO Technology Development - Broadcom's first-generation "Humboldt" Tomahawk 4 CPO switch chip, launched in January 2021, has a total switching capacity of 25.6 Tbps and features four optical engines providing 12.8 Tbps bandwidth, with power consumption of approximately 6.4 watts per 800 Gb/s port [5] - The second-generation "Bailly" CPO switch ASIC, based on the 51.2 Tbps Tomahawk 5 chip, began shipping in 2023 and has shown a 14.1% reduction in power consumption compared to its predecessor, with 800 Gb/s ports consuming only 5.5 watts [8][9] Reliability and Performance - Meta Platforms has reported successful testing of the Bailly CPO switch, achieving over 1 million device hours without any link jitter, indicating high reliability and performance in real-world applications [13][15] - The average mean time between failures (MTBF) for the optical links in the Bailly CPO system supports the operation of large AI clusters, ensuring that interconnect failures do not become a bottleneck [16][21] Future Innovations - The upcoming "Davisson" TH6 CPO device is expected to further enhance performance, featuring a 102.4 Tbps ASIC with the capability to connect up to 512 ports at 200 Gb/s, significantly improving scalability for AI workloads [9][10] - Davisson's design allows for field-replaceable laser modules, enhancing maintenance and reliability, with power consumption for 800 Gb/s ports reduced to approximately 3.5 watts, a 36.4% decrease compared to the previous generation [10][19] Cost Efficiency - Transitioning from traditional pluggable optical modules to CPO technology can lead to substantial cost savings in power consumption, with estimates suggesting a reduction in operational costs for large-scale deployments [19][23] - The potential savings from adopting CPO technology could cover the costs of additional GPU accelerators, highlighting the financial benefits of improved energy efficiency [19][21]