Core Viewpoint - Advanced packaging has become a critical battleground for foundries and packaging companies amid the slowdown of Moore's Law and the explosive demand for AI/HPC solutions. Major players globally, including TSMC, Samsung, ASE, and domestic firms like JCET, Tongfu Microelectronics, and Huatian Technology, are accelerating capacity expansion to seize this key industry opportunity in the coming years [1]. Group 1: Market Trends and Projections - The global advanced chip packaging market is expected to grow from $50.38 billion in 2025 to $79.85 billion by 2032, with a compound annual growth rate (CAGR) of 6.8% [1]. - The demand for high-performance, low-power packaging solutions is driven by AI large models, autonomous driving, cloud computing, and edge computing [1]. Group 2: TSMC's Strategy and Expansion - TSMC's advanced packaging revenue is projected to exceed 10% in 2024, surpassing ASE to become the largest packaging supplier globally, driven by the surge in CoWoS demand [3]. - TSMC plans to invest an additional $100 billion in the U.S., including two advanced packaging plants in Arizona, expected to start construction in the second half of next year and enter mass production by 2028 [5]. - TSMC is set to launch CoWoS-L in 2026 and SoW-X in 2027, enhancing its capabilities significantly in the AI/HPC era [6]. Group 3: Samsung's Cautious Approach - Samsung has adopted a more cautious stance compared to TSMC, previously shelving a $7 billion advanced packaging facility due to uncertain customer demand [7]. - Recent contracts with Tesla and Apple highlight the necessity for Samsung to reconsider its advanced packaging investments [7][8]. - Samsung's integrated model of "memory + foundry + packaging" positions it well for future demand once customer needs become clearer [8]. Group 4: ASE's Expansion and Technological Advancements - ASE is enhancing its advanced packaging capabilities in Kaohsiung, focusing on CoWoS, SoIC, and FOPLP technologies [9]. - ASE's new K18B factory in Kaohsiung will serve AI and HPC demands, while the K28 factory will expand CoWoS testing capacity [9][10]. - ASE's technology evolution includes advancements in 3D Advanced RDL technology, which is crucial for various applications [10][11]. Group 5: Amkor's U.S. Investment - Amkor is expanding its advanced packaging facility in Peoria, Arizona, with a total investment of $2 billion, expected to create over 2,000 jobs [13]. - The new facility will primarily support TSMC's CoWoS and InFO technologies, establishing a local closed-loop for wafer manufacturing and packaging [14]. - Amkor's expansion aligns with U.S. semiconductor policies, emphasizing the need for a complete backend capability to maintain competitiveness in AI and HPC [14]. Group 6: Domestic Players' Development - JCET, Tongfu Microelectronics, and Huatian Technology are rapidly advancing in the advanced packaging sector, each developing unique strategies [15]. - JCET is focusing on various advanced packaging technologies and plans to invest 8.5 billion yuan in 2025, targeting high-performance applications [16][17]. - Tongfu Microelectronics has deepened its partnership with AMD, becoming its largest packaging supplier, and is making significant progress in large-size FCBGA technology [18][19]. - Huatian Technology is exploring CPO technology and has achieved significant growth in revenue, indicating a shift towards system integration in advanced packaging [20][21].

Observing TSMC's SiC Strategy ：SiC Enters the Advanced Packaging Mainstage 观察台积电的碳化硅战略：碳化硅进入先进封装的 主舞台 Original Articles By SemiVision Research (Nvidia ,TSMC, Globalwafers, Wolfspeed) SemiVision Research 原创文章（英伟达、台积电、环球晶圆、Wolfspeed） SEP 21, 2025 2025 年 9 月 21 日 ∙ PAID ∙ 付费 SEMIVISION 7 Share 分享 20 shorten the power path and reduce PDN impedance, enabling faster voltage response. ASE, through its VIPack and FOCoS-Bridge (with TSV) platforms, is optimizing PDN, signal interconnects, and thermal performance sim ...

公众号记得加星标⭐️，第一时间看推送不会错过。 在摩尔定律趋缓、AI/HPC需求爆发的背景下，先进封装已成为晶圆代工厂与封测企业的必争之 地。全球范围内，从台积电到三星，从日月光到安靠，以及国内的长电科技、通富微电、华天科 技，几乎所有龙头厂商都在加快扩产，力争抢占这一未来数年最关键的产业高地。 据 Coherent Market Insights (CMI) 数 据 ， 全 球 先 进 芯 片 封 装 市 场 规 模 预 计 将 从 2025 年 的 503.8 亿美元增长至 2032 年的 798.5 亿美元，复合年增长率达 6.8%。这一趋势背后，是 AI 大模型、自动驾驶、云计算与边缘计算对高性能、低功耗封装解决方案的迫切需求。 台积电：全力冲刺， 3DFabric架构统合前后端 在台积电的版图中，先进封装地位正快速上升。据伯恩斯坦预测，随着 CoWoS 需求井喷，台积电 2024 年先进封装营收占比有望突破 10%，首次超越日月光，跃升为全球最大封装供应商。 在 9 月的 TSMC OIP 生态论坛上，台积电强调 3DFabric平台的战略意义：通过晶圆级工艺 + 3D 堆 叠 (SoIC) + 先 ...

公众号记得加星标⭐️，第一时间看推送不会错过。 近年来，随着芯片制程工艺不断向前演进，"摩尔定律"的迭代进度逐渐放缓。曾经依靠制程迭 代实现晶体管密度翻倍、性能提升的传统路径，如今受限于物理极限与成本激增的双重挑战， 单纯依赖制程突破的发展模式渐显乏力。 在此背景下，半导体行业开始积极探索"后摩尔时代"的破局方向，先进封装技术凭借独特价值迅速成 为业界焦点。尤其是随着AI芯片对超高算力、低延迟的迫切需求，以及Chiplet异构集成技术的兴 起，先进封装不再只是芯片的"保护壳"，更成为实现系统级性能跃升的关键载体。 与传统的封装技术相比，先进封装技术具有灵活性强、集成密度高、尺寸小、性能好等优势，主要包 括倒装芯片封装、晶圆级封装、系统级封装和2.5D、3D封装等技术。 据Yole Group预测，2030年全球先进封装市场规模将突破794亿美元，2024-2030年复合年增长率 （CAGR）达9.5%，AI与高性能计算需求成为拉动复苏的首要动能。市场潜力之下，行业厂商争相 布局，推动先进封装赛道成为驱动产业变革的新引擎。 代工三巨头，鏖战先进封装 在先进封装这一关键赛道，台积电、英特尔、三星等厂商作为先进封装 ...

Group 1 - SEMICON Taiwan 2025 will focus on AI, CoWoS advanced packaging, and testing mass production progress from September 10-12 [1] - The semiconductor industry is facing bottlenecks in process miniaturization, with heterogeneous integration and advanced packaging emerging as breakthrough directions [1] - Demand for AI, high-performance computing (HPC), and HBM is increasing, making advanced packaging technologies like 3D IC and panel-level fan-out packaging core to semiconductor innovation [1] Group 2 - TSMC's CoWoS, InFO, and SoIC advanced packaging technologies are applicable for AI and HPC chips, with CoWoS already in mass production [1] - NVIDIA and AMD have strong ongoing demand for CoWoS, while Apple requires TSMC's InFO technology for high-end processors [1] - TSMC is expanding its CoWoS and InFO advanced packaging lines in the U.S. due to strong demand and U.S. government support for domestic semiconductor manufacturing [1] Group 3 - TSMC announced a $100 billion investment in advanced semiconductor manufacturing in the U.S., totaling $165 billion, which includes two advanced packaging facilities [2] - TSMC aims to balance the supply-demand gap for CoWoS advanced packaging, with expected monthly capacity exceeding 90,000 to 95,000 pieces by the end of 2026 [2] - Non-TSMC CoWoS capacity is projected to reach 12,000 pieces monthly by the end of next year, with nearly 60% of overall annual capacity still supplied to NVIDIA [2]

Core Viewpoint - Amkor Technology is set to build a $2 billion advanced packaging and testing facility in Peoria, Arizona, expected to begin production in early 2028, marking a significant step in the U.S. semiconductor supply chain [2][3] Group 1: Facility and Investment - The new facility will occupy 104 acres and aims to address the bottleneck in semiconductor packaging, which has been a limiting factor for companies like Nvidia in producing AI chips [2] - The project received approval from the Peoria City Council on August 29, with plans modified to utilize a larger site in the city's innovation core [2] Group 2: Industry Context - The facility represents a major shift in the U.S. semiconductor landscape, as it aims to catch up with the advanced packaging capabilities predominantly held by Taiwan and South Korea [2] - Amkor's new plant will support high-performance packaging platforms, including TSMC's CoWoS and InFO technologies, which are critical for Nvidia's data center GPUs and Apple's latest chips [3] Group 3: Strategic Partnerships and Support - TSMC has signed a memorandum to transfer its packaging operations from its Phoenix fab to Amkor, reducing the turnaround time for wafers that currently takes weeks to return from Asia [3] - The expansion is partially funded by the CHIPS Act, which includes $407 million and federal tax incentives, aimed at maintaining the U.S. position in the increasingly complex chip industry [3] Group 4: Challenges Ahead - Despite the progress, the opening date in 2028 indicates that the industry may continue to face challenges, particularly in alleviating GPU shortages and AI server bottlenecks, which still rely on established Asian packaging lines [3] - Amkor faces a significant workforce challenge, with an estimated shortage of 70,000 to 90,000 workers needed for all planned U.S. fabs, highlighting the ongoing talent crisis in the semiconductor sector [3]

Core Viewpoint - TSMC is accelerating its expansion in the United States, planning to establish two advanced packaging plants (AP1, AP2) with construction expected to start in the second half of 2026 and operational by 2028, in response to local demand for AI and HPC chip packaging [2][3]. Group 1: Expansion Plans - TSMC's second wafer fab (P2) in the U.S. is set to introduce 2nm process technology earlier than initially planned, while the advanced packaging plants are located directly across from P3, with construction now expedited to 2026 [2][3]. - The company aims to build two new advanced packaging facilities and a research center in Arizona, enhancing the AI supply chain [2][3]. Group 2: Technology and Production - AP1 will incorporate SoIC and CoW technologies, while AP2 is focused on CoPoS, which is expected to mature by 2028 [3][4]. - SoIC is currently TSMC's most advanced packaging technology, already in mass production for clients like AMD, Apple, and NVIDIA [3][4]. Group 3: Investment and Market Impact - TSMC announced a $100 billion investment in the U.S., which includes the construction of three wafer fabs, two advanced packaging facilities, and a research center, marking the largest single foreign direct investment in U.S. history [6][7]. - The establishment of advanced packaging lines in the U.S. is driven by the needs of major clients such as Apple, NVIDIA, and AMD, with a focus on CoWoS and InFO technologies [6][8]. Group 4: Supply Chain Considerations - The construction of advanced packaging facilities requires a complete supply chain, including materials and testing capabilities, which may take at least four years to establish [7][8]. - TSMC's expansion in the U.S. could impact the existing packaging and testing supply chain in Taiwan, necessitating a mature ecosystem for testing and packaging [8][9].

Investment Rating - The report initiates coverage of K&S (KLIC US) with a Buy rating, and BE Semiconductor (BESI NA) with a Neutral rating, while maintaining a Buy rating on ASMPT (522 HK) [3][6][11]. Core Insights - Advanced packaging (AP) is expected to evolve significantly from 2025 onwards, with a shift from CoWoS-S to CoWoS-L/R, increased adoption of SoIC driven by HBM5, and potential upgrades in InFO technology led by Apple [3][6]. - The semiconductor cycle's recovery is a key catalyst for K&S and ASMPT, given their substantial sales exposure to conventional packaging [3][6]. CoWoS Technology - CoWoS technology is transitioning from CoWoS-S to CoWoS-L, with TSMC expected to increase its CoWoS-L capacity from approximately 20% in 2024 to nearly 60% in 2025 [7][21]. - CoWoS-S is anticipated to face oversupply due to non-TSMC supply chain expansions, while CoWoS-L is expected to be in demand for high-end GPUs [7][28]. SoIC Technology - SoIC is projected to gain importance with the adoption of high-NA EUV technology, although headwinds are expected in 2025 due to limited new adopters and potential capex constraints from Intel [8][14]. - AMD is currently the major adopter of SoIC, with potential future demand driven by Apple and HBM technologies [8][14]. InFO Technology - Apple is likely to adopt upgraded InFO technology from 2026 onwards, necessitating capacity upgrades to accommodate new application processor designs [9][20]. - The transition from InFO-PoP to InFO-M is expected as the I/O count between DRAM and application processors becomes insufficient [9][20]. Company-Specific Insights - K&S is positioned to be the primary TCB supplier for TSMC's on-wafer process starting in 2025, benefiting from the shift towards CoWoS-L technology [3][6]. - ASMPT is expected to gain market share in the HBM market from a low base, with its TCB potentially adopted by TSMC and Apple in the future [3][6]. - BE Semiconductor faces challenges due to rich valuations and potentially disappointing hybrid bonding orders in 2025 [3][6].

如果您希望可以时常见面，欢迎标星收藏哦~ 2024年，AI引发的芯片需求全面爆发，半导体产业结构性转型持续演进。在这一年，台积电 再次交出了一份亮眼答卷：不仅巩固了其技术领先地位，还在产能、营收、客户结构与全球 战略布局方面全面开花，成为当前全球最具战略纵深的半导体企业。 透过其刚刚发布的2024年年报，我们可以更清晰地看到：在这场以AI为主引擎的产业变革 中，台积电正以技术为根基、制造为核心、生态为延伸，持续构筑属于自己的"护城河"。 AI爆发年，台积电"稳稳赢麻" 2024年，尽管全球经济仍充满不确定性，传统消费电子市场复苏缓慢，但AI相关芯片的需求却持 续强劲，推动晶圆代工行业走出低谷，重回成长轨道。台积电成为最大受益者之一。 年报显示，2024年台积电全年合并营收达900亿美元，同比增长30%；税后净利达365亿美元，同 比大幅增长35.9%。毛利率达到56.1%，营业利益率达45.7%，皆创历史新高。 作为全球晶圆代工产业的龙头，台积电已经在业内建立起不可动摇的地位。台积电在IDM 2.0产业 （包括了封装、测试和光罩制造等更多环节）中 占据34%的市场份额 ，较2023年的28%显著提 升，进一步 ...

随着台积电拿走芯片制造更多利润，产业风险也在进一步聚集。 文丨 邱豪 贺乾明 编辑丨龚方毅 1990 年代，硅谷诞生数十家只设计、不制造的芯片公司（Fabless）。AMD 创始人杰瑞·桑德斯（Jerry Sanders）在一场行业会议上说："现在听我说，真正的 男人要有晶圆厂"。他认为，只做设计的芯片公司，只能在晶圆厂有空余产能时才能下单，还得把设计图纸无保留地交给竞争对手，容易让公司陷入困境。 十多年后，芯片行业沿着桑德斯预想的糟糕情况发展。按照他的标准，当前最强的一批芯片公司——苹果、英伟达、博通、高通等，都不是 "真男人"。AMD 也变成一家纯设计芯片的公司，经历多年阵痛后，在女性 CEO 苏姿丰带领下走出困境。 晶圆厂依旧重要，只是没几家能建得起最先进的。台积电保持绝对优势，生产全球 60% 的逻辑芯片、90% 的 5 纳米以内先进芯片。先进芯片制造领域，台积 电仅剩的两个对手各有各的困境： 与此同时，台积电董事长魏哲家在二季度财报电话会上提出 "Foundry 2.0" 的概念，称台积电的业务范围覆盖先进芯片的制造、封装、测试等流程。芯片设计 公司只要给台积电递交设计文件（GDS），几个月后就能收 ...