周二，SanDisk Corp.的股价飙升了28%，创下自2月份以来的最佳表现。此前，英伟达公司首席执行 官黄仁勋在CES科技展上发表讲话，强调了内存和存储的必要性。 公众号记得加星标⭐️，第一时间看推送不会错过。 该股势头强劲，2026年前三个交易日涨幅超过47%，自4月22日触底以来累计飙升1080%。周二，该 股成为标普500指数中表现最佳的股票，紧随其后的是存储公司西部数据和希捷科技，这两家公司的 股价均实现了两位数的百分比涨幅。 黄仁勋周一在CES上表示："就存储而言，这目前是一个完全未被开发的市场。这是一个从未存在过 的市场，而且很可能成为全球最大的存储市场，它将承载全球人工智能的工作记忆。" 内存价格一直在稳步上涨。本周早些时候，《韩国经济日报》报道称，三星电子和SK海力士计划在 今年第一季度将服务器DRAM价格较去年第四季度上涨60%至70%。 美国银行分析师Wamsi Mohan及其团队在1月4日发给客户的一份报告中指出，SanDisk和其他存储设 备公司被视为2026年"人工智能推理和边缘人工智能"发展趋势的"主要受益者"。Mohan预计，企业 将出于训练、分析和合规等目的保留越来越多的数 ...

Core Viewpoint - Nvidia's CEO Jensen Huang emphasized the need for timely product releases, including the Blackwell and Rubin chips, to maintain competitiveness in the Chinese market, especially as the H200 product awaits sales approval in China [1][2]. Group 1: Market Dynamics - Nvidia is facing increasing competition from Chinese rivals, including Huawei and various startups, which Huang described as "strong competitors" [1]. - The Chinese tech market is vibrant, with many startups achieving significant growth, indicating a robust industry [2]. Group 2: Product Development and Approval - Nvidia has ramped up production of the H200 chips for the Chinese market while awaiting approval from both Washington and Beijing [2]. - The company is actively working on securing U.S. export licenses for the H200, with CFO Colette Kress stating that the U.S. government is making efforts to expedite this process [2]. Group 3: Sales Strategy and Expectations - Huang anticipates that procurement orders will clarify the situation regarding H200 sales, expecting no major announcements but rather a focus on orders from buyers [3]. - Following the tightening of AI chip export restrictions by the Biden administration, Nvidia introduced the H20 chip, a scaled-down version of the H100, specifically for the Chinese market [3]. - Nvidia agreed to pay 15% of H20 sales revenue to the U.S. government as part of the conditions for selling downgraded chips to China [3].

Core Viewpoint - The successful listing of Wallen Technology marks a significant milestone for domestic GPU companies, highlighting the critical need for China to establish its own computing power supply capabilities in the context of AI becoming a key driver of the global economy [1][22]. Market Overview - The global intelligent computing chip market is projected to grow from $6.6 billion in 2020 to $119 billion by 2024, with a compound annual growth rate (CAGR) of 106%, and expected to reach $585.7 billion by 2029, maintaining a CAGR of 37.5% from 2024 to 2029 [2]. - China's intelligent computing chip market is anticipated to reach $201.2 billion by 2029, with a CAGR of 46.3% from 2024 to 2029, significantly outpacing the global average [3]. Competitive Landscape - The intelligent computing chip market is highly concentrated, with NVIDIA dominating globally, while the top two players in China are expected to hold 94.4% of the market share by 2024, leaving over 15 participants with less than 1% each [3][4]. - In the GPGPU sector, the top two players are projected to account for 98% of the market share in 2024, indicating a significant concentration of power [4]. Technological Innovation - Wallen Technology adopts a Chiplet architecture, which allows for greater flexibility, scalability, and cost efficiency, addressing the challenges of rising costs and declining yields in traditional single-chip designs [6][10]. - The BR166 GPGPU chip, utilizing Chiplet technology, demonstrates a twofold improvement in key performance metrics compared to its predecessor, the BR106 [6][9]. System-Level Delivery - Wallen Technology emphasizes its system-level delivery capabilities rather than just chip performance, positioning itself as a provider of comprehensive intelligent computing solutions rather than merely a GPU supplier [10][13]. - The company has developed a complete hardware ecosystem that includes PCIe, OAM, and server products, along with a self-developed software platform to optimize performance and manage large-scale GPGPU clusters [12][13]. Financial Performance - Wallen Technology's revenue grew from 62 million yuan in 2023 to 336.8 million yuan in 2024, representing a growth of over 400%, with continued growth into 2025 [16][17]. - The company recorded gross profits of 47.4 million yuan and 179.2 million yuan in 2023 and 2024, respectively, with gross margins of 76.4% and 53.2% [18]. Research and Development - Wallen Technology has maintained high R&D expenditures, with 1.018 billion yuan in 2022, 886 million yuan in 2023, and 827 million yuan in 2024, reflecting a commitment to innovation in a capital-intensive industry [19][21]. - The company is advancing its next-generation flagship data center chip, BR20X, expected to be commercialized in 2026, which aims to enhance efficiency in large model training and inference [21]. Conclusion - The success of Wallen Technology's listing and its strategic focus on engineering solutions and system-level delivery reflect a broader trend in the Chinese GPU industry towards achieving self-sufficiency in computing power, essential for supporting the digital economy [22].

公众号记得加星标⭐️，第一时间看推送不会错过。 在2026年国际消费电子展（CES）上，AMD展示了即将推出的Venice系列服务器CPU和MI400系列 数据中心加 速器。AMD 曾在 2025年6月的"Advancing AI" 活动上介绍过 Venice 和MI400系列的规 格，但此次是AMD首次公开展示这两个产品线的芯片。 首先，Venice 处理器最显著的变化在于其 CCD 与 I/O 芯片的封装方式有所不同。AMD 自 EPYC Rome 以来一直使用封装的有机基板来连接 CCD 和 I/O 芯片，而 Venice 似乎采用了一种更先进的 封装方式，类似于 Strix Halo 或 MI250X。另一个变化是，Venice 似乎配备了两个 I/O 芯片，而不 是之前 EPYC CPU 的单个 I/O 芯片。 Venice 芯片包含 8 个 CCD，每个 CCD 有 32 个核心，因此每个 Venice 封装最多可容纳 256 个核 心。对每个芯片进行测量后发现，每个 CCD 的 N2 硅面积约为 165 平方毫米。如果 AMD 坚持每个 核心配备 4MB 的 L3 缓存，那么每个 CCD 就包含 ...

Core Insights - The article discusses the rapid evolution of the semiconductor industry, particularly in the context of artificial intelligence (AI) and custom chip development, predicting significant changes by 2026 [1][2]. Group 1: AI and Custom Chips - By 2026, the shipment of custom-designed chips (ASICs) is expected to surpass that of GPUs, driven by the need for data center operators to invest heavily to avoid falling behind [1]. - The performance metrics for chips will evolve beyond just floating-point operations to include interconnects, memory, and compilers, which will determine overall performance [1]. - The demand for AI-driven virtual twin simulations and model-based systems engineering (MBSE) will enable companies to optimize designs digitally, reducing reliance on physical prototypes [2]. Group 2: Market Dynamics and Trends - The global semiconductor sales reached $772 billion in the previous year, with a projected growth of 26% to $975 billion by 2026, and some analysts predicting a stronger annual growth rate of 30% [5]. - The AI data center market is expected to grow to $1.2 trillion by 2030, with a significant portion of this growth (approximately $900 billion) coming from AI accelerator chips like GPUs and custom processors [5]. Group 3: Competitive Landscape - NVIDIA currently holds a dominant position in the AI chip market with an estimated market share of 90%, and this is unlikely to change significantly by 2026 [2][3]. - AMD may become more competitive with the release of its MI400 series and the maturation of its ROCm software stack, but its success remains uncertain [3]. - The pricing of GPUs is on a downward trend, yet the increasing demand for AI workloads means that the total cost of AI infrastructure will continue to rise [3]. Group 4: Interconnect Technologies - High-speed interconnect technologies will gain renewed focus in modern data centers to support AI and machine learning workloads [3][4]. - Co-packaged optics (CPO) technology, developed by NVIDIA and Broadcom, is crucial for high bandwidth density interconnects in AI-driven architectures [4].

Core Viewpoint - The strong demand for memory chips has led South Korean companies Samsung and SK Hynix to increase server DRAM prices by 60-70% for cloud service providers like Microsoft, AWS, and Google, despite a projected 2.6% decline in South Korea's system semiconductor exports this year [1]. Group 1: Market Dynamics - Samsung and SK Hynix are expected to see their operating profits increase by 1.5 to 2 times this year, reaching approximately 150 trillion KRW (about 100 billion USD) due to the "super boom" in memory chips [1]. - Major clients are anticipated to accept the price hikes, as investments in AI infrastructure are deemed "affordable," leading to limited pushback against DRAM price increases [1]. Group 2: Semiconductor Industry Trends - The Korean Trade Association (KITA) forecasts that South Korea's system semiconductor exports will reach 48.2 billion USD this year, with memory semiconductor exports expected to grow by 9.6%, rising from 114 billion USD to 125 billion USD [2]. - The demand for high-value semiconductors, such as high bandwidth memory (HBM), is being driven by the proliferation of artificial intelligence (AI), which is also boosting traditional memory chip demand [2]. Group 3: Structural Changes in the Semiconductor Market - The share of integrated device manufacturers (IDMs) in South Korea's semiconductor market is projected to decline from 70% in 2021 to 56% by 2024, while the share of fabless semiconductor companies is expected to rise from approximately 30% to around 45% [2]. - Despite the growth in fabless semiconductor companies, their sales account for only about 1% of the global market [2].

Core Viewpoint - Teradar has launched its first flagship terahertz sensor, named Summit, which aims to fill the gap left by traditional radar and lidar sensors, offering high performance in all weather conditions [1][10]. Group 1: Product Features and Technology - The Summit sensor is designed to operate in the terahertz frequency range, which has not been fully utilized, and features a solid-state design with no moving parts [1][4]. - Teradar claims that its sensor can provide 20 times the resolution of traditional automotive radar and maintains performance in adverse weather conditions [11][12]. - The modular design of the sensor allows customization for specific Advanced Driver Assistance Systems (ADAS) or autonomous driving needs, with an expected price range in the hundreds of dollars [7][8]. Group 2: Market Context and Competition - The launch of Teradar's sensor comes at a time when automotive sensor suppliers are facing challenges, including the bankruptcy of Luminar after losing contracts with major automakers [2]. - Chinese companies are aggressively entering the lidar market, with plans to produce over 1 million lidar sensors by 2025, increasing competition for Teradar [2]. - Other U.S. companies in the lidar space are diversifying into robotics and smart infrastructure, indicating a shift in market focus [2]. Group 3: Partnerships and Future Prospects - Teradar has secured $150 million in Series B funding, with investments from Lockheed Martin's venture capital arm and VXI Capital, indicating strong interest in its technology [2][5]. - The company is collaborating with five major automotive manufacturers and three tier-one suppliers to validate its technology, with plans to begin shipping the Summit sensor in 2028 [1][10]. - Teradar's technology is positioned as a complementary or alternative solution to existing sensor suites, addressing the limitations of current sensor technologies [10][13].

公众号记得加星标⭐️，第一时间看推送不会错过。 日前，TI发布了使用5nm工艺打造的自动驾驶汽车的"大脑"TDA5，也是德州仪器(TI)全新解决方案 的核心。应用这款芯片，即可构建"边缘AI"环境，将每秒运算速度从10万亿次(1 TOPS；1 TOPS为 每秒1万亿次运算)提升至高达1200万亿次(1200 TOPS)。TI表示，这使得车辆即使在面对复杂多变的 道路环境时，也能快速分析数据并做出响应，从而实现L3级自动驾驶。 能效也是一大优势。该芯片每瓦功耗 (W) 可支持 24 TOPS 的计算能力。德州仪器 (TI) 处理器产品 机构部门负责人（副总裁）Roland Schupfli 表示："对于电动汽车而言，单次充电续航里程是一项关 键指标，因此需要功耗更低、性能更高的芯片。"他补充道："TDA5 拥有业界最佳的能效。" 为了实现低功耗、高性能的 TDA5 芯片，德州仪器集成了其神经处理单元 (NPU) 产品 C7。副总裁 Schupfli 表 示 ： " 我 们 在 保 持 功 耗 相 近 的 情 况 下 ， 实 现 了 比 上 一 代 产 品 高 出 12 倍 的 AI 计 算 性 能。"他还补充道 ...

Core Viewpoint - Nvidia's next-generation Rubin AI chip has entered full production and is set to launch in the second half of 2026, amid concerns about a potential "AI bubble" and the sustainability of large-scale AI infrastructure [1][3] Group 1: Rubin AI Chip Details - The Rubin GPU's inference performance is five times that of Blackwell, while its training performance is 3.5 times better, with inference token costs potentially reduced by up to 10 times [2][11] - The Rubin architecture features 336 billion transistors and can deliver 50 petaflops of performance when processing NVFP4 data, compared to Blackwell's maximum of 10 petaflops [2][11] - Rubin's training speed has increased by 250%, reaching 35 petaflops, with part of its computational power coming from an updated Transformer Engine module [2][3] Group 2: Market and Strategic Positioning - Nvidia's CEO Jensen Huang emphasized the timely launch of Rubin due to the explosive growth in AI training and inference demands, marking a significant step towards the next frontier in AI [3] - The company anticipates that its advanced Blackwell and Rubin chips will generate $500 billion in revenue by 2026, even without the Chinese or other Asian markets [5] - Nvidia has formed partnerships with several manufacturers and robotics companies, including BYD and Boston Dynamics, to expand AI applications in the physical world [5][6] Group 3: Technical Specifications and Innovations - Rubin will be the first GPU to integrate HBM4 memory chips, achieving a data transfer speed of 22 TB/s, significantly higher than Blackwell [3][10] - Each Rubin GPU is equipped with eight HBM4 memory stacks, providing 288GB of capacity and 22 TB/s bandwidth, essential for meeting the high computational demands of AI [7][12] - The NVLink 6 technology enhances inter-GPU communication, increasing bandwidth to 3.6 TB/s, which is crucial for the efficiency of large language models [7][12] Group 4: Future Developments and Ecosystem Readiness - Nvidia plans to release the Vera Rubin NVL72 AI supercomputer, which will consist of six types of chips, including the Vera CPU and Rubin GPU, designed for optimal performance in AI data centers [6][9] - The company is preparing its ecosystem for the adoption of the Vera-Rubin architecture, with cloud service providers like Microsoft Azure and CoreWeave set to be among the first to offer cloud computing services powered by Rubin [3][4]

Core Insights - The demand for higher capacity flash memory is driven by the growing storage needs at the edge and in the cloud [1] - 3D NAND flash technology is advancing rapidly, with new generations offering 50% faster read/write speeds, 40% higher bit density, lower latency, and improved energy efficiency [1] - Innovations in etching technology, such as low-temperature etching, are crucial for reducing energy consumption and carbon emissions in the semiconductor industry [1] Group 1: 3D NAND Flash Technology - 3D NAND flash manufacturers stack and connect storage cells using increasingly smaller and deeper channels, achieving remarkable production speeds [1] - Major producers of 3D NAND chips include Samsung Electronics, Western Digital, Toshiba's Kioxia, and SK Hynix, who increase the number of word lines by 30% with each generation [2] - The transition from 2D to 3D NAND has led to a focus on vertical construction, allowing for more compact designs and increased bit storage per cell [5] Group 2: Etching Technology - The etching process for NAND flash faces challenges in maintaining vertical profiles while ensuring reasonable etching rates [2] - AI plays a significant role in optimizing etching profiles, which directly impacts NAND flash performance metrics such as read/write speed and programming/erase efficiency [2] - Low-temperature etching techniques are being explored to enhance etching rates and reduce carbon emissions, with estimates suggesting an 84% reduction in greenhouse gas emissions compared to traditional methods [12] Group 3: Manufacturing Challenges and Innovations - The introduction of low-k dielectric materials and air gaps is being researched to mitigate inter-cell interference and improve data retention [18][19] - The complexity and cost of manufacturing increase as manufacturers aim for higher stacking layers and tighter dimensional control [10][11] - AI-assisted optimization methods are being developed to reduce wafer consumption during the early stages of process development, significantly lowering costs and accelerating product development timelines [16]