公众号记得加星标⭐️，第一时间看推送不会错过。 美国商务部长霍华德·卢特尼克威胁要对外国存储芯片制造商——特别是韩国的三星电子和SK海力士——征收100%的关税，除非它们承诺在美国建 设相关设施。业内人士普遍认为，这一威胁并不现实。 高昂的劳动力成本、熟练工人短缺以及不发达的制造业生态系统，使得美国与代工厂相比，并不适合大规模生产通用存储芯片。代工厂在与客户协 商价格条款后才开始生产芯片，因此可以将较高的生产成本部分转嫁到合同价格中。相比之下，存储芯片是预先生产并直接在公开市场上销售的标 准化商品。 由于这种结构性差异，存储器制造的盈利能力并非取决于性能（供应商之间的性能差异很小），而是取决于价格。因此，降低成本是存储器制造商 最重要的考量因素。正因如此，绝大多数存储器生产仍然集中在韩国两家芯片制造商的本土，而海外生产难以获得合理性，且主要局限于中国—— 中国已经具备成本竞争力和成熟的产业生态系统。 卢特尼克的言论也与早前的美韩贸易协定相悖，该协定中，华盛顿承诺给予韩国的半导体关税待遇不低于其他主要贸易伙伴（例如台湾）的待遇。 李在明总统对卢特尼克的威胁不以为然，他援引了此前达成的协议以及此类关税对美国半导体 ...

公众号记得加星标⭐️，第一时间看推送不会错过。 在三星电子和SK海力士漫长而又紧密交织的历史中，罕见地出现在同一天发布财报的情况，这标志着两家公司在人工智能存储芯片领域激烈竞争的 最新进展。 预计周四的两场财报电话会议将凸显人工智能服务器和数据中心对高性能存储器需求的激增。同时，由于芯片制造商将重心转向先进存储器生产， 而忽视了传统芯片，预计财报也将反映出整个电子行业存储器价格的飙升。 存储器行业曾经以剧烈的繁荣与萧条周期为特征，如今却实现了几年前难以想象的利润，推高了整个行业的估值。自9月初以来，三星的股价已飙 升约130%，而SK海力士的股价也上涨了近两倍。 高盛亚太区首席股票策略师Timothy Moe表示，DRAM和NAND闪存的供应缺口创历史新高，这赋予了存储器制造商强大的定价权。他表示："你 们正处于超常盈利环境下，我们认为这种情况将持续今年甚至明年。"他还补充说，如果人工智能扩展到更多行业，"很有可能这一轮周期会持续更 长时间，而且势头更强劲。" 彭博社调查的分析师预计，SK海力士12月季度的营业利润翻番，达到创纪录的16.6万亿韩元（约合115亿美元）。营收预计将增长超过50%，达到 31.1 ...

该公司周二在一份声明中表示，第一季度营收预计在43.2亿美元至46.8亿美元之间。该预期区间的中值高于此前44.2亿美元的平均预期。第一季度 每股收益预计最高可达1.48美元，高于此前1.26美元的预期。 公众号记得加星标⭐️，第一时间看推送不会错过。 德州仪器公司(Texas Instruments Inc.)股价在盘后交易中飙升，此前该公司发布了出人意料的强劲第一季度业绩预期，表明工业设备和车辆的需求 正在从低迷期中复苏。 财报发布后，德州仪器股价在盘后交易中上涨约8%。截至周二收盘，该公司股价今年已累计上涨13%，至196.63美元。 模拟芯片可以将现实世界的输入信号转换成电子信号，广泛应用于汽车、工厂设备以及其他各种产品中。因此，德州仪器的业绩在很大程度上反映 了经济的晴雨表，能够反映企业对未来销售的信心。 乐观的展望表明，客户已经消化了积压的库存，并开始恢复采购。德州仪器首席执行官哈维夫·伊兰（Haviv Ilan）表示，订单在第四季度有所改 善。伊兰掌管着全球最大的模拟芯片制造商。 伊兰表示，数据中心业务此前在公司营收中所占比例较小，但目前正迅速扩张，并开始对公司业务做出显著贡献。他预计这一趋势将 ...

Core Viewpoint - Lightmatter has made a breakthrough in laser architecture with the introduction of Very Large Scale Photonics (VLSP), which enhances bandwidth density by 8 times and enables a shift from manual assembly to factory production for laser manufacturing [2][4]. Group 1: VLSP Technology and Its Impact - VLSP technology utilizes large-scale photonic integration to overcome power expansion limitations, establishing a roadmap for photonic interconnects aimed at artificial intelligence [2][8]. - The Guide VLSP light engine reduces the number of components associated with discrete laser modules, improving yield and reliability while allowing for significant bandwidth expansion [4][9]. - The first generation of the Guide verification platform achieves 100 Tbps switch bandwidth in a compact 1RU chassis, compared to traditional ELSFP modules that require approximately 18 modules and occupy 4RU of rack space [4][9]. Group 2: Challenges with Current Solutions - Current co-packaged optical devices (CPO) and near-packaged optical devices (NPO) rely on discrete InP laser diodes integrated into external ELSFP modules, facing power bottlenecks due to thermal damage and contamination [3][8]. - The traditional approach of increasing InP laser output power to enhance performance is becoming impractical due to the limitations of discrete laser technology [8]. Group 3: Future Prospects and Market Opportunities - The transition to co-packaged optical devices (CPO) is becoming a key driver for next-generation AI-scale networks, with Lightmatter's VLSP innovation representing a fundamental shift in optical interconnect power supply methods [4][9]. - The scalable laser technology roadmap established by Lightmatter is expected to support ultra-large-scale CPO deployments over the next decade, capturing significant opportunities in the laser market [4][9].

Core Viewpoint - Intel's exhibition of the "glass core substrate" at the NEPCON Japan 2026 indicates a significant advancement towards practical application of this next-generation packaging technology, previously thought to be in the experimental phase or halted [2] Group 1: Technology and Innovation - The glass core substrate addresses physical limitations caused by increasing chip sizes, such as warping and high wiring density, which traditional organic materials struggle to manage [4] - The glass substrate has a thermal expansion coefficient (CTE) close to silicon, minimizing deformation under heat, and its smooth surface allows for finer circuit manufacturing compared to organic substrates [4] - Intel's glass substrate features a 10-2-10 stacked structure with 20 layers, designed to handle the complex signal routing required for AI chips [6] Group 2: Specifications and Performance - The glass core thickness is 800 microns (0.8 mm), ensuring mechanical strength and rigidity for large data center packages [7] - A 45μm bump pitch has been achieved, significantly enhancing the I/O density between the chip and substrate, which is difficult to realize with organic substrates [8] - The silicon chip installation area is approximately 1,716 square millimeters, providing a large and flat surface suitable for multiple large GPU chips and high bandwidth memory (HBM) [9] Group 3: Competitive Landscape - Intel's emphasis on "no SeWaRe" indicates that the company has overcome the challenges of micro-cracking and breakage during the manufacturing process, ensuring the robustness needed for mass production [9] - The integration of EMIB (Embedded Multi-die Interconnect Bridge) into the glass substrate aims to balance cost and performance, providing a competitive alternative to TSMC's next-generation multi-chip AI accelerator CoWoS [10]

Core Viewpoint - The GPGPU industry is transitioning from merely providing computational power to ensuring that the power is efficient, reliable, and cost-effective for real-world applications, especially in the context of AI and large models [1][3]. Group 1: Industry Trends - The demand for performance in AI has surged, with model training parameters growing from billions to trillions, necessitating a shift from simply increasing GPU numbers to addressing system engineering challenges [3]. - Data centers are evolving from hardware-centric operations to focusing on efficiency, reliability, and sustainability, with key metrics including PUE, TCO, and stability becoming critical [3][4]. - The average utilization rates for inference and training scenarios are low, highlighting inefficiencies in the current growth model of computational power [3][4]. Group 2: Company Developments - Tian Shu Zhi Xin has unveiled its fourth-generation architecture roadmap, aiming to surpass NVIDIA's Hopper architecture by 20% in performance by 2025 [6]. - The company is focusing on high-efficiency, predictable, and sustainable computing power, which is essential for long-term value [4][6]. - The introduction of innovative technologies such as TPC Broadcast, Instruction Co-Exec, and Dynamic Warp Scheduling aims to enhance performance and efficiency in their new architectures [8]. Group 3: Product Launches - The company plans to release multiple chip models, including the "Tian Gai" and "Zhi Kai" series, over the next three years, with a goal of doubling processing capabilities with each generation [9]. - The newly launched "Tong Yang" series includes various models designed for edge computing, emphasizing high performance and low latency for diverse applications [10][12]. - The Tong Yang series products have demonstrated superior performance compared to NVIDIA's AGX Orin in practical tests, showcasing their competitive edge in the market [12]. Group 4: Market Positioning - Tian Shu Zhi Xin aims to establish itself as a leader in the domestic edge computing market, focusing on high-performance, cost-effective solutions that connect AI with the physical world [12][20]. - The company has achieved significant performance improvements across various sectors, including internet AI, finance, and healthcare, with notable metrics such as a 70% increase in report generation efficiency [18]. - The firm emphasizes a comprehensive ecosystem approach, integrating software and hardware solutions to enhance user experience and performance [21][23].

Core Viewpoint - The article discusses the innovative AI technology developed by Google researchers Anna Goldie and Azalia Mirhoseini, which aims to revolutionize chip design by significantly shortening the design cycle from years to weeks, creating a recursive self-improvement loop in AI and chip development [1][3]. Group 1: Company Overview - Ricursive Intelligence was founded in 2025 by Goldie and Mirhoseini after leaving Google, securing $35 million in seed funding led by Sequoia Capital, with a valuation of $750 million [3]. - The company achieved a valuation of $4 billion (approximately 28 billion RMB) by January 2026, raising $335 million (approximately 2.3 billion RMB) with fewer than 10 employees [1][3]. - Ricursive aims to create a platform that closes the feedback loop between AI and the chips it drives, addressing the bottleneck in AI development caused by lengthy chip design processes [3][5]. Group 2: Technology and Innovation - The recursive AI concept originates from Google's AutoML, which designs other machine learning algorithms, and aims to create chips that can train better AI systems, leading to a cycle of continuous improvement [2][3]. - Current chip design processes take two to three years, but Ricursive's approach could reduce this to weeks, allowing for rapid advancements in AI and hardware [3][4]. - The company plans to train AI models similar to AlphaChip, which can design semiconductor components in under six hours, compared to the years required for traditional data center processors [5]. Group 3: Market Context and Competition - Ricursive faces competition from established chip design software providers like Synopsys Inc. and Cadence Design Systems, which also offer AI capabilities to automate chip development processes [6]. - The AI chip design software market is expected to become increasingly crowded, with companies like OpenAI and Anthropic also exploring AI-driven chip design [6]. - Major tech companies like Amazon and Google have developed custom chips for AI and data centers, highlighting the growing importance of tailored chip solutions in the industry [8][9].

在目前的芯片产业，存储涨价已经成为了从业人员关注的重中之重。 据分析机构Counterpoint在此前的一份报告中所说，受人工智能和服务器容量的旺盛需求驱 动，供应商的杠杆率也达到了历史新高。预计2026年第一季度将进一步上涨40%-50%，第二 季度将上涨约20%。由此可见，存储涨价已成定局。 更有甚者，随着金银铜等金属的涨价，以及整个供应链的调整，一场牵连甚广的涨价潮正在 汹涌袭来。这必然会给全球兴起的基础设施建设浪潮带来巨大不确定性。尤其对于中国的服 务器供应商而言，在外忧内患的双重影响下，挑战更是前所未有。 存储暴涨背后：底层逻辑变了 本轮存储涨价潮，是人工智能需求飙升的结果，这是一个不争的事实。 随着大模型厂商对更大模型和更高参数有着迫切需求，且Scaling Law还没失效的当下，云厂商和 大模型企业都前赴后继的投入到基础设施的建设中去。 麦肯锡在早前的一份研究中预测道，到2030年，全球数据中心预计需要6.7万亿美元才能满足日益 增长的计算能力需求。其中，用于处理人工智能（AI）负载的数据中心预计需要5.2万亿美元的资 本支出，而用于支持传统IT应用的数据中心预计需要1.5万亿美元的资本支出。也 ...

公众号记得加星标⭐️，第一时间看推送不会错过。 随着传感器分辨率和读取速度的不断提升，传统的电子防抖技术面临着日益严峻的挑战。画面裁剪造 成的图像损伤越来越大，软件校正的痕迹也更容易被察觉，尤其是在高分辨率视频素材中。专用防抖 硬件通过在图像尚未完全恢复时进行防抖处理来解决这个问题。它还能减轻主图像处理器的计算负 担，因为主图像处理器需要处理越来越多的自动对焦、降噪和色彩信息。这种方法尤其适用于：动作 密集型拍摄、手持长焦拍摄、车载和机器人摄像机拍摄，以及对延迟零容忍的现场制作。这些场景恰 恰是电影制作人最先注意到防抖失效的地方。 索尼很少会主动宣传半导体技术，除非它想引起业界的关注。而这个案例研究恰恰表明了这一点。通 过积极展示一款新型图像稳定芯片，索尼预示着未来相机在处理运动画面方面将发生更深层次的变 革，而这远早于电影制作人在规格表上看到相关参数。 本次展示的核心是索尼半导体解决方案公司开发的专用图像稳定LSI芯片。与传统的电子防抖不同， 这款芯片的工作位置非常靠近图像传感器。它不是在图像处理完成后进行运动校正，而是在图像采集 过程中进行信号稳定。实时图像数据与来自六轴惯性测量单元的精确运动信息相结合， ...

Core Viewpoint - 澜起科技 is a leading international data processing and interconnect chip design company, focusing on high-performance, low-power chip solutions for cloud computing and artificial intelligence, with two main product lines: interconnect chips and the津逮® server platform [1]. Group 1: Product Development - 澜起科技 has launched a high-performance Active Electrical Cable (AEC) solution based on PCIe 6.x/CXL 3.x standards, aimed at supporting high bandwidth and low latency interconnect for large-scale data centers and high-performance server platforms [1][2]. - The AEC solution utilizes self-developed Retimer chips and is designed to meet the stringent requirements for high-speed signal transmission in AI and cloud computing scenarios, enhancing system maintainability through comprehensive monitoring and diagnostic features [1][2]. Group 2: Market Trends - The evolution of data centers towards distributed multi-rack architectures necessitates stable and efficient system-level interconnects, with PCIe links transitioning from rack servers to supernodes, requiring AEC technology for long-distance transmission while maintaining signal integrity [2]. - 澜起科技's AEC solution incorporates self-developed SerDes technology, innovative DSP architecture, and OSFP-XD high-density interface packaging, enabling stable support for PCIe 6.0 x16 high-speed transmission [2]. Group 3: Future Outlook - 澜起科技's president, Stephen Tai, emphasizes the importance of stable and efficient interconnect systems as data centers evolve, highlighting the company's long-term technical accumulation in high-speed interconnects and its proactive approach to market opportunities [3]. - The company has successfully completed the development and system validation of the AEC solution in collaboration with leading domestic cable manufacturers, passing interoperability tests with various devices, including CPUs, xPUs, PCIe switches, and network cards [3]. - Looking ahead, 澜起科技 plans to continue its focus on high-speed interconnect technology, actively developing next-generation products such as PCIe 7.0 Retimer chips and high-speed Ethernet PHY Retimer chips to provide comprehensive and leading interconnect solutions for global customers [3].