Core Viewpoint - TSMC is expected to become the world's largest packaging supplier, surpassing ASE, with advanced packaging revenue projected to account for 10% of total revenue this year due to the surge in demand for AI chips using CoWoS technology [1] Group 1: CoWoS Technology Development - TSMC's recent technology seminar highlighted the next steps in CoWoS technology, indicating a potential technological revolution and intense cross-industry competition [1] - The new CoWoS structure will integrate more functionalities, including an integrated voltage regulator (IVR), which is a significant advancement over previous designs [3][4] - The IVR will be embedded within the silicon interposer, presenting technical challenges in terms of size and performance requirements [5] Group 2: Industry Implications - TSMC's dominance in advanced packaging could threaten the existence of independent power module suppliers like Delta and Infineon, as their products may be integrated into TSMC's CoWoS solutions [4][8] - The shift towards integrating more functions into chips could lead to a reshuffling of market positions among suppliers in the data center market, with Nvidia and TSMC taking the lead [8][9] Group 3: Power Supply Architecture - The power requirements for future AI servers are substantial, with single racks potentially consuming up to 1MW, necessitating a complete overhaul of power supply architectures [8] - TSMC and Nvidia are promoting an 800V high-voltage direct current (HVDC) power system to improve efficiency and reduce heat generation in AI data centers [8] - The transition to this new power architecture may lead to significant changes in supplier relationships, as companies like Infineon prioritize their own needs over external sales [9]

公众号记得加星标⭐️，第一时间看推送不会错过。 来源：内容 综合自 tomshardware 。 此前一位美国国会议员宣布了一项法案，要求高性能人工智能处理器生产商对其产品进行地理追踪， 以限制中国等未经授权的外国行为者对其产品的使用。阿肯色州参议员汤姆·科顿（Tom Cotton）随 后在本周晚些时候提出了一项立法措施。该法案涵盖的硬件远不止人工智能处理器，并将赋予商务部 长核实硬件位置的权力，并对商业公司实施强制性的位置管控。更复杂的是，高性能显卡也必须具备 地理追踪功能。 如果该法案获得立法者支持，将授权商务部和国防部联合进行一项为期一年的研究，以确定未来可能 采取的额外保护措施。除初步研究外，这两个部门还必须在法案颁布后连续三年进行年度评估。这些 评估必须评估适用于出口管制产品的最新安全技术进展。基于这些评估，两部门可以决定是否应实施 新的要求。 https://www.tomshardware.com/pc-components/gpus/u-s-inks-bill-to-force-geo-tracking-tech-for-gpus-and-servers-high-end-gaming-gpu ...

Core Viewpoint - Modern automobiles are evolving into "data centers on wheels," necessitating high-performance computing that can operate reliably under harsh conditions for 10-15 years [1][2]. Group 1: Automotive Computing Needs - The automotive industry requires not only mobility but also autonomy, safety, and continuous software updates, leading to a sustained demand for high-performance computing [1]. - The environment in which automotive systems operate is fundamentally different from that of data centers or smartphones, necessitating robust design [1]. Group 2: Role of imec - imec is positioned at the forefront of integrating mobility and microelectronics, leveraging Europe's strong automotive tradition and semiconductor strategy [2]. - The organization is conducting cutting-edge research to prepare for automotive-grade industrial applications, focusing on advanced packaging, chip architecture, and system integration [2]. Group 3: Chiplet Technology - Chiplet technology, which consists of small modular processing units, is being considered for automotive applications to meet the performance demands of autonomous and connected vehicles [3]. - The advantages of Chiplet include higher yield, cost-effectiveness, architectural flexibility, and heterogeneous integration, although challenges remain regarding long-term reliability in harsh environments [3]. Group 4: Sensor Development - imec's SENSAI project is advancing next-generation sensor technologies, including CMOS cameras and solid-state LiDAR, to enhance vehicle intelligence [4][5]. - A digital twin framework is being developed to simulate sensor configurations, helping to reduce costs and accelerate development without the need for physical prototypes [4]. Group 5: Collaborative Ecosystem - A collaborative ecosystem is essential for the successful integration of chips and sensors in vehicles, as highlighted by imec's STAR program, which aims to standardize interfaces and protocols among automotive manufacturers and semiconductor companies [5]. - The STAR program is focused on establishing consensus through workshops and forums to lay the groundwork for economies of scale in the automotive sector [5].

Core Viewpoint - The Chinese integrated circuit industry is undergoing a "dual-line war," facing challenges from both advanced process technology and the demand for AI computing power, necessitating a restructuring of chip architecture [1] Group 1: Event Overview - The Fifth China Integrated Circuit Design Innovation Conference and IC Application Ecosystem Exhibition (ICDIA 2025) will take place on July 11-12 at the Suzhou Jinji Lake International Conference Center, focusing on the future of the semiconductor industry [1] - The conference will gather over 500 chip design companies, 200 terminal application enterprises, 150 AI and system solution providers, and more than 3,000 professional attendees [2] Group 2: Key Discussions and Presentations - High-level forums will feature discussions on AI-driven heterogeneous integration and the semiconductor market forecast for 2025, with insights from industry leaders [4] - The conference will also present the "2025 China Integrated Circuit Talent Development Research Report," highlighting the anticipated talent gap in the semiconductor sector [5][6] Group 3: Industry Trends and Innovations - The slowdown of Moore's Law is pushing the computing industry towards a critical turning point, with new technologies like 3D packaging and Chiplet technology emerging as key solutions [7] - Future computing power evolution will rely on multi-dimensional innovations rather than single-dimensional technological advancements, presenting a historic opportunity for the Chinese chip industry [9] Group 4: Collaboration and Development - The integration of academia, industry, and research is crucial, with various institutions and companies collaborating to redefine the landscape of AI and automotive chips [10] - The current low domestic production rate of automotive chips (less than 15%) highlights the need for a cohesive industry chain from design to testing [10][12] Group 5: Exhibition Highlights - The ICDIA exhibition will showcase China's IC innovation achievements, AI frontier technologies, and local industry applications across four major exhibition areas [13][15]

公众号记得加星标⭐️，第一时间看推送不会错过。 来源：内容来自 spectrum 。 通过模拟大脑的运行方式，神经形态处理器在某些应用场景下比传统技术能显著降低能耗。如今，荷 兰公司Innatera推出了号称全球首款商用的神经形态微控制器，旨在推动这一新兴技术的大规模市场 应用。 Innatera表示，其新芯片Pulsar可将延迟降低至传统处理器的百分之一，并在人工智能应用中仅消耗 其五百分之一的功耗。Innatera联合创始人兼CEO Sumeet Kumar表示："目前大多数AI加速器都面 临性能与功耗之间的权衡，要么运行简化的AI模型以降低功耗，要么提高精度但增加能耗。而Pulsar 不需要任何妥协。" 神经形态芯片模拟大脑功能 神经形态设备在多个方面模仿大脑的工作方式。例如，传统微芯片使用固定节奏的时钟信号来协调电 路动作，而神经形态架构则常通过"脉冲"来工作，即在一定时间内接收到足够输入信号后才会产生输 出。 神经形态技术的关键应用之一，是用于实现受大脑启发的神经网络，也就是如今主流的AI系统。此 外，脉冲式神经形态设备发射脉冲的频率很低，因此传输的数据量远少于运行传统神经网络的电子系 统。因此，理 ...

近几年时间里，NPU成为了AI浪潮中意外爆火的芯片之一，除了人手一部的智能手机外，愈来愈多 的笔记本电脑也开始内置NPU，在厂商不断吹捧AI功能的背后，都离不开NPU的助力。 近几年时间里，NPU成为了AI浪潮中意外爆火的芯片之一，除了人手一部的智能手机外，愈来愈多 的笔记本电脑也开始内置NPU，在厂商不断吹捧AI功能的背后，都离不开NPU的助力。 然而，对于大多数人而言，NPU仍然是一个相对陌生的概念。它与我们熟悉的CPU、GPU有何不 同？为什么在AI时代突然变得如此重要？ 这个看似神秘的芯片，其实有着深厚的技术积淀和清晰的发展脉络，要理解NPU为何能在短短几年内 从实验室的概念验证走向大规模商用，我们不妨从它最初的起源开始。 NPU的诞生 传统的中央处理器（CPU）在数学运算与逻辑控制方面表现卓越，但其工作原理与人脑运行机制存在 根本差异。CPU采用串行指令处理方式，而人脑则依托数以千亿计的神经元实现并行激活与实时响 应。这种架构差异使得CPU在模拟类脑计算时效率低下，难以胜任复杂的智能任务。 NPU的设计理念则另辟蹊径。它并非简单模拟大脑功能，而是从结构层面汲取灵感——通过硬件级并 行处理架构，重新定 ...

Core Viewpoint - Major cloud service providers and Nvidia's clients are beginning a long "divorce" process, focusing on developing their own ASIC chips to reduce dependence on Nvidia's expensive hardware and software ecosystem [1][2]. Group 1: Market Trends - The procurement of Application-Specific Integrated Circuits (ASICs) is expected to grow at a compound annual growth rate (CAGR) of 50%, primarily driven by companies like Microsoft, Google, and Amazon AWS [1]. - Nvidia's hardware, particularly the Blackwell architecture B200 GPU, is widely used in data centers, but its high cost (ranging from $70,000 to $80,000 per chip) is prompting clients to seek alternatives [1]. Group 2: Client Strategies - Core cloud computing clients of Nvidia are increasing their orders for ASIC hardware while still purchasing Nvidia products, indicating a gradual shift towards hardware autonomy [2]. - Companies like Amazon and Google are heavily investing in self-developed chips, with Amazon reportedly running about 50% of its new servers on its AWS Graviton Arm processor family [3]. Group 3: Industry Dynamics - Nvidia is forming partnerships with various ASIC manufacturers through its NVLink Fusion program, allowing seamless collaboration between Nvidia hardware and third-party ASIC servers [3]. - TSMC, as a major foundry for both Nvidia's hardware and the ASIC chips of large cloud clients, is positioned to benefit significantly from this trend [3].

Group 1 - Vietnam is rapidly emerging as a significant player in the global semiconductor market, supported by strategic government initiatives, substantial foreign direct investment (FDI), and increasing global demand for semiconductors. The semiconductor supply chain market in Vietnam is projected to reach $31.28 billion by 2027, with a compound annual growth rate (CAGR) of approximately 11.6% from 2023 to 2027 [1] - By 2024, the value of Vietnam's semiconductor industry is expected to be around $18.23 billion, primarily driven by foreign enterprises such as Intel, Amkor Technology, and Hana Micron, which have established large-scale operations in the country [1] - The Vietnamese government has set an ambitious semiconductor industry development strategy aiming to establish at least 100 chip design companies and one semiconductor manufacturing plant by 2030, with a long-term goal of exceeding $100 billion in annual output by 2050 [2] Group 2 - The electric vehicle (EV) market in Vietnam is becoming a significant growth opportunity for the semiconductor industry, with domestic and global automakers accelerating their investments in the region. Global EV sales have increased by 35% year-on-year, and it is expected that by 2035, EVs will account for 50% of new car sales [2] - Vietnam's AI ecosystem is also rapidly developing, contributing to the demand for semiconductors, with FPT Group announcing a $200 million investment in collaboration with Nvidia to enhance capabilities in AI and semiconductors [3] - Vietnam faces challenges such as a shortage of skilled talent, with only about 6,000 semiconductor engineers available, while the demand is estimated at 150,000 per year. The government aims to train approximately 50,000 semiconductor engineers by 2030 [3] Group 3 - The rapid expansion of Vietnam's semiconductor industry is driven by government initiatives, strategic foreign partnerships, and global demand. Vietnam's geographical proximity to China, competitive labor costs, and political stability position it favorably in the trend of supply chain diversification [4] - The success of Vietnam's semiconductor ambitions hinges on upgrading infrastructure, cultivating a skilled workforce, and achieving differentiation in a competitive regional landscape [4] - India is also making significant strides in its semiconductor industry, with a $21 billion investment plan aimed at establishing itself as a key player in the global chip supply chain, particularly in assembly, testing, marking, and packaging (ATMP) [5][6]

Core Viewpoint - The article discusses the evolution and various standards of USB technology, highlighting the importance of understanding different USB protocols and their corresponding performance indicators. Group 1: USB Evolution - USB was introduced in the late 1990s as a universal interface, replacing multiple types of ports and significantly changing computer usage [1] - USB 2.0, released in April 2000, offered a transmission speed of 480 Mbps, a substantial increase from USB 1.1's 12 Mbps, making it suitable for high-bandwidth peripherals [5][6] - USB 3.0, launched in November 2008, increased the maximum speed to 5 Gbps (625 MB/s), marking a significant upgrade over USB 2.0 [9] - USB 3.1 Gen 2 doubled the speed to 10 Gbps (1250 MB/s) in 2013, with further updates leading to USB 3.2 Gen 2x2 supporting 20 Gbps [13][16] - USB4, introduced in 2019, provided a major upgrade with a theoretical maximum bandwidth of 40 Gbps (5000 MB/s) [19] - USB4 Version 2.0, launched in 2022, further increased the speed to 80 Gbps (10000 MB/s) [21] Group 2: USB Standards and Icons - USB Implementers Forum (USB-IF) created a set of icons to help users identify the supported protocols and performance of USB ports [2] - The USB PD (Power Delivery) standard allows for power delivery of up to 100W, with the latest version supporting up to 240W [29] - DisplayPort Alternate Mode allows USB-C ports to support video output, but is gradually being replaced by USB4 and Thunderbolt standards [33][34] Group 3: Thunderbolt Technology - Thunderbolt is not USB but uses USB-C connectors and has cross-compatibility with USB, making it relevant for users to understand [24] - The latest Thunderbolt version supports speeds up to 80 Gbps, comparable to USB4 [25]

Core Viewpoint - Leading smartphone manufacturers are facing challenges related to local generative AI, standard smartphone functionalities, and increasing data interactions between mobile devices and the cloud, which put pressure on computing and power consumption [1][3]. Group 1: Mobile SoC Design Challenges - High-end smartphones utilize heterogeneous architectures in their System on Chip (SoC) designs, where multiple modules perform different tasks collaboratively [3]. - The rapid evolution of AI networks and diverse AI model requirements complicate mobile SoC design, necessitating support for both large-scale cloud models and efficient local models [3][4]. - The integration of AI capabilities into chips is becoming less challenging due to advancements in tools and processes over the past five to ten years [6]. Group 2: AI Processing and Architecture - The design focus is shifting towards optimizing power consumption in parallel processing of graphics, general computing, and AI operations [5]. - AI accelerators in mobile SoCs may include GPUs, NPUs, or high-end ASICs, with NPU becoming central for low-power tasks [7][8]. - The rise of multimodal models and generative AI tools adds complexity to design, requiring flexible and efficient computing structures [10]. Group 3: Local vs. Cloud Processing - Local processing of AI applications, such as facial recognition and photo editing, is preferred to reduce latency and enhance data privacy [13]. - Despite the increase in local AI processing, some tasks still need to be executed in the cloud due to battery and power limitations [13]. - The balance between local and cloud processing will be an ongoing challenge as AI models become more efficient [13]. Group 4: Key Trends in Mobile SoC Design - Three key trends driving changes in mobile SoC design include rising analog demands, the proliferation of visual and AI applications, and the high-performance computing requirements of modern applications [15]. - Designers must consider both hardware and software perspectives to remain competitive, emphasizing the need for collaborative efforts across disciplines [15].