如果您希望可以时常见面，欢迎标星收藏哦~ SK海力士计划在年内获得客户认证，并从明年第一季度开始批量出货。该产品将提供两种容量类 型——512 GB和1TB。 SK海力士总裁兼首席开发官安铉表示，SK海力士计划在年内完成面向消费者和数据中心的321层 4D NAND 固 态 硬 盘 的 开 发 。 " 我 们 正 致 力 于 构 建 具 有 AI 技 术 优 势 的 产 品 组 合 ， 以 巩 固 我 们 在 NAND领域作为全栈AI内存供应商的地位。" 来源：内容来自 sk hynix ，谢谢 。 SK海力士22日宣布，已开发出采用全球最高层数321层、1Tb三位元储存单元（TLC）4D NAND 快闪记忆体的UFS 4.1解决方案产品，应用于行动装置领域。 NAND Flash 产品根据每个单元中存储的比特（bit）信息数量，分为单层、多层、三层、四层和 五层。存储的信息数量越多，意味着在相同空间内可以存储的数据越多。 此次开发正值市场对 NAND 解决方案产品高性能、低功耗的需求日益增长，以确保设备端 AI 的 稳定运行。该公司预计，针对 AI 工作负载优化的 UFS 4.1 产品将有助于巩固其在旗舰智 ...

Jim Keller：RISC-V一定会胜出 如果您希望可以时常见面，欢迎标星收藏哦~ 来源：内容来自 chinatimes ，谢谢 。 半导体已是全球最受重视的科技产业，台积电更是其中焦点，各国也争相邀请台积电设厂。最新消 息传出，台积电婉拒在印度、新加坡和卡达建厂的邀请，因台湾是最完美的生产据点，海外建厂是 逼不得已的决定。 根据《DIGITIMES》21日报导指出，供应链消息人士称，想要与台积电合作的国家相当多，但台 积电已经婉拒印度、新加坡、卡达的设厂邀约，因为台湾是最完美的生产据点，海外建厂是逼不得 已的决定，在美国、日本和德国的工厂都是在大国「巨大压力」下建立，以及考量美日德在设备、 材料与IC设计等半导体产业链中拥有领先实力。 该篇报导也提到，据供应链业者透露，中东多国可说是诚意满满，「钱不是问题」，但对台积电来 说，除了国安与复杂政治问题外，面临的主要障碍是，中东在半导体领域部署几乎是零。 参考链接 https://www.chinatimes.com/realtimenews/20250522001291-260410?ctrack=pc_money_headl_p04&chdtv 点这里加 ...

Core Insights - Nvidia has announced the establishment of a consortium for 800V high-voltage direct current (DC) power distribution, which is a crucial step for supporting 1MW power processing racks starting in 2027 [1] - Upgrading to 800V can enhance end-to-end power efficiency by up to 5% and reduce maintenance costs by as much as 70% due to fewer power failures and lower labor costs [1] - The consortium includes major chip suppliers such as Infineon, MPS, Navitas, Rohm, STMicroelectronics, and Texas Instruments, as well as power module suppliers like Delta and Flex Power [1] Group 1: Technical Advantages - The use of industrial-grade rectifiers to convert 13.8 kV AC grid power directly to 800V DC minimizes energy loss typically incurred during multiple AC-DC and DC-DC conversion steps [2] - The 800V busbar allows for 85% more power transmission on the same size conductors, reducing copper demand by 45% due to lower current requirements and resistance losses [4] - The elimination of rack-level AC-DC conversion components frees up valuable space for more computing resources, enabling higher density configurations and improved cooling efficiency [5] Group 2: Industry Collaboration and Innovation - The consortium aims to accelerate the application of high-voltage DC architecture, which has faced challenges in technology and deployment in the past [5] - Infineon has developed a 12kW reference design using GaN and SiC devices with a baseline efficiency of approximately 98%, paving the way for new standards in power architecture for AI data centers [5] - Nexperia showcased an AI data center power system with an 8.5kW power supply, achieving 98% efficiency and a peak efficiency of 99.3% through its patented IntelliWeave technology [6] Group 3: Challenges and Considerations - Transitioning to an 800V high-voltage DC power system presents new challenges in safety, standards, and personnel training [7] - Nvidia and its partners are actively researching the capital and operational expenditures, as well as safety impacts of traditional transformer-based and solid-state transformer (SST) solutions [7] - The transition must include more isolation measures, with the need for circuit breakers that combine mechanical relays and semiconductor components for rapid response [7]

Core Insights - RISC-V has emerged as a significant open-source instruction set architecture (ISA) that has gained traction in both academic and commercial sectors, driven by its flexibility and openness [2][4][10] - The transition from a research project to a widely adopted standard has been marked by the establishment of the RISC-V Foundation, which aims to promote neutrality and prevent fragmentation [12][13] - The architecture has been embraced globally, with countries like Brazil and India recognizing its potential for national computing infrastructure [19][20] Group 1: Development and Adoption - The initial discussions among the RISC-V team led to the acceptance of the risks associated with developing a new RISC architecture, which has since proven to be highly rewarding [2][4] - RISC-V's open nature has attracted significant interest from the industry, with many companies participating in its development and adoption [7][9] - The architecture's flexibility has been highlighted as a major advantage over proprietary ISAs, allowing for quicker implementation and reduced costs for startups [8][9] Group 2: Academic Integration - RISC-V has gradually been integrated into academic curricula, with institutions worldwide adopting it for teaching and research purposes [10][11] - The transition to RISC-V in educational settings has been facilitated by the development of comprehensive course materials and resources [10][11] - Collaborative projects, such as the PULP initiative, have further advanced the use of RISC-V in academic research [11][12] Group 3: Commercialization and Ecosystem Growth - The establishment of SiFive marked a significant step in the commercialization of RISC-V, providing customized chip solutions for various applications [14][15] - The demand for verified IP cores has led to a shift in the business model of many companies, with RISC-V driving innovation in the IP market [15][16] - Major companies, including NVIDIA and Western Digital, have publicly committed to using RISC-V, indicating its growing acceptance in the semiconductor industry [9][16] Group 4: Global Impact and Future Prospects - RISC-V's influence has expanded beyond traditional markets, with applications in sectors such as automotive, aerospace, and high-performance computing (HPC) [31][32][34] - The architecture is positioned to play a crucial role in the development of software-defined vehicles and advanced computing systems [31][32] - The ongoing evolution of RISC-V is expected to lead to a robust software ecosystem, which is essential for its widespread adoption across various industries [24][25][26]

如果您希望可以时常见面，欢迎标星收藏哦~ 来源：内容来自 techinasia ，谢谢 。 法 国 总 统 埃 马 纽 埃 尔 · 马 克 龙 对 台 湾 鸿 海 精 密 工 业 股 份 有 限 公 司 计 划 在 法 国 投 资 约 2.5 亿 欧 元 （2.78 亿美元）成立合资企业表示感谢。 此次投资将重点关注半导体和航天工业。 富士康与法国公司泰雷兹和雷迪埃签署了两份谅解备忘录，以创建法国首个外包半导体组装和测试 （OSAT）工厂。 这将采用扇出型晶圆级封装 (FOWLP) 技术，专注于汽车、空间科学、6G 移动技术和国防。 富士康还将与泰雷兹公司合作生产用于近地轨道电信的卫星。 此次投资是台湾在法国的第二大项目，仅次于辉能科技股份有限公司于 2023 年宣布的投资 52 亿 欧元（45.9 亿美元）的固态电池工厂。 参考链接 https://www.techinasia.com/news/french-president-thanks-foxconn-for-semiconductor-investment 点这里加关注，锁定更多原创内容 *免责声明：文章内容系作者个人观点，半导体芯闻转载仅为了传达 ...

OpenAI正以65亿美元的价格收购乔尼·艾维（Jony Ive）的初创公司io Products，并将这位早期 iPhone的首席设计师招致麾下，担任创意总监，以开发适应生成式人工智能时代的产品。 如果您希望可以时常见面，欢迎标星收藏哦~ 来源：内容来自 路透社 ，谢谢 。 "OpenAI有兴趣拥有下一个硬件平台，这样他们就不必通过苹果iOS或谷歌的安卓销售他们的产 品，"D.A. Davidson分析师吉尔·卢里亚（Gil Luria）说。 艾维离开苹果公司后创立的设计公司LoveFrom，已与OpenAI合作两年，致力于生成式人工智能 设备的研发——这是一个初创公司因高计算需求而步履维艰的领域，其中包括像Humane的AI Pin 这样的失败案例。 在艾维的领导下，OpenAI旨在将其广受欢迎的ChatGPT聊天机器人背后的技术，与曾使iPhone等 设备成为畅销产品的产品设计专长结合起来。 两家公司没有透露艾维一年前共同创立的io公司的交易财务细节。据一位知情人士透露，这笔全股 票交易根据OpenAI 3000亿美元的估值，估价为65亿美元。 据这位不愿透露姓名的知情人士称，OpenAI此前持有该公司 ...

Core Insights - The article discusses the critical challenges faced by photomasks in the development of lithography technology, particularly as the industry transitions to EUV (Extreme Ultraviolet) and beyond, highlighting the high costs associated with photomask manufacturing and maintenance [1][2][3]. Group 1: EUV and Non-EUV Challenges - The primary challenge for EUV is the high cost of manufacturing, maintaining, and replacing masks, which significantly impacts the overall production costs [1][3]. - Non-EUV applications are also facing similar challenges, as companies aim to stay competitive while managing costs associated with advanced photomask technologies [2][3]. - The lifespan of EUV photomasks is notably shorter compared to DUV (Deep Ultraviolet) masks, leading to increased cleaning frequency and the need for backup masks, which further escalates costs [3][4]. Group 2: Multi-Exposure Techniques - Multi-exposure techniques are deemed necessary for the future of EUV lithography, as they will enhance resolution and pattern fidelity [6][7]. - Companies are actively researching multi-exposure methods to extend the lifespan of EUV technology, with Intel planning to use high-NA EUV for its 14A node due to single-exposure limitations [7][8]. - The industry is exploring various techniques to optimize multi-exposure applications, although challenges remain in terms of cost and complexity [8][9]. Group 3: Photomask Materials and Process Control - The evolution of photomask materials is crucial for supporting finer nodes, with advancements in binary reflective masks and low-refractive-index reflective masks improving image contrast [10][11]. - The introduction of metal oxide resists is highlighted as a significant advancement, offering higher contrast and better etch resistance compared to traditional resists [11][12]. - Customization of mask blank properties presents opportunities for enhancing wafer process margins, although the market for new resist materials remains niche and underdeveloped [11][12]. Group 4: EUV Membrane Challenges - EUV membranes face challenges related to transmission rates and durability, with current membranes requiring frequent replacements that increase costs and downtime [14][15]. - The complexity of EUV membranes compared to 193i membranes complicates the cleaning and replacement processes, impacting throughput and efficiency [15][16]. - Ongoing research into alternative membrane materials, such as carbon nanotube-based versions, shows promise but faces reliability and performance challenges [15][16].

Core Insights - Global semiconductor capital expenditure (CapEx) is projected to decrease by 7% quarter-on-quarter in Q1 2025 but increase by 27% year-on-year, driven by investments in advanced logic, high-bandwidth memory (HBM), and advanced packaging technologies supporting AI applications [1] - Memory-related capital expenditure has surged by 57% year-on-year, while non-memory spending has grown by 15% during the same period [1] - Wafer fab equipment (WFE) spending is expected to rise by 19% year-on-year in Q1 2025, with a further 12% increase anticipated in Q2, fueled by significant investments in advanced logic and memory production to meet growing AI demands [1] - Test equipment spending has increased by 56% year-on-year in Q1, with a forecasted growth of 53% in Q2, driven by demand for AI and HBM chips [1] - Global wafer fab capacity is expected to exceed 42.5 million 300mm equivalent wafers per quarter in Q1 2025, reflecting a 2% quarter-on-quarter and 7% year-on-year growth [1] China Wafer Capacity Growth - China remains the leading region for wafer capacity expansion, although growth momentum is expected to slow in the coming quarters [2] - Japan and Taiwan are experiencing the fastest quarterly capacity growth, driven by significant investments in power semiconductors and the expansion of advanced foundries [2] Major Chip Manufacturers Increasing CapEx - TSMC has reaffirmed its annual capital expenditure target for 2025 at $38 billion to $42 billion, which aligns with market expectations and represents a historical high, with a midpoint of $40 billion [3] - TSMC's Q1 2025 capital expenditure was $10.06 billion, slightly lower than the previous quarter's $11.23 billion [3] - Approximately 70% of TSMC's 2025 capital expenditure will be allocated to advanced process technologies, with 10% to 20% for special technologies, and another 10% to 20% for advanced packaging, testing, and photomask production [3] - SMIC plans to invest $7 billion in capital expenditure in 2025, reflecting domestic demand growth and efforts to advance chip manufacturing technology following U.S. sanctions against TSMC supplying chips to Huawei [3]

Core Viewpoint - The article discusses the recent aggressive semiconductor export control measures introduced by the U.S. Department of Commerce, which effectively bans the use of Huawei's Ascend 910 series chips globally, labeling it as a violation of U.S. export control regulations, with severe penalties for non-compliance [2][4]. Group 1: U.S. Export Control Measures - The U.S. Department of Commerce has issued guidelines that classify the use of Huawei's Ascend chips as a violation of export controls, threatening legal consequences for any organization or individual that complies with these measures [4][6]. - The measures are described as unilateral bullying and protectionism, which undermine the stability of the global semiconductor supply chain and infringe on the rights of other countries to develop advanced computing and AI technologies [4][8]. Group 2: China's Response - China firmly opposes the U.S. measures, asserting that they violate international law and the basic principles of international relations, and emphasizes the need for cooperation and mutual benefit in technological development [4][8]. - The Chinese government warns that any organization or individual that assists in enforcing U.S. measures may face legal repercussions under Chinese law, specifically referencing the Anti-Foreign Sanctions Law [4][8]. Group 3: Implications for Global Semiconductor Industry - The article highlights the potential disruption to the global semiconductor industry caused by U.S. actions, which could lead to a significant impact on supply chains and technological collaboration [4][9]. - It notes that the U.S. accusations against Huawei's chips are seen as unfounded and part of a broader strategy to maintain technological dominance and suppress China's advancements in the semiconductor sector [9][11].

Core Viewpoint - The article discusses the recent surge in DRAM prices driven by concerns over potential tariffs in the U.S. and strong demand for high bandwidth memory (HBM), which is expected to boost the profits of major South Korean memory chip manufacturers like Samsung Electronics and SK Hynix [1][2]. Group 1: DRAM Price Surge - DRAM prices have increased significantly, with Samsung and SK Hynix raising prices for traditional DDR4 and new DDR5 DRAM by double-digit percentages [1]. - The average selling price (ASP) of standard PC DRAM (DDR4 8Gb 1Gx8) rose by 22.2% in April, reaching $1.65 after five months of decline [1]. - Major clients are stockpiling DRAM ahead of potential U.S. tariffs, leading to a faster-than-expected depletion of component inventories [2]. Group 2: HBM Demand and AI Influence - The demand for HBM is rising alongside DRAM prices, fueled by Nvidia's recent agreement with Saudi Arabia for AI chip supply, which is expected to drive a second wave of AI memory demand [2][3]. - Nvidia's purchase of SK Hynix's HBM3E chips reflects a 60% price increase for 12-layer chips compared to 8-layer chips, indicating strong demand for high-performance memory [3]. Group 3: NAND Flash Market Dynamics - The top five NAND Flash manufacturers, including Samsung and SK Hynix, are implementing production cuts of 10% to 15% to address oversupply issues [4]. - This synchronized reduction in NAND production is expected to support a rebound in memory prices, with a forecasted price increase in the second quarter of 2025 [5]. - The first quarter saw a decline in NAND Flash prices by 15% to 20%, but the second quarter is projected to recover by 3% to 8% [5].