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光掩膜的变化和挑战
半导体行业观察· 2025-06-17 01:34
Core Viewpoint - The article discusses the current state and future directions of photomask manufacturing, emphasizing the importance of curved masks and advanced computational tools in extending the viability of non-EUV lithography technologies [1][3][4]. Group 1: Innovations in Photomask Technology - The use of curved photomasks is a significant innovation that leverages current writing technologies to create complex shapes previously unattainable [3]. - Advanced computational tools, such as Mask Process Correction (MPC) and high-level simulations, are increasingly used in the mask design flow, reducing the need for expensive experiments and pushing technological limits [3][6]. - The evolution of variable shape beam (VSB) writing technology to multi-beam writing technology has made curved mask shapes feasible without increasing writing time or costs [5]. Group 2: Challenges and Infrastructure Needs - There is a substantial need for infrastructure development to support the complexity of curved shapes, as traditional rectangular descriptions are simpler to manage [8]. - The transition to curved processes is seen as an exception rather than the norm, impacting economics and infrastructure, particularly in the reliance on GPU-based computing [9]. - Measurement technologies must evolve to handle the complexities of curved shapes, requiring higher resolution and faster measurement tools [11]. Group 3: EUV Masking Issues - EUV masks face challenges such as lower durability compared to 193i masks, necessitating frequent replacements that increase costs and complexity [13]. - The performance of EUV pellicles is currently suboptimal, leading to significant wafer throughput losses due to energy loss during transmission [13][15]. - The balance between using pellicles and the associated costs is contingent on the specific use case, with larger, high-value chips benefiting more from pellicles than smaller, redundant designs [16]. Group 4: Future Directions and Research - Research is ongoing into alternative materials for pellicles, such as carbon nanotube films, which could address current limitations but are not yet in mass production [17]. - The industry is exploring ways to improve the durability and transmission rates of EUV pellicles, which could lead to broader applications if successful [15][16].
欧洲芯片,为时已晚
半导体行业观察· 2025-06-17 01:34
Core Viewpoint - The Genesis project, involving 58 European companies and research institutions, aims to enhance the sustainability of semiconductor manufacturing, addressing environmental impacts and resource efficiency in the industry [1][2][3]. Group 1: Project Overview - The Genesis project has a budget of €55 million and focuses on making semiconductor production more sustainable globally, not just in Europe [1]. - The project includes four main workflows: monitoring and sensing, new materials, waste minimization, and critical raw materials mitigation [3]. - The initiative aims to produce 45 outcomes over the next three years, addressing emissions, material optimization, and recycling [3]. Group 2: Industry Challenges and Drivers - The semiconductor industry faces increasing pressure from customers to produce chips sustainably, managing water resources and achieving carbon neutrality [4]. - Regulatory measures are expected to strengthen over time, driven by climate change concerns, necessitating action from the industry [4]. - Major companies are pushing for sustainability in semiconductor production, indicating a shift in industry norms [4]. Group 3: Technological Innovations - The project will deploy integrated sensor systems to monitor and reduce emissions of harmful substances like PFAS and greenhouse gases [3]. - There is a focus on developing AI models based on sensor data to enhance wafer fabrication efficiency, although AI integration is not currently part of the Genesis project [7]. - The project aims to replace 30% of new materials used in lithography and packaging processes with more sustainable alternatives [8]. Group 4: Collaboration and Training - The project includes a partnership with Applied Materials to develop material engineering solutions for emerging infrastructure challenges in AI data centers [9][10]. - The FAMES Academy is being established to train engineers and technicians in low-power FD-SOI technology, supporting the European semiconductor community [11]. - The academy will focus on workshops and interactive sessions to equip the industry with necessary skills and knowledge [11].
直播预告|6月26日戈尔深度解析半导体及FPD设备静电解决方案
半导体行业观察· 2025-06-17 01:34
随着半导体先进封装与FPD制造技术的不断演进,洁净室自动化生产设备面临的静电问题 日益严峻。为帮助行业同仁深入了解静电带来的潜在风险,并探索高效可靠的解决方案, 提升产能和良率, 戈尔诚邀您参与6月26日举办的半导体及FPD设备静电解决方案专题研 讨会 。 户经验,还曾负责东南亚市场,对国 内外大客户的设备及应用需求有深 入了解。 同 核心内容提要 本次研讨会将 聚焦于洁净室环境中静电控制的关键技术 ,分享前沿解决方案与真实应用案例, 助力您提升设备可靠性与产能表现。 > 痛点直击:半导体先进封装中的静电问题及风险 技术革新:戈尔新一代电缆技术:防止静电积聚, 提升可靠性和产效 全球案例: 1.全球知名先进封装设备商应用案例分析 2.全球知名FPD制造商在OLED设备为什么采用 抗静电电缆? ● Q&A环节:戈尔经验丰富的技术团队在线答疑 解惑。 Together, improving life 扫描下方二维码预约报名 即可激活抽奖资格 扫码立即锁定席位 倒计时提示 ⏳ 席位有限! 6月26日前预约有效 (本文图源:戈尔) *免责声明:本文由作者原创。文章内容系作者个人观点,半导体行业观察转载仅为了传达一种不 ...
DRAM,生变!
半导体行业观察· 2025-06-17 01:34
Core Viewpoint - The DRAM market is undergoing significant changes, highlighted by a rapid increase in DDR4 prices and shifts in market dynamics among major players like Micron, Samsung, and SK Hynix [1][5]. Group 1: Micron's Developments - Micron has announced the discontinuation of DDR4 production, leading to a dramatic price surge in DDR4 DRAM, with prices increasing over 100% this season [1]. - The company has introduced its 1γ (1-gamma) DDR5 technology, which boasts a 15% increase in data transfer speed compared to its predecessor and a 20% reduction in power consumption, crucial for AI and data center applications [2]. - Micron plans to invest $200 billion in expanding advanced DRAM manufacturing and R&D in the U.S., which is expected to significantly impact the future DRAM landscape [5]. Group 2: Samsung's Challenges - Samsung has faced difficulties with HBM certification, with reports indicating multiple failures in obtaining HBM3E certification, which is critical for its product offerings [7][9]. - Despite these challenges, Samsung has successfully delivered HBM3E chips to AMD, marking a significant step in its HBM product line [8]. - The company is also planning to expand its 1c DRAM production line, which is essential for its HBM4 technology, indicating a commitment to overcoming current production hurdles [9][10]. Group 3: SK Hynix's Strategy - SK Hynix has emerged as a leader in the DRAM market, capturing a 36% market share, surpassing Samsung's 34% [11]. - The company is taking a cautious approach to expanding its DRAM and HBM production capacity, delaying equipment investments and scaling back production expectations [12][13]. - SK Hynix is also focusing on future technology roadmaps, including the development of 4F² and 3D DRAM technologies to enhance performance and capacity [14]. Group 4: Future of DRAM Technology - The future of DRAM technology is promising, with advancements expected in 3D DRAM architectures and the transition to smaller nodes, including 0c/0d by 2033-2034 [19]. - Major manufacturers are exploring various architectural paths to achieve 3D DRAM integration, indicating a competitive landscape driven by innovation [19]. - The introduction of HBM4 and HBM5 is anticipated to significantly increase memory bandwidth and data transfer rates, with HBM4 expected to reach 2 TB/s by 2026 [21].
三星芯片,因何落后?
半导体行业观察· 2025-06-17 01:34
公众号记得加星标⭐️,第一时间看推送不会错过。 来源:内容 编译自 restofworld 。 三星电子曾是全球领先者,但在争夺人工智能供应主导权的激烈半导体竞争中却失利;该公司还失去 了工程师,留下的员工只能长时间高强度地工作以弥补空缺;工程师们表示,他们被要求伪造数据, 导致缺陷漏出,影响芯片质量。 午夜时分,在首尔郊外三星电子的半导体办公室里,芯片设计工程师韩基白(Han Ki-bak)看到一位 同事在连续数月通宵工作后晕倒了。韩基白惊呆了,动弹不得。 "因为我熬了那么多夜,我都疯了。我没有冲过去帮她,只是坐在椅子上,心想'我该怎么办?'"他在 2020年接受《restofworld》采访时回忆了这件事。 当医护人员赶到时,韩先生茫然地看着这一切。 10名三星现任和前任工程师向《restofworld》透露,由于工作时间长、工作量大以及奖金低于竞争 对手,许多三星工程师正转投韩国芯片制造商SK海力士。其中一些人则转投了美国的美光科技和英 特尔,以及长鑫存储和长江存储等中国竞争对手。他们表示,在人手短缺、本已捉襟见肘的团队中, 倦怠感正在加剧。除韩某外,所有员工都要求使用假名,因为他们担心遭到公司的报复。 ...
EUV光刻机,要过七关
半导体行业观察· 2025-06-17 01:34
公众号记得加星标⭐️,第一时间看推送不会错过。 来源:内容 编译自 NRC 。 如何粉碎一块薄饼?这个问题困扰着阿姆斯特丹纳米光刻高级研究中心 (ARCNL) 的研究员迪翁·恩 格尔斯 (Dion Engels)。 这里所说的薄饼指的是被粉碎的锡滴,它在 ASML 的光刻机中每秒被引爆五万次。这会产生等离子 体,发射出极紫外 (EUV) 光:一种极紫外辐射,将高度精细的芯片图案投射到硅片或晶圆上。 集成的晶体管越多,芯片的性能就越强。得益于 EUV 光刻机,如今用于手机或人工智能数据中心的 最先进处理器上的芯片设计线间距仅为几十纳米——百万分之一毫米。 ASML 与美国 Cymer 实验室合作研究 EUV 技术长达二十年,发现粉碎锡滴可以产生更多的 EUV 光。其结果是:生产英伟达、苹果、三星或英特尔先进芯片的机器很快就会更加高效地运转。 芯片元件尺寸缩小的速度正在放缓,因为芯片设计变得越来越高:制造商正在将芯片元件粘合在一 起,并想出更智能地排列晶体管的方法,例如从底部供电。 ASML 系统的许多基础设计都诞生于阿姆斯特丹东区的科学园。ARCNL 成立于十年前,与阿姆斯特 丹大学合作成立。其推动力来自 AS ...
DDR 4价格飞涨,从业者:十年未见
半导体行业观察· 2025-06-16 01:47
Core Viewpoint - The recent surge in DDR4 DRAM spot prices, with increases of nearly 8% in a single day, indicates a significant market shift, driven by supply constraints and increased demand from OEM/ODM manufacturers [1][4]. Price Trends - DDR4 8Gb (1G×8) 3200 spot price rose from an average of $2.73 on May 30 to $3.775, marking a 38.27% increase in just half a month [2]. - Since March 31, the DDR4 8Gb price has skyrocketed from $1.63 to nearly $3.775, representing an increase of approximately 132% [3]. - The DDR4 16Gb (1G×16) 3200 spot price increased from $6.1 on May 30 to $8.2, a rise of 34.42% in June alone, and over 107% since March 31 [3]. Market Dynamics - The current DDR4 spot prices have reached levels comparable to Q1 2022, where major suppliers like Nanya Technology and Winbond reported substantial profits [4]. - With major manufacturers like Samsung and Micron halting DDR4 supply, concerns over future supply shortages have led to aggressive purchasing behavior in the market [4]. - Nanya Technology is reportedly expanding its DDR4 production capacity, indicating a recognition of the significant market opportunity for DDR4 [5]. Supplier Insights - Nanya Technology and Winbond are positioned to benefit from the rising DDR4 prices, with DDR3 and DDR4 accounting for over 80% of Nanya's revenue [5]. - Memory IC design firms like Etron Technology and Gigabyte Technology are also beginning to receive customer orders, suggesting a positive outlook for their operations amid the DDR4 price surge [5].
索尼高管:中国高端CIS,来势汹汹
半导体行业观察· 2025-06-16 01:47
Core Viewpoint - Sony Group's imaging and sensing solutions division (I&SS) anticipates a delay in achieving its 60% market share target for 2025 due to lower-than-expected sales from major clients and intensified competition in the high-end sector in China [1][3][4] Financial Performance - For the fiscal year 2024, I&SS expects sales to reach 1.799 trillion yen, a 12% year-on-year increase, and operating profit to hit 261.1 billion yen, a 35% increase, both setting historical records [1][4] - The growth in sales is attributed to favorable exchange rates, improved product mix, and increased sales of mobile device sensors [4][5] - The forecast for fiscal year 2025 includes a 9% increase in sales to 1.96 trillion yen and a 7% increase in operating profit to 280 billion yen, both projected to be historical highs [4] Market Share and Strategy - Sony Semiconductor's president indicated that the market share for 2024 is expected to remain flat at 53%, with a projected increase to 56% in 2025 [1][3] - The CFO explained that the stagnation in market share is primarily due to unmet sales expectations from major clients and increased competition in the high-end market in China [3] - Sony Semiconductor has outlined a business strategy focusing on five functional axes: sensitivity/noise, dynamic range, resolution, readout speed, and power consumption, aiming to balance these features in product development [3][5] Investment and Future Outlook - The company plans to invest in new manufacturing processes to support the production of innovative sensors, with investments expected to be phased in starting from 2030 [5] - The investment scale may approach that of the previous mid-term plan, which was approximately 930 billion yen [5] - The company is also evaluating the growth potential of various sensor markets, including automotive sensors, while aiming for long-term business growth with optimal development costs [6] Corporate Structure Considerations - There are reports suggesting that Sony is considering spinning off its subsidiary, Sony Semiconductor Solutions, with the goal of an initial public offering [7] - The company is open to exploring structural changes in other business units if necessary, but currently has no plans for such actions beyond the financial department [7]
手机芯片,需要这些创新
半导体行业观察· 2025-06-16 01:47
Core Viewpoint - The article discusses the evolution of smartphones into intelligent, context-aware devices through the integration of agentic AI, which enhances their capabilities beyond simple communication tools [1][3]. Hardware Challenges - The main challenge in implementing agentic AI on smartphones lies in hardware limitations, including battery life, processing power, and memory constraints [3]. - To meet the demands of agentic AI, significant upgrades in smartphone hardware components such as processors, memory, storage, battery, sensors, and thermal management are necessary [3]. Memory System Requirements - There is a growing demand for advanced memory subsystems to efficiently deliver data for AI applications on devices [5]. - The current standard LPDDR5X offers speeds up to approximately 10.7 Gbps, while the upcoming LPDDR6 standard promises faster bandwidth (14.4 Gbps+) and improved power efficiency [5]. Key Technologies for Memory Solutions 1. **Memory Processing (PIM) Architecture**: PIM integrates computing functions directly into memory, significantly reducing latency and power consumption, although standardization is still developing [7]. 2. **Wide I/O Interfaces and Advanced Packaging**: These methods enhance bandwidth and assist in thermal management, potentially allowing OEMs to offload DRAM to separate packages for AI-intensive workloads [11]. Importance of Quantization and Collaboration - Techniques like quantization are crucial for introducing GenAI into smartphones by reducing memory and computational demands while maintaining accuracy [15]. - Collaboration among SoC designers, memory and storage suppliers, OEMs, OS developers, and AI researchers is essential to optimize hardware and software for edge AI [16]. Industry Call to Action - The article emphasizes the need for a collective vision and investment in next-generation memory, storage, and packaging technologies to keep pace with rapid AI advancements and unlock the transformative potential of agentic AI in smartphones [17].
2nm争霸战,已打响
半导体行业观察· 2025-06-16 01:47
Core Viewpoint - The competition between TSMC and Samsung in the production of advanced 2nm chips is intensifying, with TSMC currently having a higher yield rate, which poses a challenge for Samsung in attracting orders [1][2][3]. Group 1: TSMC's 2nm Progress - TSMC has begun receiving orders for its 2nm process and is expected to start production in H2 2023 at its facilities in Hsinchu and Kaohsiung [1][3]. - The 2nm process utilizes Gate-All-Around (GAA) architecture, which is anticipated to improve performance by 10% to 15% and reduce power consumption by 25% to 30% compared to the 3nm process [1][3]. - Major clients for TSMC's 2nm chips include Apple, Nvidia, AMD, Qualcomm, and MediaTek, with MediaTek's CEO hinting at a product design completion by September 2023 [1][3]. Group 2: Samsung's 2nm Challenges - Samsung aims to start producing 2nm chips in H2 2023, likely for its upcoming Galaxy S26 flagship device, but its yield rate is reportedly around 40%, significantly lower than TSMC's 60% [2][3]. - Samsung is leveraging its previous experience with GAA architecture to improve its 2nm yield rates and attract orders from major tech companies [2]. Group 3: Production Capacity and Future Plans - TSMC's 2nm process is entering trial production, with plans to ramp up to a monthly capacity of 30,000 wafers by Q4 2025, and potentially expand to 120,000 to 130,000 wafers per month by 2027 [4]. - TSMC is investing over 1.5 trillion NTD to expand its facilities in Hsinchu and Kaohsiung, aiming to create the world's largest semiconductor manufacturing hub [4].