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英特尔关键一战:18A工艺,细节全面披露
半导体行业观察· 2025-06-24 01:24
Core Viewpoint - Intel's 18A manufacturing process is set to significantly enhance power efficiency, performance, and density compared to previous generations, marking a competitive entry against TSMC's advanced technologies [1][2][26]. Group 1: Performance and Efficiency - The 18A process is expected to achieve a 25% performance increase and a 36% reduction in power consumption compared to Intel's previous Intel 3 process [6][26]. - The density of the 18A process is projected to improve by 30%, with designs occupying approximately 28% less area than those using Intel 3 [6][26]. - The first product utilizing the 18A process will be the Panther Lake CPU, aimed at both client and data center applications [5][26]. Group 2: Technological Innovations - The 18A architecture incorporates Intel's second-generation RibbonFET (GAA) transistors and the industry's first production-ready PowerVia back-side power delivery network (BSPDN) [26][27]. - The 18A process supports a high-density SRAM cell size of 0.021 µm², achieving a density of approximately 31.8 Mb/mm², comparable to TSMC's N5 and N3E nodes [7][26]. - PowerVia technology enhances transistor density by 8% to 10% and improves RC performance of the front-side metal layers by about 12% [18][27]. Group 3: Manufacturing and Design Simplification - The 18A process simplifies manufacturing by relocating power delivery to the back side, reducing the total number of masks required and streamlining the front-end metal process [25][26]. - The design of the back-side metal layers in PowerVia features low resistance and high thermal conductivity, addressing the heat management challenges posed by high-performance transistors [25][27]. - Intel's 18A process has passed rigorous JEDEC reliability tests, confirming its durability and performance stability under various stress conditions [21][27]. Group 4: Future Developments - Following the 18A process, Intel plans to introduce the 14A node, which is expected to enhance performance-to-power ratio by 15% to 20% and improve transistor density by 1.3 times [31][33]. - The 14A node will feature a new direct contact back-side power delivery network called PowerDirect, aimed at maximizing power efficiency [31][33].
DDR4价格狂飙,已比DDR 5贵一倍
半导体行业观察· 2025-06-24 01:24
公众号记得加星标⭐️,第一时间看推送不会错过。 来源:内容来自 经济日报 。 DDR4现货价持续飙涨,昨(23)日DDR4 1 6G b芯片出现报价比同样为16Gb容量,但较更先进规 格的DDR5贵约一倍的状况,是DRAM史上首次前一代产品报价竟比最新规格高100%。 业界观察,此次DDR4现货报价上涨具有多重因素,三星、美光、长鑫存储等指标厂陆续传出停供 DDR4,开始酝酿这一波涨势。此外,最近美国有意取消三星、SK海力士等大厂大陆生产设备取得豁 免引来的连锁效应。 业界也说,由于SK海力士大突破,今年首季首度超车三星,成为全球DRAM一哥,让三星面子挂不 住,积极冲刺高频宽记忆体(HBM),无暇再投入DDR相关产品,希望能夺回DRAM一哥宝座,也 是一个催化剂。 业界指出,三星、美光等大厂锁定DDR5、高频宽记忆体等高阶DRAM市场,将陆续停供DDR4,使 得近期DDR4现货价惊惊涨。 统计DDR4现货价短短两周又涨了约五成,本季以来各容量价格暴涨逾二倍,南亚科现为全球最大 DDR4供应商,坐拥报价暴涨收益,华邦也沾光。 业界人士直言,过往前一代DRAM芯片报价虽因供应相对少,价格显得有撑,但这次同样为1 ...
大陆集团决定自研芯片,成立新公司
半导体行业观察· 2025-06-24 01:24
Core Viewpoint - Continental Group's automotive division has established the Advanced Electronic and Semiconductor Solutions (AESS) department to enhance resilience and ensure future success by developing automotive semiconductors internally, in partnership with GlobalFoundries (GF) [1][2]. Group 1: Strategic Initiatives - The establishment of AESS aims to design and validate semiconductors to meet internal demands, addressing the growing need for semiconductors in software-defined vehicles [1]. - The global automotive semiconductor market is projected to reach approximately €110 billion by 2032, necessitating increased investment in semiconductor development for long-term success [1]. - The move to create a fabless semiconductor company is intended to reduce geopolitical risks and enhance Continental's autonomy in the semiconductor field [1][2]. Group 2: Collaboration and Technology - GF will serve as the manufacturing partner for AESS, leveraging its advanced automotive-grade process technology and global manufacturing capabilities to support the development of innovative solutions for next-generation vehicles [2]. - The collaboration with GF is part of a broader strategy to enhance semiconductor production design and management capabilities, thereby improving market position and self-sufficiency [2]. Group 3: Organizational Impact - The new organizational structure is designed to support the automotive group's business by creating a resilient supply chain, improving product quality, and reducing time-to-market [3]. - AESS is expected to generate value through cost savings and efficiency improvements, which will enhance the company's cash flow [3]. - The establishment of AESS is seen as a way to solidify Continental's position as a leading automotive parts manufacturer and create new internal development opportunities [4].
以太网和InfiniBand外,第三种选择
半导体行业观察· 2025-06-24 01:24
Core Viewpoint - The article discusses the evolution of networking technologies, particularly focusing on Cornelis Networks' CN500 architecture, which enhances AI performance by coordinating up to 500,000 computers without increasing latency, outperforming existing technologies like InfiniBand and Ethernet in terms of message throughput and latency reduction [1][2][3]. Group 1: Networking Technology Evolution - Ethernet has long been synonymous with local area networks (LAN), but the rise of data centers necessitated new networking solutions to handle diverse systems and resource sharing [2]. - Cornelis Networks' Omni-Path architecture, developed for high-performance computing (HPC), maximizes throughput and eliminates packet loss, addressing the need for efficient data exchange in AI model training [3][4]. Group 2: Challenges in Data Coordination - Coordinating processors for AI model training requires high bandwidth and low latency, with congestion management being a significant challenge [4][5]. - Cornelis' dynamic adaptive routing algorithm mitigates congestion by rerouting traffic and employing credit-based flow control to prevent delays caused by insufficient memory at endpoints [5][6]. Group 3: Market Dynamics and Trends - The CN5000 product, built on custom chips, targets organizations looking to upgrade for AI or faster HPC simulations, with partnerships with original equipment manufacturers (OEMs) to facilitate sales [7]. - The Ethernet switch market is diversifying, with IDC reporting significant growth in data center Ethernet switch sales, driven by AI cluster needs, while non-data center markets also show growth [8][21]. Group 4: Competitive Landscape - Nvidia has surpassed Cisco and Arista in data center Ethernet sales, with a remarkable growth rate of 760.3% year-over-year, indicating its strong position in the market [17][23]. - Arista Networks remains a key player, with a 26.4% increase in sales, while Cisco's growth is more modest at 4.7% [23][22].
DAC大会见证国产EDA壮大,STCO集成系统设计赋能AI新潮流
半导体行业观察· 2025-06-24 01:24
2.5D/3D先进封装SI/PI仿真平台Metis 公众号记得加星标⭐️,第一时间看推送不会错过。 2025年6月23日,中国上海讯——芯和半导体近日在美国旧金山西莫斯克尼会议中心举办的 DAC2025设计自动化大会上,正式发布了其EDA2025软件集。 面对人工智能技术对计算效能需求的指数级攀升,构建支撑AI发展的新型基础设施需立足系统性思 维,突破单一芯片的物理边界,构建涵盖计算架构、存储范式、互连技术到能效优化的多维协同创新 体系。后摩尔时代,从芯片到封装到系统进行整合设计、从全局角度进行综合分析已成为推动半导体 行业继续成长的共识。 作为国内集成系统设计EDA专家,芯和半导体此次发布的EDA2025软件集正定位于"STCO集成系统 设计"。这套"从芯片到系统"全栈集成系统EDA平台,涵盖了SI/PI/电磁/电热/应力等多物理引擎技 术,以"仿真驱动设计"的理念,提供从芯片、封装、模组、PCB板级、互连到整机系统的全栈集成系 统EDA解决方案,支持Chiplet先进封装,致力于赋能和加速新一代高速高频智能电子产品的设计, 具体的发布亮点如下: 发布亮点 多物理场仿真平台XEDS 芯 和 半 导 体 科 ...
NVIDIA Tensor Core 的演变:从 Volta 到 Blackwell
半导体行业观察· 2025-06-24 01:24
Core Insights - The article emphasizes the rapid evolution of GPU computing capabilities in artificial intelligence and deep learning, driven by Tensor Core technology, which significantly outpaces Moore's Law [1][3] - It highlights the importance of understanding the architecture and programming models of Nvidia's GPUs to grasp the advancements in Tensor Core technology [3] Group 1: Performance Principles - Amdahl's Law defines the maximum speedup achievable through parallelization, emphasizing that performance gains are limited by the serial portion of a task [5] - Strong and weak scaling are discussed, where strong scaling refers to improving performance on a fixed problem size, while weak scaling addresses solving larger problems in constant time [6][8] Group 2: Data Movement and Efficiency - Data movement is identified as a significant performance bottleneck, with the cost of moving data being much higher than computation, leading to the concept of the "memory wall" [10] - Efficient data handling is crucial for maximizing GPU performance, particularly in the context of Tensor Core operations [10] Group 3: Tensor Core Architecture Evolution - The article outlines the evolution of Nvidia's Tensor Core architecture, including Tesla V100, A100, H100, and Blackwell GPUs, detailing the enhancements in each generation [11] - The introduction of specialized instructions like HMMA for half-precision matrix multiplication is highlighted as a key development in Tensor Core technology [18][19] Group 4: Tensor Core Generations - The first generation of Tensor Core in the Volta architecture supports FP16 input and FP32 accumulation, optimizing for mixed-precision training [22][27] - The Turing architecture introduced the second generation of Tensor Core with support for INT8 and INT4 precision, enhancing capabilities for deep learning applications [27] - The Ampere architecture further improved performance with asynchronous data copying and introduced new MMA instructions that reduce register pressure [29][30] - The Hopper architecture introduced Warpgroup-level MMA, allowing for more flexible and efficient operations [39] Group 5: Memory and Data Management - The introduction of Tensor Memory (TMEM) in the Blackwell architecture aims to alleviate register pressure and improve data access efficiency [43] - The article discusses the importance of structured sparsity in enhancing Tensor Core throughput, particularly in the context of the Ampere and Hopper architectures [54][57] Group 6: Performance Metrics - The article provides comparative metrics for Tensor Core performance across different architectures, showing significant improvements in FLOP/cycle and memory bandwidth [59]
日本芯片大厂:Rapidus很好,我选台积电
半导体行业观察· 2025-06-24 01:24
公众号记得加星标⭐️,第一时间看推送不会错过。 Rapidus CEO在一篇文章中回顾道,公司试图生产的芯片采用了一种前所未有的结构,称为GAA (Gate All Around,环绕栅极)结构,这有助于实现2纳米半导体所需的超精细精度。IBM于2021 年5月发布了其基于GAA的2纳米工艺节点的基础研究成果,该成果是IBM多年潜心研究的成果。然 而,该技术尚未实现量产。 Rapidus 以此为契机,派遣了约150名工程师,主要集中在拥有多年半导体经验的人员,前往IBM位 于纽约的研发基地,开发实用技术。许多负责尖端技术的人员回到日本,开始进行试生产。 据介绍,在这个过程中,Rapidus面临很多技术挑战和问题,比如如何开发能够实现复杂3D晶体管结 构的技术以及如何结合不同的材料和成分。 来源:内容 编译自 nikkei 。 富士通社长时田贵人23日在横滨举行的定期股东大会上,就致力于尖端半导体国产化的Rapidus发表 了看法,他表示:"增加尖端半导体的供应源,对于确保我们供应链的稳定性极为有益。"富士通将继 续采购用于人工智能(AI)相关技术的尖端半导体。 富士通计划投资Rapidus。一位股东询问富士通 ...
图像传感器,越大越好吗?
半导体行业观察· 2025-06-24 01:24
公众号记得加星标⭐️,第一时间看推送不会错过。 来源:内容 编译自 digitalcameraworld 。 "越大越好"的口号在相机行业盛行,尤其是在图像传感器方面。更高的像素数不仅受到市场部门的青 睐,更大的图像传感器也常常被认为是理想的选择。但是,正如许多摄影师会告诉你的那样,更高的 像素数很少能拍出更好的照片,我们真的应该如此纠结于传感器的尺寸吗? 这是YouTuber snappiness在视频中讨论的一个话题。他拥有相当多的相机收藏,包括两台数码中画 幅相机(尽管是老式单反相机设计):一台哈苏 H3D 和一台玛米亚 ZD。他用这些相机展示了大传 感器常被提及的关键优势:轻松获得浅景深,从而更好地区分主体与背景。 与较小的传感器相比,较大的图像传感器会减小景深,即使镜头设置为相同的光圈,且拍摄对象与相 机的距离保持不变。然而,虽然模糊的背景(散景)在微距摄影和人像摄影中备受推崇,但极薄的焦 平面并不总是好事,因为它会使拍摄对象的整体对焦变得非常困难。 使用全画幅相机,将镜头设置为 f/1.2,这意味着你或许能清晰对焦拍摄对象的眼睛,但鼻尖却可能 失焦。此外,正如 snappiness 指出的那样,虽 ...
RISC-V面临的挑战
半导体行业观察· 2025-06-23 02:08
公众号记得加星标⭐️,第一时间看推送不会错过。 来源:内容 编译自 xda-developers 。 在过去的20年里,只有两家巨头在争夺笔记本电脑和台式机市场主导地位。通常情况下,笔记本电脑 和台式机自诞生以来就基于 x86 架构,而全球几乎所有的智能手机都基于 ARM 架构。尽管高通和 微软进军专为 ARM 架构设计的 Windows on ARM 操作系统,最近在笔记本电脑领域获得了更多关 注,但新兴的RISC-V也正在蓬勃发展。 RISC-V 本身是一个开源指令集架构,被誉为潜在的市场变革者。在谷歌、高通和英特尔等巨头的支 持下,RISC-V 无疑并非为了短期的宣传噱头。问题是:它会对智能手机领域的 ARM 和个人电脑领 域的 x86 构成真正的威胁吗?还是说,它只是另一个被过度炒作的替代方案? 谷歌最近在 Android 上启用 RISC-V 支持的活动表明基于 RISC-V 的智能手机是可能的,但这并不 是我们能很快看到的东西,因为他们在 RISC-V 上的Android将在哪里以及如何使用上犹豫不决;他 们过去曾宣布过这一点,但后来又改变了主意,所以这并没有像 RISC-V 希望的那样激发人们的 ...
中国CIS崛起,索尼带头反击
半导体行业观察· 2025-06-23 02:08
Core Viewpoint - Sony's 2024 fiscal year performance report indicates that due to lower-than-expected sales from major clients and intensified competition from Chinese high-end CIS manufacturers, its market share in the CIS sector remains flat compared to the previous year, delaying its goal of achieving a 60% market share by 2025 [1][9]. Industry Overview - The current dynamics in the CIS market reflect a significant shift from a Japan-Korea dominated landscape to a more competitive environment with the rise of Chinese companies like Weier Technology, SmartSens, and Gekewei, which are transitioning from followers to competitors [2][8]. - Historically, the CIS market has seen various phases, starting from the commercialization of CCD technology in the 1970s to the emergence of CMOS technology in the 1990s, which laid the groundwork for the industry's growth [4][5]. Market Dynamics - The smartphone boom has driven explosive growth in the CIS market, with global sales increasing threefold from 2010 to 2019, making it one of the fastest-growing semiconductor categories [5][6]. - Sony and Samsung emerged as market leaders, with Sony capturing over 70% of the high-end mobile CIS market by 2022, while Samsung held a 19% market share [7][8]. Competitive Landscape - Chinese manufacturers have gained significant ground, with domestic CIS market share rising from 8% in 2018 to 25% in 2023, driven by advancements in technology and increased demand in sectors like security and automotive [9][10]. - The competition is intensifying, with Sony facing pressure from Chinese firms that are leveraging cost advantages and improving technology to penetrate high-end markets [9][10]. Future Outlook - Sony anticipates a compound annual growth rate (CAGR) of approximately 9% for its CIS business from 2024 to 2030, despite the postponement of its market share target [15][18]. - The company is focusing on enhancing product performance across five key areas: sensitivity/noise, dynamic range, resolution, read speed, and power consumption, while also investing in new manufacturing processes [15][22]. Strategic Initiatives - Sony is expanding its production capacity in Thailand and collaborating with TSMC in Japan to strengthen its manufacturing base [14][15]. - The company is positioning its automotive camera business as a strategic focus area, aiming for a 43% market share by 2026, up from 37% in 2024 [36][38]. Technological Innovations - Sony is investing in advanced manufacturing techniques, including multi-layer technology and new process nodes, to enhance sensor performance and meet evolving market demands [27][30]. - Canon is also making strides in sensor development, focusing on high dynamic range SPAD sensors and maintaining its commitment to in-house sensor R&D [48][55]. Conclusion - The CIS market is undergoing a transformation characterized by technological innovation and increased competition, particularly from Chinese manufacturers. Companies like Sony and Canon are actively adapting their strategies to maintain leadership in this evolving landscape [72].