Core Viewpoint - Samsung Electronics and SK Hynix have announced the mass production of the sixth generation High Bandwidth Memory (HBM4), but they have postponed the introduction of hybrid bonding machines, which were initially expected to be partially used in HBM4 production [1][2] Group 1: Production and Technology - Samsung and SK Hynix plan to use existing TC bonding machines from companies like Semes and Hanmi Semiconductor for HBM4 mass production, even for the initially expected 16-layer HBM4 products [1] - The companies will continue to use the micro bump DRAM stacking method by adjusting the stacking height of HBM4, which involves reducing the bump pitch [1][2] - Hybrid bonding technology, considered a disruptive technology for the next generation of HBM, is still under research and testing, with large-scale production expected to take time [1][2] Group 2: Performance and Market Dynamics - The number of channels in HBM4 has doubled compared to the previous generation, and the interface width has increased, leading to enhanced signal transmission speeds per pin [2] - The design goal for HBM4 is to reduce the micro bump pitch to approximately 10 micrometers (µm), which is still expected to meet performance targets [2] - Current TC bonding machines can meet the standards set by the International Semiconductor Standards Organization (JEDEC), while hybrid bonding machines and no-flux bonding machines are more expensive and have lower yields [2] Group 3: Future Outlook - Samsung has sent samples of HBM4 using hybrid bonding technology to customers and expects gradual commercialization of HBM4E, the next generation [2] - Despite the potential of hybrid bonding technology for high-end product lines, TC bonding machines will continue to play a core role in mainstream HBM4E products due to stability and cost-effectiveness [2]

Core Viewpoint - Advanced packaging is emerging as a new engine for computing power in the "post-Moore's Law" era, addressing the limitations of traditional chip performance improvements through innovative bonding technologies [4][5]. Group 1: Hybrid Bonding Overview - Hybrid bonding is an advanced packaging technology that combines dielectric bonding and metal interconnects, allowing for high-density, high-performance 3D integration [8][19]. - The development of hybrid bonding has evolved through various stages, from wire bonding to flip chip, and now to hybrid bonding, which enables ultra-fine pitch stacking and packaging [10][11]. - Hybrid bonding can be categorized into wafer-to-wafer (W2W) and chip-to-wafer (C2W) processes, with C2W offering higher flexibility and lower defect rates for smaller chips [14][16]. Group 2: Advantages and Challenges of Hybrid Bonding - The technology allows for extreme interconnect density and performance breakthroughs, achieving interconnect pitches below 1 μm, significantly enhancing data transfer bandwidth [23]. - Hybrid bonding is compatible with existing wafer-level manufacturing processes and can be integrated with TSV and micro-bump technologies, providing cost optimization potential [24]. - Challenges include yield issues, surface smoothness requirements, cleanliness standards, and complex testing processes that need to be addressed for successful mass production [26]. Group 3: Market Demand and Future Prospects - Major HBM manufacturers, including Samsung, Micron, and SK Hynix, have committed to adopting hybrid bonding technology for HBM5, which aims to meet the extreme demands of AI and high-performance computing [28]. - TSMC's SolC technology, which utilizes hybrid bonding, is expected to double its production by 2026, highlighting the growing adoption of this technology [29][30]. - The global market for hybrid bonding equipment is projected to exceed $600 million by 2030, with significant growth anticipated in the Asia-Pacific region [37]. Group 4: Competitive Landscape - The hybrid bonding equipment market is dominated by international players such as BESI, EV Group, and SUSS MicroTec, with BESI holding a market share of 67% in 2023 [44]. - The competitive landscape is evolving, with Chinese companies like Piotech entering the market, indicating advancements in domestic semiconductor equipment capabilities [42].

Group 1 - The hybrid bonding industry is entering a high-speed implementation phase, with equipment demand expected to grow several times before 2030, marking this technology as a key driver for the next generation of computing power [1][3] - Hybrid bonding technology is a critical enabling technology for breaking through computing power bottlenecks in the post-Moore era, driven by explosive growth in AI, high-performance computing (HPC), and high-bandwidth memory (HBM) [1][3] - The current market is dominated by overseas leaders, but there are clear opportunities for domestic alternatives [1] Group 2 - Hybrid bonding offers extreme interconnect density and performance breakthroughs, process compatibility, cost optimization potential, and flexibility in three-dimensional integration and heterogeneous design [2] - However, challenges such as defect control, alignment precision, thermal management, wafer warping, material compatibility, and process throughput must be addressed for successful mass production [2] Group 3 - The demand for hybrid bonding technology is transitioning from an advanced option to a core infrastructure in the AI era, with significant applications in storage and logic integration [3] - Major manufacturers like TSMC are expanding production in advance, with HBM4/5 and high-end AI chips expected to be the first to scale, indicating a robust growth trajectory for related equipment [3] Group 4 - The hybrid bonding equipment market is characterized by a clear pattern of "overseas dominance and domestic breakthroughs," with Dutch company BESI holding about 70% of the global market share [4] - Chinese equipment manufacturers are accelerating their catch-up efforts, with companies like Tuojing Technology launching mass production-level hybrid bonding equipment and receiving repeat orders [4] - Domestic equipment is rapidly entering the key tracks of 3D integration and advanced packaging, with market share expected to continue increasing due to rising precision and stability [4] Group 5 - BESI is the absolute leader in the global hybrid bonding equipment market, establishing a core position in high-performance computing with a complete range of equipment from traditional packaging to cutting-edge 2.5D/3D integration [5] - Its flagship product, Datacon 8800 CHAMEO ultra plus AC, achieves 100nm alignment precision and a throughput of 2000 CPH, indicating a shift from laboratory to mass production [5] - BESI's advanced packaging business demonstrates strong technical premium capabilities with a gross margin exceeding 65%, reflecting a successful transition to an AI-driven growth model [5]

Investment Rating - The report suggests a positive investment outlook for the hybrid bonding technology, highlighting its critical role in the AI era and advanced packaging market [7]. Core Insights - Hybrid bonding is identified as a key enabling technology for overcoming performance bottlenecks in the post-Moore era, driven by explosive demand in AI and high-performance computing (HPC) [7]. - The market for hybrid bonding equipment is expected to experience significant growth, with demand projected to increase several times by 2030, particularly in high-performance computing and memory applications [5][44]. - The report emphasizes the competitive landscape, noting that while overseas companies like BESI dominate the market, domestic players in China are making significant strides [5][57]. Summary by Sections Hybrid Bonding Overview - Hybrid bonding is an advanced packaging technology that combines dielectric bonding and metal interconnects, allowing for high-density, high-performance 3D integration [14][28]. - The technology enables interconnect distances below 10μm, significantly enhancing data transmission bandwidth compared to traditional methods [29]. Market Demand and Growth - The demand for hybrid bonding technology is transitioning from an advanced option to a core infrastructure in the AI era, with major manufacturers like TSMC and Samsung adopting it for next-generation products [5][33]. - The global hybrid bonding equipment market is projected to exceed $600 million by 2030, with the Chinese market expected to surpass $400 million [48]. Key Players and Competitive Landscape - BESI holds a dominant position in the hybrid bonding equipment market, with a market share of approximately 67% in 2023, and is expected to maintain around 70% in 2024 [57]. - Domestic companies such as Tuojing Technology and Baiao Chemical are rapidly advancing, with Tuojing Technology launching its first mass-production hybrid bonding equipment [5][57]. Applications and Future Trends - Hybrid bonding is primarily applied in 3D NAND and is expanding into high-performance computing scenarios, including HBM4 and HBM5 technologies [25][44]. - The report indicates that the technology is becoming essential for various applications, including AI chips and advanced memory solutions, with significant investments being made in new packaging facilities globally [43][44].

Core Insights - A study indicates that most core technologies required for advanced packaging of High Bandwidth Memory (HBM) are held by countries outside of South Korea [1] - South Korean companies excel in manufacturing and stacking HBM but are overly reliant on foreign companies for raw materials and equipment, which may expose them to patent litigation risks in the future [1][2] - TSMC and Adeia from the U.S. are leaders in hybrid bonding technology, with Adeia holding the most valuable patents based on a review of over 10,000 related patents from 2003 to 2022 [1] Patent Landscape - According to K-PEG ratings, TSMC ranks first in the number of high-quality patents above A3 level, followed by Samsung, Micron, and IBM [2] - China is rapidly growing in the memory sector, with companies like Yangtze Memory Technologies holding core technologies, including Xtacking, which are registered across South Korea, the U.S., Japan, Europe, and China [2] - Although South Korea holds the second-largest number of HBM-related patents, their quality and impact are below average due to reliance on imported core equipment and materials, posing risks to domestic companies [2] Future Implications - Companies may currently prefer to negotiate licensing agreements privately, but issues may escalate into litigation as hybrid bonding commercializes in 2026 [2]

Core Insights - The semiconductor industry is rapidly shifting towards packaging technology, with advanced packaging and bonding techniques identified as key breakthroughs to overcome critical challenges, serving as the next growth engine for the industry [1] - Technologies such as hybrid bonding and non-solder bonding are maturing, facilitating advancements in 3D packaging and heterogeneous integration towards higher density and reliability [1] - New materials like nano-silver sintering are being adopted to address traditional bonding materials' thermal expansion coefficient matching issues [1] - The demand from sectors like 5G, AI, and automotive electronics is increasing the requirements for chip heat dissipation efficiency and signal transmission speed, making advanced packaging a crucial pathway to enhance computing power cost-effectiveness amid the slowing of Moore's Law [1] - Domestic companies are entering high-end markets such as HBM and power semiconductors from the mid-to-low-end market, although they still rely on international suppliers like ASM Pacific for key equipment and materials [1] - The global advanced packaging market is expected to reach $65 billion by 2027, with hybrid bonding technology projected to grow the fastest, and advanced packaging is anticipated to surpass traditional packaging as the mainstream technology by 2026 [1] - The integrated circuit ETF (159546) tracks the integrated circuit index (932087), which selects listed companies involved in semiconductor design, wafer manufacturing, packaging testing, and related materials and equipment, effectively reflecting the overall performance of core enterprises in China's integrated circuit industry [1]

Core Insights - High Bandwidth Memory (HBM) is a critical driver for artificial intelligence and is at the forefront of multiple technological developments, but it is also one of the most challenging modules to manufacture [2] - The shrinking dimensions and spacing of Through-Silicon Vias (TSV) and microbumps present significant challenges, impacting yield rates and defect detection [2][10] - The transition to HBM4 is expected to increase the number of stacked layers from 16 to potentially 20, while maintaining a total height limit of 775 micrometers [8] Manufacturing Challenges - The need to stack 16 chips on a single wafer requires significant thinning, down to 20 micrometers, and the use of backside inspection technology to ensure wafer flatness [4] - Major HBM manufacturers are considering a shift to hybrid bonding technology to achieve shorter interconnects and lower signal latency [4][10] - Inconsistencies in bump height can negatively affect yield, reliability, and performance, leading to issues such as contact failures and reduced signal integrity [4][10] Detection and Inspection Techniques - Manufacturers focus on identifying issues after the electroplating step and before reflow soldering, with confocal laser detection being preferred over white light detection for rough metal surfaces [5] - Advanced packaging requires strict control of coplanarity and flatness, with flexibility being crucial for adapting to different development stages and achieving mass production [7] - Various detection methods, including automated optical inspection (AOI) and X-ray tools, are being optimized to identify critical defects in microbumps [9] Transition to HBM4 - The transition to HBM4 involves challenges such as reducing copper microbump sizes to 10 micrometers and determining the optimal timing and method for migrating from microbumps to hybrid bonding [13] - Defects in microbumps include pad misalignment, solder necking, and localized cracking, necessitating rapid analysis of thousands of images to ensure high yield [13][14] - A robust framework for analysis and detection of defects is essential as HBM suppliers transition to HBM4, focusing on optimizing solder paste usage and ensuring proper alignment during assembly [14]

Core Viewpoint - Adeia has filed two patent infringement lawsuits against AMD, claiming that AMD's chips utilize its patented hybrid bonding technology, which is central to AMD's 3D V-Cache design, enhancing gaming performance and cache density [2][3]. Group 1: Patent Infringement Lawsuit - The lawsuits involve ten patents, including seven related to hybrid bonding technology and three concerning advanced logic and memory manufacturing processes [2]. - Adeia's claims arise after failed licensing negotiations over several years, with the lawsuits announced on November 3 [2]. - AMD has not commented on the lawsuits as of now [2]. Group 2: Hybrid Bonding Technology - Hybrid bonding technology is crucial for AMD's Ryzen X3D processors, allowing for a near-monolithic connection between chips, which enables stacking of 64MB SRAM without exceeding thermal or electrical limits [2]. - This technology utilizes TSMC's SoIC process series, which facilitates ultra-high-density 3D integration [2]. Group 3: Implications of the Lawsuit - The outcome of the lawsuit could redefine the boundaries between proprietary bonding methods and specific implementations by foundries, impacting the ownership of connection aspects in 3D chip designs [4]. - If Adeia's claims withstand early procedural challenges, the case may influence the valuation of all hybrid bonding processors in future licensing transactions [4]. - Historically, injunctions in such patent cases are rarely granted, leading to expectations that AMD's products will not be immediately affected [3].

Group 1 - HBM chips have become the standard for AI computing, with their core advantage stemming from the vertical stacking structure of DRAM chips [2] - The main chip stacking technology currently is Thermal Compression Bonding (TCB), which faces limitations as the number of stacked layers exceeds 16, affecting yield and signal integrity [2][4] - Hybrid bonding technology emerges as a revolutionary solution, allowing for direct copper-to-copper bonding between DRAM chips, enhancing interconnect density without the limitations of bumps [2][4] Group 2 - The semiconductor industry is shifting towards small chips and 3D integrated chip (3DIC) technology due to the slowdown of Moore's Law, making packaging a key factor in driving AI chip performance [4][6] - According to Yole Group, the evolution of chip bonding technology is moving towards hybrid bonding as the ultimate goal, with a projected market growth for hybrid bonding equipment to reach $397 million by 2030 [6][9] Group 3 - Hybrid bonding technology offers significant advantages over TCB, including a 15x increase in interconnect density, 11.9x speed improvement, and over 100x energy efficiency performance [9][10] - Despite the higher infrastructure costs, the cost per interconnect is reduced by 10 times with hybrid bonding, and it can lower the HBM stack temperature by 20% [9][10] Group 4 - Currently, no company has successfully achieved mass production of hybrid bonding equipment due to challenges such as existing TCB machines being sufficient, high precision requirements, and the high cost of hybrid bonding machines [12][21] - Predictions indicate that by 2030, the cumulative installation of hybrid bonding equipment will range from 960 to 2000 units, reflecting a 7% increase from previous forecasts [12][14] Group 5 - Major players in the hybrid bonding equipment market include Besi, which has seen significant revenue growth and strategic partnerships, particularly with Applied Materials [21][22] - South Korean companies like Hanmi Semiconductor and Hanwha Semitech are key competitors in the hybrid bonding space, with Hanmi holding a dominant market share in TCB machines [23][24] Group 6 - LG Electronics is entering the hybrid bonding equipment market through a national project aimed at developing HBM hybrid bonding machines, indicating a strategic focus on semiconductor equipment [25][26] - Samsung is also developing its own hybrid bonding machines through its subsidiary SEMES, aiming to reduce reliance on external suppliers [27] Group 7 - In China, companies like Tuojing Technology and Qinghe Crystal Semiconductor are making strides in hybrid bonding equipment, with Qinghe announcing the launch of the world's first dual-mode hybrid bonding equipment [29] - Besi predicts that the hybrid bonding market will reach €1.2 billion by 2030, driven by the transition from TCB to hybrid bonding technology [29]

Core Viewpoint - The storage market is undergoing significant changes, with HBM technology becoming a strategic focal point for leading companies like SK Hynix, Samsung, and Micron, as they compete for future revenue growth [3][4][18]. Group 1: DRAM Market Dynamics - SK Hynix has maintained its position as the global leader in the DRAM market, increasing its market share from 36.9% in Q1 to 39.5% in Q2, while Samsung's share decreased from 34.4% to 33.3% [2]. - In terms of revenue, SK Hynix reported $12.226 billion in Q2, surpassing Samsung's $10.3 billion by over $1.9 billion, marking a significant shift in the competitive landscape [2]. - The ongoing transition in the DRAM market is characterized by a focus on HBM technology, which is expected to drive future growth [3][10]. Group 2: HBM Technology and Customization - HBM has evolved into a critical component for high-performance AI chips, with SK Hynix and Micron entering the final testing phase for the sixth generation of HBM (HBM4), set to supply NVIDIA [3][4]. - SK Hynix is positioned as the primary supplier for NVIDIA's HBM4, with expectations to finalize supply contracts by September [4]. - Customization of HBM products is becoming increasingly important, with SK Hynix already engaging with major clients like NVIDIA and Microsoft to develop tailored solutions [5][6]. Group 3: DDR4 Market Resurgence - The unexpected resurgence of DDR4 memory prices is attributed to supply shortages following announcements from major manufacturers to halt production by the end of 2025 [7][8]. - Current market prices for DDR4 have surged, with the average spot price for DDR4 16Gb reaching $16, significantly higher than DDR5 prices [7]. - Both Samsung and SK Hynix are reconsidering their plans to phase out DDR4, extending production timelines due to the profitability of older chips [8]. Group 4: Equipment and Technological Advancements - The introduction of High NA EUV equipment by SK Hynix is set to enhance DRAM production capabilities, allowing for finer circuit patterns and increased integration [13][14]. - The competition in the semiconductor equipment sector is intensifying, particularly with the development of hybrid bonding technology, which promises to improve performance and efficiency in HBM production [14][15]. - Companies like BESI and Applied Materials are leading the charge in hybrid bonding technology, which is expected to reshape the semiconductor equipment landscape [15][16]. Group 5: Future Outlook - The competition in the DRAM market is expected to escalate, particularly as companies adapt to the evolving demands of the AI era [18]. - The integration of various technologies and collaborative efforts among industry players will be crucial for success in the increasingly complex semiconductor ecosystem [18].