如果您希望可以时常见面，欢迎标星收藏哦~ 来 源： 内容来自半导体芯闻综合 。 美国取消了对中国芯片设计软件开发商和乙烷生产商的出口限制，这进一步表明中美贸易紧张局势 正在缓和，包括北京在稀土问题上做出让步。 "随着美国和中国继续遵守这项框架协议，我们将看到很多限制措施取消。回到二月/三月的现 状，"这位未获授权对媒体发言并拒绝透露姓名的消息人士表示。 西门子在一份声明中表示，在最近收到美国商务部关于不再对中国客户实施出口管制限制的通知 后，该公司已恢复对中国客户的销售和支持。 新思科技表示，公司于 7 月 2 日收到美国商务部工业与安全局来函，通知基于 2025 年 5 月 29 日收到的限制令所实施的对华出口管制措施现予以撤销，即时生效。公司正恢复近期受限产品在中 国市场的供应和全面客户支持。 Cadence也表示，美国已取消对中国芯片设计软件的出口限制，并正在恢复受影响客户对软件和技 术的访问。 据路透社看到的公司致员工的一封信显示，新思科技预计将在三个工作日内完成系统更新，以恢复 中国客户的访问和支持。 包括新思科技、Cadence设计系统公司和西门子在内的全球三大电子设计自动化 (EDA) 软件开发 ...

Core Viewpoint - The article discusses the unconditional approval of the acquisition of Konka Group by China Resources Limited, highlighting the strategic move to optimize resource allocation among state-owned enterprises [1][3]. Summary by Sections Acquisition Details - On June 30, 2023, Konka Group disclosed that its controlling shareholder, Overseas Chinese Town Group, planned to transfer all shares of Konka Group to China Resources Limited's wholly-owned subsidiary, Panshi Runchuang (Shenzhen) Information Management Co., Ltd. [3][5]. - The transfer involves 524 million A-shares and 275,500 A-shares from Overseas Chinese Town Group and its affiliates, respectively, to Panshi Runchuang [3][6]. Regulatory Approval - The State Administration for Market Regulation announced the approval of the acquisition case on June 23-29, 2025, confirming the transaction's compliance with regulatory standards [1][4]. Shareholding Structure Post-Transfer - After the completion of the share transfer, Panshi Runchuang will hold 524.022 million A-shares, accounting for 21.76% of the total share capital, while Hehui Co., Ltd. will hold 198.361 million B-shares, representing 8.24% of the total share capital [6].

Core Viewpoint - The semiconductor industry faces critical challenges in data transmission speed and security, driven by the explosive growth of AI, connected vehicles, 5G, and IoT, leading to increased demand for high-performance computing and low-power chips [1] Group 1: Industry Challenges and Innovations - The bottlenecks in memory bandwidth and data processing security are becoming increasingly prominent [1] - Interface IP and security IP technologies are identified as core drivers for breakthroughs in the industry, directly impacting chip performance, compatibility, and attack resistance [1] Group 2: Company Overview - Rambus, established in 1990, is a pioneer in the field of high-speed interface technology, redefining data transmission standards between memory and systems [1] - Rambus offers a robust product portfolio, including DDR memory interfaces, HBM3/4, and PCIe 5/6 solutions, significantly enhancing performance in data centers and edge computing [1] - The company also provides various security IP solutions, such as root of trust technology, security protocol engines, inline cryptographic engines, and post-quantum cryptography accelerators [1] Group 3: Upcoming Event - Rambus is hosting a technology seminar on July 9, 2025, in Beijing, focusing on AI and automotive sectors, featuring industry partners and technical experts [2][3] - The morning session will cover the latest interface and security IP solutions for AI and advanced applications, including quantum-safe encryption and various memory technologies [6] - The afternoon session will delve into automotive security solutions, addressing trends and challenges faced by hardware and software designers in smart connected vehicles [7]

Core Viewpoint - TSMC's employee bonuses and dividends for 2024 have reached a record high, reflecting strong revenue and profit growth from the previous year, with an average payout of over NT$200 million per employee [1][2]. Group 1: Employee Compensation - TSMC will distribute a total of NT$140.59 billion in employee performance bonuses and dividends for 2024, marking a year-on-year increase of over 40% [1][2]. - The average annual bonus per employee is NT$200.84 million, which represents a year-on-year increase of NT$51.32 million, or approximately 34.32% [2]. - Employees with six years of service can expect bonuses as high as NT$1.8 million, while those with five years and top performance ratings can receive around NT$1.16 million [1]. Group 2: Financial Performance - TSMC's total revenue for 2024 is projected to reach NT$2.8943 trillion, with a net profit of NT$1.1732 trillion, both figures representing new highs [1]. - The earnings per share (EPS) is expected to be NT$45.25, showcasing TSMC's strong competitive position in the semiconductor industry [1]. Group 3: Industry Context - The global semiconductor industry is facing challenges, with competitors like Samsung and Intel experiencing delays and operational difficulties in their advanced process technologies [4][5]. - TSMC maintains its leadership in advanced process technology, with plans to mass-produce 2nm processes in the second half of this year and A16 processes by the second half of 2026 [5]. - The demand for high-end processes is expected to rise due to the growing need for AI servers, further solidifying TSMC's position as a leading foundry [5].

来源： 泰克科技 图源： 泰克科技 点击阅读原文， 锁定你中意的型号！ 欲知更多产品和应用详情，您还可以通过如下方式联系我们： 邮箱：china.mktg@tektronix.com 扫码添加 " 泰克工程师小助手 " 立享 1 对 1 专属服务！ 网址：tek.com.cn 点击 "阅读原文" 锁定你中意的型号！ 将您的灵感变为现实 我们提供专业的测量洞见信息，旨在帮助您提高绩效以及将各种可能性转化为现实。 泰克设计和制造能够帮助您测试和测量各种解决方案，从而突破复杂性的层层壁垒，加快您的全局创新步伐。我 们携手共进，一定能够帮助各级工程师更方便、更快速、更准确地创造和实现技术进步。 电话：400-820-5835 (周一至周五9:00-17:00) ...

如果您希望可以时常见面，欢迎标星收藏哦~ 来 源： 内容 编译自 zdnet 。 据悉，三星电子将向博通供应12层第五代高带宽存储器（HBM3E）。目前，在具体数量谈判后， 正在推进明年供货计划。随着全球大型科技公司纷纷加大自身专用集成电路（ASIC）开发的力 度，预计这将部分抵消英伟达HBM供应延迟带来的影响。 据业内人士3日透露，三星电子上个月与博通完成了HBM3E 12层质量测试，并计划量产供应该产 品。 目前两家公司商谈的供货量预计为12亿至14亿Gb（千兆位），预计最早将于今年下半年至明年实 现量产。 虽然与每年的HBM市场规模相比，这个数量并不算大，但对于急需确保HBM需求的三星电子来 说，这是一个意义重大的量。三星电子已设定目标，今年将HBM总供应量提升至80亿至90GB，是 去年的两倍。 参考链接 https://zdnet.co.kr/view/?no=20250703105748 点这里加关注，锁定更多原创内容 *免责声明：文章内容系作者个人观点，半导体芯闻转载仅为了传达一种不同的观点，不代表半导体芯闻对该 观点赞同或支持，如果有任何异议，欢迎联系我们。 | | 推荐阅读 | | --- ...

Core Viewpoint - The article highlights the optimistic outlook for the artificial intelligence (AI) chip sector, prompting major South Korean semiconductor companies to increase their facility investments to capture future market share [1]. Group 1: Samsung's Developments - Samsung is preparing to restart the construction of its P4 chip manufacturing line in Pyeongtaek, which was halted last year. The P4 factory will have a total monthly capacity of 200,000 wafers, with the fourth phase expected to contribute 40% of this capacity, equating to 80,000 wafers per month [2][3]. - The P4 factory's production lines, initially intended for foundry services, are now expected to be converted to DRAM production lines using 10nm technology for the sixth generation 1c DRAM. Samsung has confirmed the successful development of this advanced technology for the next generation high bandwidth memory (HBM4) chips [2]. - There are reports that Samsung is also considering restarting the construction of its fifth manufacturing plant (P5) in Pyeongtaek, which was paused earlier. The P5 plant is projected to require an investment of over 30 trillion KRW (approximately 22 billion USD) and will produce DRAM, NAND flash, and foundry products [3]. Group 2: SK Hynix's Expansion - SK Hynix is also planning to expand its production capacity in the coming years. The company is set to complete the construction of its new M15X factory in Cheongju, South Korea, later this year, which will produce fifth-generation 10nm DRAM chips for the next generation HBM4 products. This factory is expected to have a monthly capacity of around 90,000 wafers [4]. - Additionally, SK Hynix is investing in a new backend production facility named "P&T 7" in Cheongju to enhance its packaging capabilities and improve the performance and power efficiency of its advanced chips [4]. Group 3: Market Outlook - Strong demand for DRAM is anticipated in the second half of the year, particularly for HBM chips that support AI processors. According to the Korea Export-Import Bank, the global AI semiconductor market is expected to grow from 41.1 billion USD in 2022 to 133 billion USD by 2028 [5].

Core Viewpoint - The seventh Yangtze River Delta Integrated Circuit Skills Competition has been officially launched, focusing on talent cultivation and industry advancement in the integrated circuit sector, with the theme "Chip Wisdom, New Future" [1][12]. Group 1: Event Overview - The competition is co-hosted by various local government bodies and organizations, aiming to establish a benchmark project for labor and skills competitions in the Pudong New Area [1][6]. - This year marks the third time the event is held at the Shanghai Integrated Circuit Design Industrial Park, which has developed into a core area for the integrated circuit industry in China since its establishment in 2018 [4]. Group 2: Competition Structure - The competition features two main tracks: "Design Competition for Security Encryption Chips Based on National Secret Standards" and "Integrated Circuit CAD Programming Competition Based on AI Tools," focusing on cutting-edge fields of security encryption and artificial intelligence [8]. - The competition aims to address critical technology challenges and enhance the efficiency and precision of integrated circuit design through digital and automated processes [8]. Group 3: Talent Development and Industry Collaboration - The event will include a series of preliminary rounds, interviews, and final competitions, along with training sessions and talent matchmaking events to foster high-level talent in the Pudong New Area [11]. - Participants will have opportunities to deepen their understanding of professional knowledge and improve their problem-solving skills through practical experience [11]. Group 4: Awards and Incentives - Awards will be given to individuals and teams, including certificates and monetary prizes, with additional incentives such as guaranteed rental housing and office space for winners [11].

Core Viewpoint - The rapid development of artificial intelligence (AI) presents new challenges for chip computing power, particularly the "memory wall" issue, which arises from the limitations of the von Neumann architecture widely used in processors [1][3]. Group 1: Memory Wall Problem - The von Neumann architecture simplifies hardware design by storing data and instructions in the same memory, but it limits CPU execution capabilities due to sequential instruction processing [3]. - The performance of storage has not kept pace with CPU advancements, leading to significant delays as CPUs wait for memory read/write operations, thus degrading overall system performance [3][4]. Group 2: Processing-In-Memory (PIM) Technology - PIM, or Compute-in-Memory, is an emerging non-von Neumann computing paradigm aimed at addressing the "memory wall" problem by executing computations within memory, reducing data transfer time and energy costs [5][6]. - The development of PIM technology has evolved through various stages since the 1990s, with significant contributions from both academic institutions and companies like Samsung, SK Hynix, and Micron [6][8]. Group 3: Current PIM Technologies - Mainstream PIM technologies include digital PIM (SRAM/DRAM), analog PIM (RRAM, PCM), and hybrid PIM, each with distinct advantages and challenges [8]. - Companies and research institutions have been actively developing PIM prototypes since 2017, with notable advancements in traditional storage technologies [8][9]. Group 4: Sorting Challenges in AI - Sorting is a critical and time-consuming operation in AI systems, affecting applications in natural language processing, information retrieval, and intelligent decision-making [10][11]. - The complexity of sorting operations, particularly in dynamic environments, poses significant challenges for traditional computing architectures, leading to high time and power consumption [10][11]. Group 5: Breakthrough in Sorting Hardware Architecture - A team from Peking University has achieved a breakthrough in efficient sorting hardware architecture based on PIM technology, addressing the inefficiencies of traditional architectures in handling complex nonlinear sorting tasks [13][14]. - The new architecture reportedly enhances sorting speed by over 15 times and improves area efficiency by more than 32 times, with power consumption reduced to one-tenth of traditional CPU or GPU processors [15][17]. Group 6: Implications and Future Applications - This breakthrough is expected to support a wide range of AI applications, including intelligent driving, smart cities, and edge AI devices, providing a robust foundation for next-generation AI technologies [16][17]. - The successful implementation of this sorting architecture signifies a shift from application-specific solutions to broader, general-purpose computing capabilities within PIM systems [15][16].

Core Viewpoint - NVIDIA is at the forefront of AI development, transitioning from perception and generation to "Physical AI," which involves understanding real-world physics for autonomous decision-making and reasoning [1][3]. Group 1: NVIDIA's AI Evolution - Over the past decade, NVIDIA has pioneered the use of GPUs in voice and image recognition, establishing a foundation for deep learning with software stacks like CUDA and TensorRT [1]. - In recent years, NVIDIA's advancements in generative AI have enabled tools capable of text, image, and video generation, exemplified by technologies supporting ChatGPT [1]. Group 2: Physical AI and Robotics - The concept of "Physical AI" is seen as the next stage in AI evolution, with robots and autonomous vehicles serving as key applications [1][3]. - NVIDIA's focus on creating a safe environment for simulating and training AI to understand real-world rules is crucial for the development of Physical AI [3]. Group 3: Isaac GR00T and Robotics Development - Isaac GR00T N1.5 is an open-source humanoid robot model designed to enhance robot perception and control, integrating with NVIDIA's Omniverse for realistic motion data generation [5][6]. - The deployment of GR00T N1 in industrial settings, such as automotive manufacturing, marks a significant step in practical applications of humanoid robots [6]. Group 4: Data Generation and Simulation - NVIDIA introduced the Isaac GR00T-Dreams Blueprint, which generates synthetic training data from a single environmental image, significantly reducing costs and risks associated with data collection [10][11]. - The Isaac Sim platform provides a dedicated environment for robot simulation and synthetic data generation, enhancing the training process for robots [13]. Group 5: Jetson AGX Thor and Edge Computing - The upcoming Jetson AGX Thor platform represents a major leap in computational power for humanoid robots, offering up to 800 TFLOPS of AI performance [20]. - Jetson series products are designed for edge computing, enabling real-time data processing and decision-making capabilities in robots [19]. Group 6: Comprehensive Ecosystem - NVIDIA is building an end-to-end ecosystem for Physical AI, integrating chips, systems, software, simulation, and models to drive a transformation in robotic intelligence [22]. - The collaboration of cloud, simulation, and hardware platforms positions NVIDIA to lead the next wave of AI advancements that will significantly impact human productivity and lifestyle [22].