公众号记得加星标⭐️，第一时间看推送不会错过。 在日本NEPCON展会上发布的幻灯片和实物样品揭示了英特尔玻璃基板令人惊讶的内部结构。与其使用代码名称或营销术语，不如直接看懂以下工 程规格： 10-2-10 堆叠结构： 在2026年1月于东京国际展览中心举办的" NEPCON Japan 2026 "电子制造及封装技术展览会上，英特尔展出了"玻璃芯基板"，这项下一代封装技 术此前曾被传言处于"实验室阶段"甚至"已经停止研发"。此次展出表明，该公司正朝着实际应用阶段迈进。 此次发布会上亮相的是一款尺寸为 78mm x 77mm 的全尺寸原型机，它将英特尔的王牌技术——2.5D 封装技术" EMIB（嵌入式多芯片互连桥） "集成到玻璃基板上。可以说，英特尔晶圆代工凭借其"突破物理限制"的优势，正式进军由英伟达和 AMD 主导的 AI 加速器市场。 为什么现在要用玻璃？答案在于人工智能芯片尺寸增大带来的物理限制，例如翘曲和布线密度过高等。 目前，先进封装技术，例如台积电的CoWoS技术，采用硅中介层和有机基板。然而，随着芯片尺寸增大到光罩尺寸（曝光工具的照射区域）的两到 三倍，传统的有机材料（塑料树脂）由于热胀冷缩 ...

Core Insights - Advanced packaging technology is crucial for overcoming performance bottlenecks in the semiconductor industry, driven by emerging applications like AI, high-performance computing, and 5G communication [3] - The global advanced packaging market is projected to grow from approximately $45 billion in 2024 to $80 billion by 2030, with a compound annual growth rate (CAGR) of 9.4% [3][75] Technical Evolution Dimension - TSMC's CoWoS technology has evolved from supporting 1.5x to 3.3x mask sizes, with plans for a 5.5x version by 2025-2026 and a 9x version by 2027, significantly increasing integration density and reducing signal transmission latency [6][7] - Hybrid bonding technology is emerging as a core technology for next-generation advanced packaging, enabling direct wafer bonding without bumps, thus enhancing interconnect density and reducing power consumption [10][11] - AMD's MI300X AI accelerator utilizes a 3.5D packaging architecture, combining TSMC's SoIC and CoWoS technologies, achieving unprecedented integration levels with 1,530 billion transistors [14][15] - Intel employs a multi-technology strategy in advanced packaging, focusing on EMIB and Foveros technologies, with plans for further enhancements to improve performance and integration [18][19] - Glass substrate technology is gaining traction as a disruptive innovation, offering advantages in electrical performance, thermal stability, and cost-effectiveness, with a projected market penetration exceeding 50% within five years [22][23] Material System Analysis - BT resin substrates are the most widely used packaging material, accounting for over 70% of IC substrates, known for their excellent thermal and electrical properties [26][27] - ABF substrates, developed by Ajinomoto, are preferred for high-end chip packaging due to their superior processing capabilities and electrical performance, despite higher costs [28][30] - Ceramic substrates, particularly AlN and Si3N4, are ideal for high-performance applications due to their high thermal conductivity and mechanical strength [32][34] Equipment and Process Dimension - TCB equipment is critical for HBM packaging, with ASMPT holding over 80% market share, driven by the demand for AI chips and high-performance computing [45][47] - The global die bonder market is dominated by four major players, with ASMPT leading at 31% market share, followed by BESI, Ficontec, and Neways [49][51] - The back-end packaging equipment market is characterized by a diverse competitive landscape, with Disco leading in wafer thinning and cutting technologies [54] Industry Layout Analysis - TSMC is experiencing exponential growth in CoWoS capacity, projected to reach 65,000-75,000 units per month by 2025, driven by AI chip demand [63][65] - The HBM market is dominated by three players: SK Hynix, Samsung, and Micron, collectively holding over 95% market share, with SK Hynix leading at 60-70% [67][68] - China's packaging industry is rapidly advancing, with Jiangsu Changjiang Electronics Technology, Tongfu Microelectronics, and Huada Semiconductor becoming significant players globally [70][71] - The global advanced packaging market is shifting towards IDM manufacturers, who leverage integrated design and manufacturing advantages, with Taiwan companies holding a dominant position in the AI packaging market [73][74]

Core Insights - The article highlights the transformative impact of AI, big data analytics, and edge computing on the global technology industry, marking a significant shift in technological innovation and product breakthroughs [2] - TrendForce hosted the "2026 Top Technology Market Trends Forecast and TechFuture Awards 2025," presenting key insights into various technology sectors including semiconductor manufacturing, storage, AI servers, and more [2][4] Group 1: Award Winners and Innovations - Taiwan Semiconductor Manufacturing Company (TSMC) received the "AI Integrated Manufacturing Benchmark Award" for its revolutionary CoWoS technology, which supports the rapid growth of the AI industry through advanced packaging solutions and capacity expansion [5][6] - Samsung was awarded the "High-Performance Storage Leadership Award" for its advancements in storage technology that enhance capacity and performance, catering to mobile and AI computing needs [8][9] - Solidigm won the "Liquid Cooling Storage Technology Pioneer Award" for introducing the world's first enterprise SSD with direct liquid cooling, addressing heat management challenges in data centers [11][12] - Yangtze Memory Technologies Co., Ltd. received the "Flash Memory Reliability Breakthrough Award" for its Xtacking® architecture, which sets new standards for reliability and data durability in 3D NAND flash technology [14] - KIOXIA was honored with the "Annual Storage Outstanding Innovation Award" for its high-capacity NVMe SSD, which simplifies deployment and reduces power consumption in AI training scenarios [16][17] - SanDisk was recognized with the "Flash Memory Technology Innovation Award" for its new storage solutions that enhance flash memory performance through innovative stacking techniques [19] - Huawei was awarded the "AI Server Excellence Contribution Award" for its dual-engine approach in AI servers, enhancing computational efficiency and reliability [22] - Innoscience Technology was recognized with the "China Power Semiconductor Pioneer Award" for its leadership in GaN technology, driving efficiency in various applications [24] - Trina Storage received the "Annual AIDC Green Energy Cornerstone Award" for its zero-carbon data center project, showcasing sustainable energy solutions [26] - Pasoni Sensory Technology was awarded the "AI Robotics Key Technology Award" for its advancements in tactile perception technology for humanoid robots [29] Group 2: Future Outlook - The TechFuture Awards not only celebrate the achievements of the past year but also emphasize the industry's commitment to innovation and the pursuit of a sustainable, intelligent future [31]

Core Viewpoint - NVIDIA plans to upgrade its existing CoWoS technology to CoWoP solution by around 2027, which will eliminate the packaging substrate and directly install the CoW wafer-level packaged semi-finished products onto a reinforced PCB. This transition poses significant challenges in PCB wiring technology and signal transmission design [2]. Group 1: Technology Analysis - The current advanced packaging substrate L/S for CoWoS is below 10/10 microns, utilizing a semi-additive process more aligned with semiconductor manufacturing. In contrast, the PCB industry primarily employs mature subtractive processes, with high-precision PCBs typically having L/S concentrated around 75-50 microns [2]. - High-end HDI boards and SLP substrates, even with improved semi-additive processes, can only achieve a maximum L/S of 30-25 microns, which is significantly less precise than the required 10-micron ultra-fine pitch [2]. Group 2: Market Implications - Traditional PCB manufacturers may find it challenging to benefit from the CoWoP concept, but it could help IC substrate manufacturers establish a new competitive edge. The main challenge for substrate manufacturers is to increase the size of organic substrates and update equipment suppliers' products [3]. - Glass substrate developers may benefit from this transition due to superior thermal conductivity and stability compared to current PCBs and organic substrates. The primary challenge lies in controlling the graphic process during large-size production, particularly regarding fragmentation, film adhesion, and fine wiring [3]. - Current PCB large board glass substrates can achieve line width and spacing breakthroughs of 20/20 microns. If the initial CoWoP technology can utilize this precision glass packaging substrate, it would represent a significant step towards industrialization [3].

Group 1 - The company Huada Semiconductor (002185.SZ) has stated on its interactive platform that its eSinC 2.5D packaging technology platform includes SiCS, FoCS, and BiCS, which are comparable to CoWoS-related technologies [1] - The company does not possess CoWoP packaging technology [1]

Group 1 - The company has indicated that its eSinC 2.5D packaging technology platform includes SiCS, FoCS, and BiCS, which are comparable to CoWoS technology [2] - The company does not possess CoWoP packaging technology [2]

Core Viewpoint - Morgan Stanley believes that the transition from CoWoS to CoWoP faces significant technical challenges, and the reliance on ABF substrates is unlikely to change in the short term [1][2][8] Group 1: Technical Challenges - The CoWoP technology requires PCB line/space (L/S) to be reduced to below 10/10 microns, which is significantly more challenging than the current standards of ABF substrates [5][6] - The current high-density interconnect (HDI) PCB has an L/S of 40/50 microns, and even the PCB used in iPhone motherboards only reaches 20/35 microns, making the transition to CoWoP technically difficult [5][6] Group 2: Supply Chain Risks - Transitioning from CoWoS to CoWoP could introduce significant yield risks and necessitate a reconfiguration of the supply chain, which is not commercially logical given the timeline for mass production [8] - TSMC's CoWoS yield rate is nearly 100%, making a switch to a new technology unnecessarily risky [8] Group 3: Potential Advantages of CoWoP - Despite the short-term challenges, CoWoP technology has potential advantages, including shorter signal paths, improved thermal performance suitable for >1000W GPUs, better power integrity, and addressing organic substrate capacity bottlenecks [10] - The goals of adopting CoWoP include solving substrate warping issues, increasing NVLink coverage on PCBs without additional substrates, achieving higher thermal efficiency without packaging lids, and eliminating bottlenecks in certain packaging materials [10]

Summary of Key Points from Conference Call Records Industry or Company Involved - **Semiconductor Packaging Industry**: Focus on TSMC's CoWoS technology and related companies - **RISC-V Architecture**: Development and adoption in high-performance computing - **Micro-Short Drama Industry**: Growth and government support in Shenzhen - **Brain-Computer Interface (BCI) Technology**: Medical applications and market potential - **AI in Healthcare**: Investment trends and technological advancements - **Tourism and Cruise Industry**: Summer tourism trends and company initiatives - **Robotics and AI**: Development in military and healthcare applications Core Insights and Arguments Semiconductor Packaging - TSMC is advancing its CoWoS technology, with expected Q3 sales between $31.8 billion and $33.1 billion, exceeding market estimates [2][3] - The global market for CoWoS technology is projected to exceed $10 billion by 2026, with China leading growth at 71% [2] RISC-V Architecture - The fifth RISC-V China Summit highlighted the acceleration of high-performance computing products [4] - Companies like Aojie Technology and Allwinner Technology are leading in RISC-V CPU subsystem development [5] Micro-Short Drama - Shenzhen's government has introduced measures to support the micro-short drama industry, with a market size expected to reach 68.6 billion yuan in 2025, growing at 36% [6][7] Brain-Computer Interface - The global BCI medical application market is projected to reach $40 billion by 2030, with significant growth in central nervous system disease treatments [8] - Companies like Yanshan Technology and Sanbo Brain Science are pioneering BCI applications [9] AI in Healthcare - The global AI healthcare investment landscape is heating up, with significant advancements in molecular modeling technology [11] - The company is collaborating with Tencent AI Lab to enhance drug discovery processes [11] Tourism and Cruise - The domestic summer tourism consumption is expected to reach 1.8 trillion yuan, with the company launching themed cruise lines [13] Robotics and AI - The military robotics sector is accelerating, with new developments in multifunctional robots for reconnaissance and inspection [16] - Companies are also focusing on healthcare robotics, with applications in rehabilitation and elderly care [15] Other Important but Potentially Overlooked Content - The CoWoS technology's capacity is directly linked to HBM production, indicating a critical supply chain relationship [2] - The RISC-V architecture's integration into data centers could disrupt traditional CPU markets [4] - The micro-short drama market's growth is driven by free content, highlighting a shift in consumer preferences [6] - The BCI technology's commercialization is supported by new pricing regulations in Hubei province [8] - The AI healthcare sector is seeing a convergence of technology and traditional pharmaceutical practices, enhancing drug development efficiency [11] - The cruise tourism initiative is part of a broader strategy to diversify offerings in response to changing consumer demands [13] - The military robotics market is expected to see increased government investment and interest, particularly in AI applications [16]

Core Viewpoint - The article discusses the retirement of TSMC's Vice President of R&D, Dr. Yu Zhenhua, highlighting his significant contributions to the semiconductor industry, particularly in advanced packaging technologies and the establishment of TSMC as a leader in the foundry sector [3][5][7]. Group 1: Contributions of Dr. Yu Zhenhua - Dr. Yu Zhenhua joined TSMC in 1994 and played a pivotal role in the development of advanced packaging technologies such as CoWoS and InFO, which have been crucial for TSMC's success in the semiconductor industry [3][5][9]. - He has accumulated over 190 U.S. patents and 173 Taiwanese patents, focusing on low dielectric materials and packaging integration technologies [9]. - Dr. Yu's leadership in the development of 3D chip integration and TSV technology has strengthened the Taiwanese semiconductor supply chain [9]. Group 2: Transition of Leadership - Following Dr. Yu's retirement, his responsibilities will be taken over by Xu Guojin, who has over 30 years of experience in the semiconductor industry and previously held senior positions at Micron [5][11][13]. - Xu Guojin is currently the Vice President of Integrated Interconnect & Packaging at TSMC, focusing on 3D IC and advanced packaging technologies [13]. Group 3: Historical Context and Achievements of TSMC - TSMC's rise to prominence in the semiconductor industry is attributed to key technological breakthroughs, including the 0.13-micron copper process developed in 2003, which significantly enhanced its market position [16][17]. - The article refers to the "Six Knights of TSMC," a group of key figures, including Dr. Yu, who have been instrumental in TSMC's technological advancements and overall success [15][17][22]. - TSMC's focus on advanced packaging has become a major area of growth, with the establishment of the "3D Fabric" brand for its 2.5D and 3D packaging products [25].

Core Viewpoint - The ongoing AI boom is driving advancements in semiconductor packaging technologies, particularly Fan-out Panel Level Packaging (FOPLP), which is expected to enhance chip efficiency and market competitiveness [1][2]. Group 1: Advanced Packaging Technologies - Advanced packaging integrates different chips to improve performance, reduce space, and lower power consumption, with TSMC's CoWoS technology being a notable example [1]. - FOPLP technology utilizes square substrates for IC packaging, significantly increasing usable area compared to traditional round wafers, achieving a utilization rate of 95% [1]. - The development of mid-to-high-end semiconductor packaging using 3.5 generation FOPLP glass substrates can provide an area seven times larger than that of a 12-inch glass wafer [1]. Group 2: Industry Collaboration and Development - The Ministry of Economic Affairs, in collaboration with companies like Innolux and the Industrial Technology Research Institute, has launched initiatives to promote FOPLP technology and enhance the value of existing panel production lines [1][2]. - Despite challenges in production technology, such as panel warping and yield issues, ongoing collaboration aims to reduce defects and improve manufacturing processes [2]. Group 3: Market Position and Strategy - Innolux is not competing directly with established semiconductor manufacturers but is leveraging its existing panel production capabilities to transition into advanced packaging [2][3]. - The company plans to utilize its larger glass substrates to meet the increasing demand for IC packaging, with a focus on chip-first solutions to gain market recognition [3]. - The company is committed to continuous improvement in technology and talent development in the FOPLP sector, with expectations for tangible results and shipments this year [3]. Group 4: Future Prospects and Innovations - The company is exploring various advanced technologies, including chip last and redistribution layer (RDL) techniques, while maintaining a focus on validating these technologies rather than solely on mass production [4].